1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2021, Red Hat, Inc.
4 *
5 * Tests for Hyper-V clocksources
6 */
7 #include "test_util.h"
8 #include "kvm_util.h"
9 #include "processor.h"
10 #include "hyperv.h"
11
12 struct ms_hyperv_tsc_page {
13 volatile u32 tsc_sequence;
14 u32 reserved1;
15 volatile u64 tsc_scale;
16 volatile s64 tsc_offset;
17 } __packed;
18
19 /* Simplified mul_u64_u64_shr() */
mul_u64_u64_shr64(u64 a,u64 b)20 static inline u64 mul_u64_u64_shr64(u64 a, u64 b)
21 {
22 union {
23 u64 ll;
24 struct {
25 u32 low, high;
26 } l;
27 } rm, rn, rh, a0, b0;
28 u64 c;
29
30 a0.ll = a;
31 b0.ll = b;
32
33 rm.ll = (u64)a0.l.low * b0.l.high;
34 rn.ll = (u64)a0.l.high * b0.l.low;
35 rh.ll = (u64)a0.l.high * b0.l.high;
36
37 rh.l.low = c = rm.l.high + rn.l.high + rh.l.low;
38 rh.l.high = (c >> 32) + rh.l.high;
39
40 return rh.ll;
41 }
42
nop_loop(void)43 static inline void nop_loop(void)
44 {
45 int i;
46
47 for (i = 0; i < 1000000; i++)
48 asm volatile("nop");
49 }
50
check_tsc_msr_rdtsc(void)51 static inline void check_tsc_msr_rdtsc(void)
52 {
53 u64 tsc_freq, r1, r2, t1, t2;
54 s64 delta_ns;
55
56 tsc_freq = rdmsr(HV_X64_MSR_TSC_FREQUENCY);
57 GUEST_ASSERT(tsc_freq > 0);
58
59 /* First, check MSR-based clocksource */
60 r1 = rdtsc();
61 t1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
62 nop_loop();
63 r2 = rdtsc();
64 t2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
65
66 GUEST_ASSERT(r2 > r1 && t2 > t1);
67
68 /* HV_X64_MSR_TIME_REF_COUNT is in 100ns */
69 delta_ns = ((t2 - t1) * 100) - ((r2 - r1) * 1000000000 / tsc_freq);
70 if (delta_ns < 0)
71 delta_ns = -delta_ns;
72
73 /* 1% tolerance */
74 GUEST_ASSERT(delta_ns * 100 < (t2 - t1) * 100);
75 }
76
get_tscpage_ts(struct ms_hyperv_tsc_page * tsc_page)77 static inline u64 get_tscpage_ts(struct ms_hyperv_tsc_page *tsc_page)
78 {
79 return mul_u64_u64_shr64(rdtsc(), tsc_page->tsc_scale) + tsc_page->tsc_offset;
80 }
81
check_tsc_msr_tsc_page(struct ms_hyperv_tsc_page * tsc_page)82 static inline void check_tsc_msr_tsc_page(struct ms_hyperv_tsc_page *tsc_page)
83 {
84 u64 r1, r2, t1, t2;
85
86 /* Compare TSC page clocksource with HV_X64_MSR_TIME_REF_COUNT */
87 t1 = get_tscpage_ts(tsc_page);
88 r1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
89
90 /* 10 ms tolerance */
91 GUEST_ASSERT(r1 >= t1 && r1 - t1 < 100000);
92 nop_loop();
93
94 t2 = get_tscpage_ts(tsc_page);
95 r2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
96 GUEST_ASSERT(r2 >= t1 && r2 - t2 < 100000);
97 }
98
guest_main(struct ms_hyperv_tsc_page * tsc_page,vm_paddr_t tsc_page_gpa)99 static void guest_main(struct ms_hyperv_tsc_page *tsc_page, vm_paddr_t tsc_page_gpa)
100 {
101 u64 tsc_scale, tsc_offset;
102
103 /* Set Guest OS id to enable Hyper-V emulation */
104 GUEST_SYNC(1);
105 wrmsr(HV_X64_MSR_GUEST_OS_ID, (u64)0x8100 << 48);
106 GUEST_SYNC(2);
107
108 check_tsc_msr_rdtsc();
109
110 GUEST_SYNC(3);
111
112 /* Set up TSC page is disabled state, check that it's clean */
113 wrmsr(HV_X64_MSR_REFERENCE_TSC, tsc_page_gpa);
114 GUEST_ASSERT(tsc_page->tsc_sequence == 0);
115 GUEST_ASSERT(tsc_page->tsc_scale == 0);
116 GUEST_ASSERT(tsc_page->tsc_offset == 0);
117
118 GUEST_SYNC(4);
119
120 /* Set up TSC page is enabled state */
121 wrmsr(HV_X64_MSR_REFERENCE_TSC, tsc_page_gpa | 0x1);
122 GUEST_ASSERT(tsc_page->tsc_sequence != 0);
123
124 GUEST_SYNC(5);
125
126 check_tsc_msr_tsc_page(tsc_page);
127
128 GUEST_SYNC(6);
129
130 tsc_offset = tsc_page->tsc_offset;
131 /* Call KVM_SET_CLOCK from userspace, check that TSC page was updated */
132
133 GUEST_SYNC(7);
134 /* Sanity check TSC page timestamp, it should be close to 0 */
135 GUEST_ASSERT(get_tscpage_ts(tsc_page) < 100000);
136
137 GUEST_ASSERT(tsc_page->tsc_offset != tsc_offset);
138
139 nop_loop();
140
141 /*
142 * Enable Re-enlightenment and check that TSC page stays constant across
143 * KVM_SET_CLOCK.
144 */
145 wrmsr(HV_X64_MSR_REENLIGHTENMENT_CONTROL, 0x1 << 16 | 0xff);
146 wrmsr(HV_X64_MSR_TSC_EMULATION_CONTROL, 0x1);
147 tsc_offset = tsc_page->tsc_offset;
148 tsc_scale = tsc_page->tsc_scale;
149 GUEST_SYNC(8);
150 GUEST_ASSERT(tsc_page->tsc_offset == tsc_offset);
151 GUEST_ASSERT(tsc_page->tsc_scale == tsc_scale);
152
153 GUEST_SYNC(9);
154
155 check_tsc_msr_tsc_page(tsc_page);
156
157 /*
158 * Disable re-enlightenment and TSC page, check that KVM doesn't update
159 * it anymore.
160 */
161 wrmsr(HV_X64_MSR_REENLIGHTENMENT_CONTROL, 0);
162 wrmsr(HV_X64_MSR_TSC_EMULATION_CONTROL, 0);
163 wrmsr(HV_X64_MSR_REFERENCE_TSC, 0);
164 memset(tsc_page, 0, sizeof(*tsc_page));
165
166 GUEST_SYNC(10);
167 GUEST_ASSERT(tsc_page->tsc_sequence == 0);
168 GUEST_ASSERT(tsc_page->tsc_offset == 0);
169 GUEST_ASSERT(tsc_page->tsc_scale == 0);
170
171 GUEST_DONE();
172 }
173
174 #define VCPU_ID 0
175
host_check_tsc_msr_rdtsc(struct kvm_vm * vm)176 static void host_check_tsc_msr_rdtsc(struct kvm_vm *vm)
177 {
178 u64 tsc_freq, r1, r2, t1, t2;
179 s64 delta_ns;
180
181 tsc_freq = vcpu_get_msr(vm, VCPU_ID, HV_X64_MSR_TSC_FREQUENCY);
182 TEST_ASSERT(tsc_freq > 0, "TSC frequency must be nonzero");
183
184 /* First, check MSR-based clocksource */
185 r1 = rdtsc();
186 t1 = vcpu_get_msr(vm, VCPU_ID, HV_X64_MSR_TIME_REF_COUNT);
187 nop_loop();
188 r2 = rdtsc();
189 t2 = vcpu_get_msr(vm, VCPU_ID, HV_X64_MSR_TIME_REF_COUNT);
190
191 TEST_ASSERT(t2 > t1, "Time reference MSR is not monotonic (%ld <= %ld)", t1, t2);
192
193 /* HV_X64_MSR_TIME_REF_COUNT is in 100ns */
194 delta_ns = ((t2 - t1) * 100) - ((r2 - r1) * 1000000000 / tsc_freq);
195 if (delta_ns < 0)
196 delta_ns = -delta_ns;
197
198 /* 1% tolerance */
199 TEST_ASSERT(delta_ns * 100 < (t2 - t1) * 100,
200 "Elapsed time does not match (MSR=%ld, TSC=%ld)",
201 (t2 - t1) * 100, (r2 - r1) * 1000000000 / tsc_freq);
202 }
203
main(void)204 int main(void)
205 {
206 struct kvm_vm *vm;
207 struct kvm_run *run;
208 struct ucall uc;
209 vm_vaddr_t tsc_page_gva;
210 int stage;
211
212 vm = vm_create_default(VCPU_ID, 0, guest_main);
213 run = vcpu_state(vm, VCPU_ID);
214
215 vcpu_set_hv_cpuid(vm, VCPU_ID);
216
217 tsc_page_gva = vm_vaddr_alloc_page(vm);
218 memset(addr_gva2hva(vm, tsc_page_gva), 0x0, getpagesize());
219 TEST_ASSERT((addr_gva2gpa(vm, tsc_page_gva) & (getpagesize() - 1)) == 0,
220 "TSC page has to be page aligned\n");
221 vcpu_args_set(vm, VCPU_ID, 2, tsc_page_gva, addr_gva2gpa(vm, tsc_page_gva));
222
223 host_check_tsc_msr_rdtsc(vm);
224
225 for (stage = 1;; stage++) {
226 _vcpu_run(vm, VCPU_ID);
227 TEST_ASSERT(run->exit_reason == KVM_EXIT_IO,
228 "Stage %d: unexpected exit reason: %u (%s),\n",
229 stage, run->exit_reason,
230 exit_reason_str(run->exit_reason));
231
232 switch (get_ucall(vm, VCPU_ID, &uc)) {
233 case UCALL_ABORT:
234 TEST_FAIL("%s at %s:%ld", (const char *)uc.args[0],
235 __FILE__, uc.args[1]);
236 /* NOT REACHED */
237 case UCALL_SYNC:
238 break;
239 case UCALL_DONE:
240 /* Keep in sync with guest_main() */
241 TEST_ASSERT(stage == 11, "Testing ended prematurely, stage %d\n",
242 stage);
243 goto out;
244 default:
245 TEST_FAIL("Unknown ucall %lu", uc.cmd);
246 }
247
248 TEST_ASSERT(!strcmp((const char *)uc.args[0], "hello") &&
249 uc.args[1] == stage,
250 "Stage %d: Unexpected register values vmexit, got %lx",
251 stage, (ulong)uc.args[1]);
252
253 /* Reset kvmclock triggering TSC page update */
254 if (stage == 7 || stage == 8 || stage == 10) {
255 struct kvm_clock_data clock = {0};
256
257 vm_ioctl(vm, KVM_SET_CLOCK, &clock);
258 }
259 }
260
261 out:
262 kvm_vm_free(vm);
263 }
264