1PLATFORM_FLAVOR ?= mt8173
2
3CFG_ARM64_core ?= y
4
5include core/arch/arm/cpu/cortex-armv8-0.mk
6
7$(call force,CFG_8250_UART,y)
8$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
9$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
10
11ifeq ($(CFG_ARM64_core),y)
12$(call force,CFG_WITH_LPAE,y)
13else
14$(call force,CFG_ARM32_core,y)
15endif
16
17# default DRAM base address
18CFG_DRAM_BASE ?= 0x40000000
19
20# default DRAM size 1 GiB
21CFG_DRAM_SIZE ?= 0x40000000
22
23ifeq ($(PLATFORM_FLAVOR),mt8173)
24# 2**1 = 2 cores per cluster
25$(call force,CFG_TEE_CORE_NB_CORE,4)
26$(call force,CFG_CORE_CLUSTER_SHIFT,1)
27CFG_TZDRAM_START ?= 0xbe000000
28CFG_TZDRAM_SIZE ?= 0x01e00000
29CFG_SHMEM_START ?= 0xbfe00000
30CFG_SHMEM_SIZE ?= 0x00200000
31endif
32
33ifeq ($(PLATFORM_FLAVOR),mt8175)
34$(call force,CFG_TEE_CORE_NB_CORE,4)
35$(call force,CFG_CORE_CLUSTER_SHIFT,2)
36$(call force,CFG_ARM_GICV3,y)
37$(call force,CFG_GIC,y)
38CFG_TZDRAM_START ?= 0x43200000
39CFG_TZDRAM_SIZE ?=  0x00a00000
40CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
41CFG_SHMEM_SIZE ?= 0x00200000
42endif
43
44ifeq ($(PLATFORM_FLAVOR),mt8516)
45$(call force,CFG_TEE_CORE_NB_CORE,4)
46$(call force,CFG_CORE_CLUSTER_SHIFT,2)
47CFG_TZDRAM_START ?= 0x4fd00000
48CFG_TZDRAM_SIZE ?=  0x00300000
49CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
50CFG_SHMEM_SIZE ?= 0x00200000
51endif
52
53ifeq ($(PLATFORM_FLAVOR),mt8183)
54$(call force,CFG_TEE_CORE_NB_CORE,8)
55$(call force,CFG_CORE_CLUSTER_SHIFT,2)
56$(call force,CFG_ARM_GICV3,y)
57$(call force,CFG_GIC,y)
58CFG_TZDRAM_START ?= 0x4fd00000
59CFG_TZDRAM_SIZE ?=  0x00300000
60CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
61CFG_SHMEM_SIZE ?= 0x00200000
62endif
63