1# 1GB and 512MB DDR targets do not locate secure DDR at the same place.
2flavor_dts_file-157A_DK1 = stm32mp157a-dk1.dts
3flavor_dts_file-157C_DK2 = stm32mp157c-dk2.dts
4flavor_dts_file-157C_ED1 = stm32mp157c-ed1.dts
5flavor_dts_file-157C_EV1 = stm32mp157c-ev1.dts
6
7flavorlist-cryp-512M = $(flavor_dts_file-157C_DK2)
8
9flavorlist-no_cryp-512M = $(flavor_dts_file-157A_DK1)
10
11flavorlist-cryp-1G = $(flavor_dts_file-157C_ED1) \
12		     $(flavor_dts_file-157C_EV1)
13
14flavorlist-no_cryp = $(flavorlist-no_cryp-512M)
15
16flavorlist-512M = $(flavorlist-cryp-512M) \
17		  $(flavorlist-no_cryp-512M)
18
19flavorlist-1G = $(flavorlist-cryp-1G)
20
21ifneq ($(PLATFORM_FLAVOR),)
22ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),)
23$(error Invalid platform flavor $(PLATFORM_FLAVOR))
24endif
25CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR))
26endif
27
28ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_cryp)),)
29$(call force,CFG_STM32_CRYP,n)
30endif
31
32include core/arch/arm/cpu/cortex-a7.mk
33
34$(call force,CFG_BOOT_SECONDARY_REQUEST,y)
35$(call force,CFG_DRIVERS_CLK,y)
36$(call force,CFG_DRIVERS_CLK_FIXED,n)
37$(call force,CFG_GIC,y)
38$(call force,CFG_INIT_CNTVOFF,y)
39$(call force,CFG_PSCI_ARM32,y)
40$(call force,CFG_SECONDARY_INIT_CNTFRQ,y)
41$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
42$(call force,CFG_SM_PLATFORM_HANDLER,y)
43$(call force,CFG_WITH_SOFTWARE_PRNG,y)
44
45ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),)
46CFG_TZDRAM_START ?= 0xde000000
47CFG_SHMEM_START  ?= 0xdfe00000
48CFG_DRAM_SIZE    ?= 0x20000000
49endif
50
51CFG_TZSRAM_START ?= 0x2ffc0000
52CFG_TZSRAM_SIZE  ?= 0x0003f000
53CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000
54CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000
55CFG_TZDRAM_START ?= 0xfe000000
56CFG_TZDRAM_SIZE  ?= 0x01e00000
57CFG_SHMEM_START  ?= 0xffe00000
58CFG_SHMEM_SIZE   ?= 0x00200000
59CFG_DRAM_SIZE    ?= 0x40000000
60
61CFG_TEE_CORE_NB_CORE ?= 2
62CFG_WITH_PAGER ?= y
63CFG_WITH_LPAE ?= y
64CFG_MMAP_REGIONS ?= 23
65CFG_DTB_MAX_SIZE ?= (256 * 1024)
66
67ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),)
68# Some drivers mandate DT support
69$(call force,CFG_DRIVERS_CLK_DT,n)
70$(call force,CFG_STM32_CRYP,n)
71$(call force,CFG_STM32_GPIO,n)
72$(call force,CFG_STM32_I2C,n)
73$(call force,CFG_STPMIC1,n)
74$(call force,CFG_STM32MP1_SCMI_SIP,n)
75$(call force,CFG_SCMI_PTA,n)
76else
77$(call force,CFG_DRIVERS_CLK_DT,y)
78endif
79
80CFG_STM32_BSEC ?= y
81CFG_STM32_CRYP ?= y
82CFG_STM32_ETZPC ?= y
83CFG_STM32_GPIO ?= y
84CFG_STM32_I2C ?= y
85CFG_STM32_RNG ?= y
86CFG_STM32_UART ?= y
87$(call force,CFG_STM32MP15_CLK,y)
88CFG_STPMIC1 ?= y
89CFG_TZC400 ?= y
90
91ifeq ($(CFG_STPMIC1),y)
92$(call force,CFG_STM32_I2C,y)
93$(call force,CFG_STM32_GPIO,y)
94endif
95
96# if any crypto driver is enabled, enable the crypto-framework layer
97ifeq ($(call cfg-one-enabled, CFG_STM32_CRYP),y)
98$(call force,CFG_STM32_CRYPTO_DRIVER,y)
99endif
100
101# Platform specific configuration
102CFG_STM32MP_PANIC_ON_TZC_PERM_VIOLATION ?= y
103
104# SiP/OEM service for non-secure world
105CFG_STM32_BSEC_SIP ?= y
106CFG_STM32MP1_SCMI_SIP ?= y
107ifeq ($(CFG_STM32MP1_SCMI_SIP),y)
108$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_STM32MP1_SCMI_SIP)
109$(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y,Mandated by CFG_STM32MP1_SCMI_SIP)
110endif
111
112# Default enable SCMI PTA support
113CFG_SCMI_PTA ?= y
114ifeq ($(CFG_SCMI_PTA),y)
115$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_SCMI_PTA)
116$(call force,CFG_SCMI_MSG_SMT_THREAD_ENTRY,y,Mandated by CFG_SCMI_PTA)
117endif
118
119CFG_SCMI_MSG_DRIVERS ?= n
120ifeq ($(CFG_SCMI_MSG_DRIVERS),y)
121$(call force,CFG_SCMI_MSG_CLOCK,y)
122$(call force,CFG_SCMI_MSG_RESET_DOMAIN,y)
123$(call force,CFG_SCMI_MSG_SMT,y)
124$(call force,CFG_SCMI_MSG_VOLTAGE_DOMAIN,y)
125endif
126
127# Default enable some test facitilites
128CFG_ENABLE_EMBEDDED_TESTS ?= y
129CFG_WITH_STATS ?= y
130
131# Default disable some support for pager memory size constraint
132ifeq ($(CFG_WITH_PAGER),y)
133CFG_TEE_CORE_DEBUG ?= n
134CFG_UNWIND ?= n
135CFG_LOCKDEP ?= n
136CFG_CORE_ASLR ?= n
137CFG_TA_BGET_TEST ?= n
138endif
139
140# Non-secure UART and GPIO/pinctrl for the output console
141CFG_WITH_NSEC_GPIOS ?= y
142CFG_WITH_NSEC_UARTS ?= y
143# UART instance used for early console (0 disables early console)
144CFG_STM32_EARLY_CONSOLE_UART ?= 4
145