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681000000000e050080 g O .bss 0000000000000200 percpu_data 682000000000e044a38 g F .text 00000000000000a0 qemu_configure_mmu_el3 683000000000e0440c0 g F .text 000000000000003c psci_register_spd_pm_hook 684000000000e042244 g F .text 0000000000000004 gicv3_rdistif_on 685000000000e044b74 g F .text 000000000000001c qemu_pwr_gic_off 686000000000e041150 g F .text 0000000000000020 spin_lock 687000000000e041ae0 g F .text 000000000000002c console_is_registered 688000000000e042074 g F .text 000000000000000c gicv3_get_pending_interrupt_type 689000000000e040e00 g F .text 0000000000000024 opteed_exit_sp 690000000000e041e84 g F .text 0000000000000020 gicr_set_isenabler 691000000000e0440ac g F .text 0000000000000014 psci_query_sys_suspend_pwrstate 692000000000e045160 g F .text 0000000000000094 tf_log 693000000000e041e44 g F .text 0000000000000028 gicr_set_igrpmodr 694000000000e0478a0 g .rodata 0000000000000000 __pubsub_psci_cpu_on_finish_start 695000000000e04054c g F .text 0000000000000054 console_pl011_register 696000000000e047750 g .rodata 0000000000000000 __FCONF_POPULATOR_START__ 697000000000e04083c g F .text 0000000000000014 cpu_rev_var_ls 698000000000e041c78 g F .text 0000000000000030 get_scr_el3_from_routing_model 699000000000e05a000 g coherent_ram 0000000000000000 __RW_END__ 700000000000e059040 g coherent_ram 0000000000000000 __COHERENT_RAM_END_UNALIGNED__ 701000000000e0414d8 g F .text 0000000000000020 bl31_platform_setup 702000000000e048080 g stacks 0000000000000000 __STACKS_START__ 703000000000e051600 g O .bss 0000000000001480 opteed_sp_context 704000000000e043b3c g F .text 0000000000000194 psci_do_state_coordination 705000000000e044700 g F .text 00000000000000a4 psci_system_reset2 706000000000e041c00 g F .text 0000000000000048 enable_mmu_el3 707000000000e046780 g F .text 0000000000000000 serror_aarch32 708000000000e040e68 w F .text 0000000000000004 plat_handle_double_fault 709000000000e052f80 g .bss 0000000000000000 __PMF_TIMESTAMP_END__ 710000000000e042f50 g F .text 0000000000000030 opteed_synchronous_sp_entry 711000000000e042504 g F .text 0000000000000100 init_xlat_tables_ctx 712000000000e0478a0 g .rodata 0000000000000000 __pubsub_psci_suspend_pwrdown_finish_start 713000000000e0423fc g F .text 0000000000000098 gicv3_spis_config_defaults 714000000000e041ccc g F .text 0000000000000024 gicd_clr_igrpmodr 715000000000e040e70 g F .text 0000000000000008 plat_my_core_pos 716000000000e042248 g F .text 00000000000000cc gicv3_secure_ppi_sgi_config_props 717000000000e044cf0 g F .text 0000000000000130 runtime_svc_init 718000000000e046480 g F .text 0000000000000000 irq_aarch64 719000000000e044010 g F .text 0000000000000018 psci_migrate_info_type 720000000000e043244 w F .text 0000000000000008 plat_get_soc_version 721000000000e043ef0 g F .text 0000000000000048 psci_mem_chk_range 722000000000e040984 w .text 0000000000000000 el3_panic 723000000000e041ca8 g F .text 0000000000000024 gicd_clr_igroupr 724000000000e044c88 g F .text 0000000000000068 register_interrupt_type_handler 725000000000e052ae8 g O .bss 0000000000000008 gicv3_driver_data 726000000000e04583c g F .text 0000000000000004 xlat_mmap_print 727000000000e042494 g F .text 000000000000000c gpio_init 728000000000e043380 g F .text 000000000000006c psci_acquire_pwr_domain_locks 729000000000e0478a0 g .rodata 0000000000000000 __pubsub_psci_cpu_on_finish_end 730000000000e040a1c g F .text 00000000000000cc el1_sysregs_context_restore 731000000000e052ca0 g O .bss 0000000000000008 console_list 732000000000e044154 g F .text 00000000000000ac psci_set_pwr_domains_to_run 733000000000e041ef8 g F .text 000000000000008c gicv3_cpuif_enable 734000000000e041d98 g F .text 0000000000000014 gicd_write_igroupr 735000000000e040fb4 g .text 0000000000000000 report_unhandled_interrupt 736000000000e046700 g F .text 0000000000000000 fiq_aarch32 737000000000e040e4c w F .text 000000000000001c plat_get_my_stack 738000000000e042728 g F .text 0000000000000034 mmap_add_region 739000000000e040000 g .text 0000000000000000 __TEXT_START__ 740000000000e0430b8 g F .text 0000000000000010 pl061_gpio_register 741000000000e047750 g .rodata 0000000000000000 __PARSER_LIB_DESCS_START__ 742000000000e052ba0 g O .bss 0000000000000008 psci_spd_pm 743 744 745 746Disassembly of section .text: 747 748000000000e040000 <bl31_entrypoint>: 749 e040000: aa0003f4 mov x20, x0 750 e040004: aa0103f5 mov x21, x1 751 e040008: aa0203f6 mov x22, x2 752 e04000c: aa0303f7 mov x23, x3 753 e040010: 1002ff80 adr x0, e046000 <sync_exception_sp_el0> 754 e040014: d51ec000 msr vbar_el3, x0 755 e040018: d5033fdf isb 756 e04001c: 940003e7 bl e040fb8 <reset_handler> 757 e040020: d2820141 mov x1, #0x100a // #4106 758 e040024: d53e1000 mrs x0, sctlr_el3 759 e040028: aa010000 orr x0, x0, x1 760 e04002c: d51e1000 msr sctlr_el3, x0 761 e040030: d5033fdf isb 762 e040034: 9400034e bl e040d6c <init_cpu_data_ptr> 763 e040038: d2804700 mov x0, #0x238 // #568 764 e04003c: d51e1100 msr scr_el3, x0 765 e040040: d2900000 mov x0, #0x8000 // #32768 766 e040044: f2a01020 movk x0, #0x81, lsl #16 767 e040048: f2c00080 movk x0, #0x4, lsl #32 768 e04004c: d5380501 mrs x1, id_aa64dfr0_el1 769 e040050: d368ac21 ubfx x1, x1, #40, #4 770 e040054: b4000041 cbz x1, e04005c <bl31_entrypoint+0x5c> 771 e040058: b26d0000 orr x0, x0, #0x80000 772 e04005c: d51e1320 msr mdcr_el3, x0 773 e040060: d2801c00 mov x0, #0xe0 // #224 774 e040064: d51b9c00 msr pmcr_el0, x0 775 e040068: d50344ff msr daifclr, #0x4 776 e04006c: d2a80000 mov x0, #0x40000000 // #1073741824 777 e040070: d5380501 mrs x1, id_aa64dfr0_el1 778 e040074: d3441c21 ubfx x1, x1, #4, #4 779 e040078: b4000041 cbz x1, e040080 <bl31_entrypoint+0x80> 780 e04007c: b26c0000 orr x0, x0, #0x100000 781 e040080: d51e1140 msr cptr_el3, x0 782 e040084: d5380400 mrs x0, id_aa64pfr0_el1 783 e040088: d370cc00 ubfx x0, x0, #48, #4 784 e04008c: f100041f cmp x0, #0x1 785 e040090: 54000061 b.ne e04009c <bl31_entrypoint+0x9c> // b.any 786 e040094: d2a02000 mov x0, #0x1000000 // #16777216 787 e040098: d51b42a0 msr dit, x0 788 e04009c: 90000040 adrp x0, e048000 <tf_xlat_ctx> 789 e0400a0: 91000000 add x0, x0, #0x0 790 e0400a4: d00000c1 adrp x1, e05a000 <__BL31_END__> 791 e0400a8: 91000021 add x1, x1, #0x0 792 e0400ac: cb000021 sub x1, x1, x0 793 e0400b0: 9400033c bl e040da0 <inv_dcache_range> 794 e0400b4: 90000080 adrp x0, e050000 <__STACKS_START__+0x7f80> 795 e0400b8: 91020000 add x0, x0, #0x80 796 e0400bc: d0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 797 e0400c0: 913e8021 add x1, x1, #0xfa0 798 e0400c4: cb000021 sub x1, x1, x0 799 e0400c8: 9400042c bl e041178 <zeromem> 800 e0400cc: b00000c0 adrp x0, e059000 <psci_locks> 801 e0400d0: 91000000 add x0, x0, #0x0 802 e0400d4: b00000c1 adrp x1, e059000 <psci_locks> 803 e0400d8: 91010021 add x1, x1, #0x40 804 e0400dc: cb000021 sub x1, x1, x0 805 e0400e0: 94000426 bl e041178 <zeromem> 806 e0400e4: d50040bf msr spsel, #0x0 807 e0400e8: 94000378 bl e040ec8 <plat_set_my_stack> 808 e0400ec: aa1403e0 mov x0, x20 809 e0400f0: aa1503e1 mov x1, x21 810 e0400f4: aa1603e2 mov x2, x22 811 e0400f8: aa1703e3 mov x3, x23 812 e0400fc: 9400051a bl e041564 <bl31_setup> 813 e040100: 940004ba bl e0413e8 <bl31_main> 814 e040104: 90000040 adrp x0, e048000 <tf_xlat_ctx> 815 e040108: 91000000 add x0, x0, #0x0 816 e04010c: 90000041 adrp x1, e048000 <tf_xlat_ctx> 817 e040110: 9101b021 add x1, x1, #0x6c 818 e040114: cb000021 sub x1, x1, x0 819 e040118: 940000cf bl e040454 <clean_dcache_range> 820 e04011c: 90000080 adrp x0, e050000 <__STACKS_START__+0x7f80> 821 e040120: 91020000 add x0, x0, #0x80 822 e040124: d0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 823 e040128: 913e8021 add x1, x1, #0xfa0 824 e04012c: cb000021 sub x1, x1, x0 825 e040130: 940000c9 bl e040454 <clean_dcache_range> 826 e040134: 140002a0 b e040bb4 <el3_exit> 827 828000000000e040138 <bl31_warm_entrypoint>: 829 e040138: 1002f640 adr x0, e046000 <sync_exception_sp_el0> 830 e04013c: d51ec000 msr vbar_el3, x0 831 e040140: d5033fdf isb 832 e040144: 9400039d bl e040fb8 <reset_handler> 833 e040148: d2820141 mov x1, #0x100a // #4106 834 e04014c: d53e1000 mrs x0, sctlr_el3 835 e040150: aa010000 orr x0, x0, x1 836 e040154: d51e1000 msr sctlr_el3, x0 837 e040158: d5033fdf isb 838 e04015c: 94000304 bl e040d6c <init_cpu_data_ptr> 839 e040160: d2804700 mov x0, #0x238 // #568 840 e040164: d51e1100 msr scr_el3, x0 841 e040168: d2900000 mov x0, #0x8000 // #32768 842 e04016c: f2a01020 movk x0, #0x81, lsl #16 843 e040170: f2c00080 movk x0, #0x4, lsl #32 844 e040174: d5380501 mrs x1, id_aa64dfr0_el1 845 e040178: d368ac21 ubfx x1, x1, #40, #4 846 e04017c: b4000041 cbz x1, e040184 <bl31_warm_entrypoint+0x4c> 847 e040180: b26d0000 orr x0, x0, #0x80000 848 e040184: d51e1320 msr mdcr_el3, x0 849 e040188: d2801c00 mov x0, #0xe0 // #224 850 e04018c: d51b9c00 msr pmcr_el0, x0 851 e040190: d50344ff msr daifclr, #0x4 852 e040194: d2a80000 mov x0, #0x40000000 // #1073741824 853 e040198: d5380501 mrs x1, id_aa64dfr0_el1 854 e04019c: d3441c21 ubfx x1, x1, #4, #4 855 e0401a0: b4000041 cbz x1, e0401a8 <bl31_warm_entrypoint+0x70> 856 e0401a4: b26c0000 orr x0, x0, #0x100000 857 e0401a8: d51e1140 msr cptr_el3, x0 858 e0401ac: d5380400 mrs x0, id_aa64pfr0_el1 859 e0401b0: d370cc00 ubfx x0, x0, #48, #4 860 e0401b4: f100041f cmp x0, #0x1 861 e0401b8: 54000061 b.ne e0401c4 <bl31_warm_entrypoint+0x8c> // b.any 862 e0401bc: d2a02000 mov x0, #0x1000000 // #16777216 863 e0401c0: d51b42a0 msr dit, x0 864 e0401c4: d50040bf msr spsel, #0x0 865 e0401c8: 94000340 bl e040ec8 <plat_set_my_stack> 866 e0401cc: d2800020 mov x0, #0x1 // #1 867 e0401d0: 9400008a bl e0403f8 <bl31_plat_enable_mmu> 868 e0401d4: 940011e0 bl e044954 <psci_warmboot_entrypoint> 869 e0401d8: 14000277 b e040bb4 <el3_exit> 870 871000000000e0401dc <arm_arch_svc_smc_handler>: 872 e0401dc: a9be7bfd stp x29, x30, [sp, #-32]! 873 e0401e0: 2a0003e2 mov w2, w0 874 e0401e4: aa0103e0 mov x0, x1 875 e0401e8: 910003fd mov x29, sp 876 e0401ec: 52800041 mov w1, #0x2 // #2 877 e0401f0: f9000bf3 str x19, [sp, #16] 878 e0401f4: 72b00001 movk w1, #0x8000, lsl #16 879 e0401f8: aa0603f3 mov x19, x6 880 e0401fc: 6b01005f cmp w2, w1 881 e040200: 54000740 b.eq e0402e8 <arm_arch_svc_smc_handler+0x10c> // b.none 882 e040204: 32010be1 mov w1, #0x80000003 // #-2147483645 883 e040208: 6b01005f cmp w2, w1 884 e04020c: 540001a2 b.cs e040240 <arm_arch_svc_smc_handler+0x64> // b.hs, b.nlast 885 e040210: 52b00001 mov w1, #0x80000000 // #-2147483648 886 e040214: 6b01005f cmp w2, w1 887 e040218: 54000260 b.eq e040264 <arm_arch_svc_smc_handler+0x88> // b.none 888 e04021c: 320107e1 mov w1, #0x80000001 // #-2147483647 889 e040220: 6b01005f cmp w2, w1 890 e040224: 54000280 b.eq e040274 <arm_arch_svc_smc_handler+0x98> // b.none 891 e040228: 2a0203e1 mov w1, w2 892 e04022c: f0000020 adrp x0, e047000 <__TEXT_END__> 893 e040230: 91131400 add x0, x0, #0x4c5 894 e040234: 940013cb bl e045160 <tf_log> 895 e040238: 92800000 mov x0, #0xffffffffffffffff // #-1 896 e04023c: 1400000c b e04026c <arm_arch_svc_smc_handler+0x90> 897 e040240: 52900020 mov w0, #0x8001 // #32769 898 e040244: 72afffe0 movk w0, #0x7fff, lsl #16 899 e040248: 0b000040 add w0, w2, w0 900 e04024c: 7100041f cmp w0, #0x1 901 e040250: 54fffec8 b.hi e040228 <arm_arch_svc_smc_handler+0x4c> // b.pmore 902 e040254: aa1303e0 mov x0, x19 903 e040258: f9400bf3 ldr x19, [sp, #16] 904 e04025c: a8c27bfd ldp x29, x30, [sp], #32 905 e040260: d65f03c0 ret 906 e040264: d2800040 mov x0, #0x2 // #2 907 e040268: f2a00020 movk x0, #0x1, lsl #16 908 e04026c: f9000260 str x0, [x19] 909 e040270: 17fffff9 b e040254 <arm_arch_svc_smc_handler+0x78> 910 e040274: 32013fe1 mov w1, #0x80007fff // #-2147450881 911 e040278: eb01001f cmp x0, x1 912 e04027c: 54000320 b.eq e0402e0 <arm_arch_svc_smc_handler+0x104> // b.none 913 e040280: 540001e8 b.hi e0402bc <arm_arch_svc_smc_handler+0xe0> // b.pmore 914 e040284: 320107e1 mov w1, #0x80000001 // #-2147483647 915 e040288: eb01001f cmp x0, x1 916 e04028c: 540000c8 b.hi e0402a4 <arm_arch_svc_smc_handler+0xc8> // b.pmore 917 e040290: b2407be1 mov x1, #0x7fffffff // #2147483647 918 e040294: eb01001f cmp x0, x1 919 e040298: 5a9f83e0 csetm w0, ls // ls = plast 920 e04029c: 93407c00 sxtw x0, w0 921 e0402a0: 17fffff3 b e04026c <arm_arch_svc_smc_handler+0x90> 922 e0402a4: d2800041 mov x1, #0x2 // #2 923 e0402a8: f2b00001 movk x1, #0x8000, lsl #16 924 e0402ac: eb01001f cmp x0, x1 925 e0402b0: 54000140 b.eq e0402d8 <arm_arch_svc_smc_handler+0xfc> // b.none 926 e0402b4: 12800000 mov w0, #0xffffffff // #-1 927 e0402b8: 17fffff9 b e04029c <arm_arch_svc_smc_handler+0xc0> 928 e0402bc: 320183e1 mov w1, #0x80008000 // #-2147450880 929 e0402c0: eb01001f cmp x0, x1 930 e0402c4: 54ffff81 b.ne e0402b4 <arm_arch_svc_smc_handler+0xd8> // b.any 931 e0402c8: 9400005b bl e040434 <check_wa_cve_2017_5715> 932 e0402cc: 7100001f cmp w0, #0x0 933 e0402d0: 1a9f17e0 cset w0, eq // eq = none 934 e0402d4: 17fffff2 b e04029c <arm_arch_svc_smc_handler+0xc0> 935 e0402d8: 94000c09 bl e0432fc <plat_is_smccc_feature_available> 936 e0402dc: 17fffff0 b e04029c <arm_arch_svc_smc_handler+0xc0> 937 e0402e0: 12800020 mov w0, #0xfffffffe // #-2 938 e0402e4: 17ffffee b e04029c <arm_arch_svc_smc_handler+0xc0> 939 e0402e8: f100041f cmp x0, #0x1 940 e0402ec: 54000061 b.ne e0402f8 <arm_arch_svc_smc_handler+0x11c> // b.any 941 e0402f0: 94000bd3 bl e04323c <plat_get_soc_revision> 942 e0402f4: 17ffffea b e04029c <arm_arch_svc_smc_handler+0xc0> 943 e0402f8: b5000060 cbnz x0, e040304 <arm_arch_svc_smc_handler+0x128> 944 e0402fc: 94000bd2 bl e043244 <plat_get_soc_version> 945 e040300: 17ffffe7 b e04029c <arm_arch_svc_smc_handler+0xc0> 946 e040304: 12800040 mov w0, #0xfffffffd // #-3 947 e040308: 17ffffe5 b e04029c <arm_arch_svc_smc_handler+0xc0> 948 949000000000e04030c <_cpu_data_by_index>: 950 e04030c: d2800801 mov x1, #0x40 // #64 951 e040310: 9b017c00 mul x0, x0, x1 952 e040314: 90000081 adrp x1, e050000 <__STACKS_START__+0x7f80> 953 e040318: 91020021 add x1, x1, #0x80 954 e04031c: 8b010000 add x0, x0, x1 955 e040320: d65f03c0 ret 956 957000000000e040324 <a53_disable_non_temporal_hint>: 958 e040324: aa1e03f1 mov x17, x30 959 e040328: 94000041 bl e04042c <check_errata_disable_non_temporal_hint> 960 e04032c: b4000080 cbz x0, e04033c <a53_disable_non_temporal_hint+0x18> 961 e040330: d539f201 mrs x1, s3_1_c15_c2_0 962 e040334: b2680021 orr x1, x1, #0x1000000 963 e040338: d519f201 msr s3_1_c15_c2_0, x1 964 e04033c: d65f0220 ret x17 965 966000000000e040340 <a57_disable_ldnp_overread>: 967 e040340: aa1e03f1 mov x17, x30 968 e040344: 94000038 bl e040424 <check_errata_disable_ldnp_overread> 969 e040348: b4000080 cbz x0, e040358 <a57_disable_ldnp_overread+0x18> 970 e04034c: d539f201 mrs x1, s3_1_c15_c2_0 971 e040350: b24c0021 orr x1, x1, #0x10000000000000 972 e040354: d519f201 msr s3_1_c15_c2_0, x1 973 e040358: d65f0220 ret x17 974 975000000000e04035c <aem_generic_cluster_pwr_dwn>: 976 e04035c: d53e1001 mrs x1, sctlr_el3 977 e040360: 927df821 and x1, x1, #0xfffffffffffffffb 978 e040364: d51e1001 msr sctlr_el3, x1 979 e040368: d5033fdf isb 980 e04036c: d2800020 mov x0, #0x1 // #1 981 e040370: 14000138 b e040850 <dcsw_op_all> 982 983000000000e040374 <aem_generic_core_pwr_dwn>: 984 e040374: d53e1001 mrs x1, sctlr_el3 985 e040378: 927df821 and x1, x1, #0xfffffffffffffffb 986 e04037c: d51e1001 msr sctlr_el3, x1 987 e040380: d5033fdf isb 988 e040384: d5390021 mrs x1, clidr_el1 989 e040388: f27a083f tst x1, #0x1c0 990 e04038c: d2800020 mov x0, #0x1 // #1 991 e040390: 540026a0 b.eq e040864 <dcsw_op_level1> // b.none 992 e040394: aa1e03f2 mov x18, x30 993 e040398: 94000133 bl e040864 <dcsw_op_level1> 994 e04039c: aa1203fe mov x30, x18 995 e0403a0: d2800020 mov x0, #0x1 // #1 996 e0403a4: 14000134 b e040874 <dcsw_op_level2> 997 998000000000e0403a8 <asm_print_hex>: 999 e0403a8: d2800805 mov x5, #0x40 // #64 1000 1001000000000e0403ac <asm_print_hex_bits>: 1002 e0403ac: aa1e03e3 mov x3, x30 1003 e0403b0: d10010a5 sub x5, x5, #0x4 1004 e0403b4: 9ac52480 lsr x0, x4, x5 1005 e0403b8: 92400c00 and x0, x0, #0xf 1006 e0403bc: f100281f cmp x0, #0xa 1007 e0403c0: 54000043 b.cc e0403c8 <asm_print_hex_bits+0x1c> // b.lo, b.ul, b.last 1008 e0403c4: 91009c00 add x0, x0, #0x27 1009 e0403c8: 9100c000 add x0, x0, #0x30 1010 e0403cc: 9400029d bl e040e40 <plat_crash_console_putc> 1011 e0403d0: b5ffff05 cbnz x5, e0403b0 <asm_print_hex_bits+0x4> 1012 e0403d4: d65f0060 ret x3 1013 1014000000000e0403d8 <asm_print_newline>: 1015 e0403d8: d2800140 mov x0, #0xa // #10 1016 e0403dc: 14000299 b e040e40 <plat_crash_console_putc> 1017 1018000000000e0403e0 <asm_print_str>: 1019 e0403e0: aa1e03e3 mov x3, x30 1020 e0403e4: 38401480 ldrb w0, [x4], #1 1021 e0403e8: b4000060 cbz x0, e0403f4 <asm_print_str+0x14> 1022 e0403ec: 94000295 bl e040e40 <plat_crash_console_putc> 1023 e0403f0: 17fffffd b e0403e4 <asm_print_str+0x4> 1024 e0403f4: d65f0060 ret x3 1025 1026000000000e0403f8 <bl31_plat_enable_mmu>: 1027 e0403f8: 14000204 b e040c08 <enable_mmu_direct_el3> 1028 1029000000000e0403fc <check_errata_cve_2017_5715>: 1030 e0403fc: d2800020 mov x0, #0x1 // #1 1031 e040400: d65f03c0 ret 1032 1033000000000e040404 <check_errata_cve_2017_5715>: 1034 e040404: d5380400 mrs x0, id_aa64pfr0_el1 1035 e040408: d378ec00 ubfx x0, x0, #56, #4 1036 e04040c: f100001f cmp x0, #0x0 1037 e040410: 54000061 b.ne e04041c <check_errata_cve_2017_5715+0x18> // b.any 1038 e040414: d2800020 mov x0, #0x1 // #1 1039 e040418: d65f03c0 ret 1040 e04041c: d2800000 mov x0, #0x0 // #0 1041 e040420: d65f03c0 ret 1042 1043000000000e040424 <check_errata_disable_ldnp_overread>: 1044 e040424: d2800241 mov x1, #0x12 // #18 1045 e040428: 14000105 b e04083c <cpu_rev_var_ls> 1046 1047000000000e04042c <check_errata_disable_non_temporal_hint>: 1048 e04042c: d2800061 mov x1, #0x3 // #3 1049 e040430: 14000103 b e04083c <cpu_rev_var_ls> 1050 1051000000000e040434 <check_wa_cve_2017_5715>: 1052 e040434: d53ed040 mrs x0, tpidr_el3 1053 e040438: f9400800 ldr x0, [x0, #16] 1054 e04043c: f9400800 ldr x0, [x0, #16] 1055 e040440: f100001f cmp x0, #0x0 1056 e040444: 54000040 b.eq e04044c <check_wa_cve_2017_5715+0x18> // b.none 1057 e040448: d61f0000 br x0 1058 e04044c: d2800000 mov x0, #0x0 // #0 1059 e040450: d65f03c0 ret 1060 1061000000000e040454 <clean_dcache_range>: 1062 e040454: b40001a1 cbz x1, e040488 <exit_loop_cvac> 1063 e040458: d53b0023 mrs x3, ctr_el0 1064 e04045c: d3504c63 ubfx x3, x3, #16, #4 1065 e040460: d2800082 mov x2, #0x4 // #4 1066 e040464: 9ac32042 lsl x2, x2, x3 1067 e040468: 8b010001 add x1, x0, x1 1068 e04046c: d1000443 sub x3, x2, #0x1 1069 e040470: 8a230000 bic x0, x0, x3 1070 1071000000000e040474 <loop_cvac>: 1072 e040474: d50b7a20 dc cvac, x0 1073 e040478: 8b020000 add x0, x0, x2 1074 e04047c: eb01001f cmp x0, x1 1075 e040480: 54ffffa3 b.cc e040474 <loop_cvac> // b.lo, b.ul, b.last 1076 e040484: d5033f9f dsb sy 1077 1078000000000e040488 <exit_loop_cvac>: 1079 e040488: d65f03c0 ret 1080 1081000000000e04048c <console_pl011_core_flush>: 1082 e04048c: b9401801 ldr w1, [x0, #24] 1083 e040490: 371fffe1 tbnz w1, #3, e04048c <console_pl011_core_flush> 1084 e040494: d65f03c0 ret 1085 1086000000000e040498 <console_pl011_core_getc>: 1087 e040498: b9401801 ldr w1, [x0, #24] 1088 e04049c: 37200081 tbnz w1, #4, e0404ac <no_char> 1089 e0404a0: b9400001 ldr w1, [x0] 1090 e0404a4: 2a0103e0 mov w0, w1 1091 e0404a8: d65f03c0 ret 1092 1093000000000e0404ac <no_char>: 1094 e0404ac: 12800000 mov w0, #0xffffffff // #-1 1095 e0404b0: d65f03c0 ret 1096 1097000000000e0404b4 <console_pl011_core_init>: 1098 e0404b4: b4000280 cbz x0, e040504 <core_init_fail> 1099 e0404b8: 34000261 cbz w1, e040504 <core_init_fail> 1100 e0404bc: 34000242 cbz w2, e040504 <core_init_fail> 1101 e0404c0: b9403003 ldr w3, [x0, #48] 1102 e0404c4: 52800024 mov w4, #0x1 // #1 1103 e0404c8: 0a240063 bic w3, w3, w4 1104 e0404cc: b9003003 str w3, [x0, #48] 1105 e0404d0: 531e7421 lsl w1, w1, #2 1106 e0404d4: 1ac20822 udiv w2, w1, w2 1107 e0404d8: 53067c41 lsr w1, w2, #6 1108 e0404dc: b9002401 str w1, [x0, #36] 1109 e0404e0: 12001441 and w1, w2, #0x3f 1110 e0404e4: b9002801 str w1, [x0, #40] 1111 e0404e8: 52800e01 mov w1, #0x70 // #112 1112 e0404ec: b9002c01 str w1, [x0, #44] 1113 e0404f0: b900041f str wzr, [x0, #4] 1114 e0404f4: 52806021 mov w1, #0x301 // #769 1115 e0404f8: b9003001 str w1, [x0, #48] 1116 e0404fc: 52800020 mov w0, #0x1 // #1 1117 e040500: d65f03c0 ret 1118 1119000000000e040504 <core_init_fail>: 1120 e040504: 2a1f03e0 mov w0, wzr 1121 e040508: d65f03c0 ret 1122 1123000000000e04050c <console_pl011_core_putc>: 1124 e04050c: 7100281f cmp w0, #0xa 1125 e040510: 540000a1 b.ne e040524 <console_pl011_core_putc+0x18> // b.any 1126 e040514: b9401822 ldr w2, [x1, #24] 1127 e040518: 372fffe2 tbnz w2, #5, e040514 <console_pl011_core_putc+0x8> 1128 e04051c: 528001a2 mov w2, #0xd // #13 1129 e040520: b9000022 str w2, [x1] 1130 e040524: b9401822 ldr w2, [x1, #24] 1131 e040528: 372fffe2 tbnz w2, #5, e040524 <console_pl011_core_putc+0x18> 1132 e04052c: b9000020 str w0, [x1] 1133 e040530: d65f03c0 ret 1134 1135000000000e040534 <console_pl011_flush>: 1136 e040534: f9401400 ldr x0, [x0, #40] 1137 e040538: 17ffffd5 b e04048c <console_pl011_core_flush> 1138 1139000000000e04053c <console_pl011_getc>: 1140 e04053c: f9401400 ldr x0, [x0, #40] 1141 e040540: 17ffffd6 b e040498 <console_pl011_core_getc> 1142 1143000000000e040544 <console_pl011_putc>: 1144 e040544: f9401421 ldr x1, [x1, #40] 1145 e040548: 17fffff1 b e04050c <console_pl011_core_putc> 1146 1147000000000e04054c <console_pl011_register>: 1148 e04054c: aa1e03e7 mov x7, x30 1149 e040550: aa0303e6 mov x6, x3 1150 e040554: b4000246 cbz x6, e04059c <register_fail> 1151 e040558: f90014c0 str x0, [x6, #40] 1152 e04055c: 97ffffd6 bl e0404b4 <console_pl011_core_init> 1153 e040560: b40001e0 cbz x0, e04059c <register_fail> 1154 e040564: aa0603e0 mov x0, x6 1155 e040568: aa0703fe mov x30, x7 1156 e04056c: 90000001 adrp x1, e040000 <bl31_entrypoint> 1157 e040570: 91151021 add x1, x1, #0x544 1158 e040574: f9000801 str x1, [x0, #16] 1159 e040578: 90000001 adrp x1, e040000 <bl31_entrypoint> 1160 e04057c: 9114f021 add x1, x1, #0x53c 1161 e040580: f9000c01 str x1, [x0, #24] 1162 e040584: 90000001 adrp x1, e040000 <bl31_entrypoint> 1163 e040588: 9114d021 add x1, x1, #0x534 1164 e04058c: f9001001 str x1, [x0, #32] 1165 e040590: d28000a1 mov x1, #0x5 // #5 1166 e040594: f9000401 str x1, [x0, #8] 1167 e040598: 14000584 b e041ba8 <console_register> 1168 1169000000000e04059c <register_fail>: 1170 e04059c: d65f00e0 ret x7 1171 1172000000000e0405a0 <cortex_a53_cluster_pwr_dwn>: 1173 e0405a0: aa1e03f2 mov x18, x30 1174 e0405a4: 9400000e bl e0405dc <cortex_a53_disable_dcache> 1175 e0405a8: d2800020 mov x0, #0x1 // #1 1176 e0405ac: 940000ae bl e040864 <dcsw_op_level1> 1177 e0405b0: 94000226 bl e040e48 <plat_disable_acp> 1178 e0405b4: d2800020 mov x0, #0x1 // #1 1179 e0405b8: 940000af bl e040874 <dcsw_op_level2> 1180 e0405bc: aa1203fe mov x30, x18 1181 e0405c0: 1400000c b e0405f0 <cortex_a53_disable_smp> 1182 1183000000000e0405c4 <cortex_a53_core_pwr_dwn>: 1184 e0405c4: aa1e03f2 mov x18, x30 1185 e0405c8: 94000005 bl e0405dc <cortex_a53_disable_dcache> 1186 e0405cc: d2800020 mov x0, #0x1 // #1 1187 e0405d0: 940000a5 bl e040864 <dcsw_op_level1> 1188 e0405d4: aa1203fe mov x30, x18 1189 e0405d8: 14000006 b e0405f0 <cortex_a53_disable_smp> 1190 1191000000000e0405dc <cortex_a53_disable_dcache>: 1192 e0405dc: d53e1001 mrs x1, sctlr_el3 1193 e0405e0: 927df821 and x1, x1, #0xfffffffffffffffb 1194 e0405e4: d51e1001 msr sctlr_el3, x1 1195 e0405e8: d5033fdf isb 1196 e0405ec: d65f03c0 ret 1197 1198000000000e0405f0 <cortex_a53_disable_smp>: 1199 e0405f0: d539f220 mrs x0, s3_1_c15_c2_1 1200 e0405f4: 9279f800 and x0, x0, #0xffffffffffffffbf 1201 e0405f8: d519f220 msr s3_1_c15_c2_1, x0 1202 e0405fc: d5033fdf isb 1203 e040600: d5033f9f dsb sy 1204 e040604: d65f03c0 ret 1205 1206000000000e040608 <cortex_a53_reset_func>: 1207 e040608: aa1e03f3 mov x19, x30 1208 e04060c: 94000088 bl e04082c <cpu_get_rev_var> 1209 e040610: aa0003f2 mov x18, x0 1210 e040614: aa1203e0 mov x0, x18 1211 e040618: 97ffff43 bl e040324 <a53_disable_non_temporal_hint> 1212 e04061c: d539f220 mrs x0, s3_1_c15_c2_1 1213 e040620: b27a0000 orr x0, x0, #0x40 1214 e040624: d519f220 msr s3_1_c15_c2_1, x0 1215 e040628: d5033fdf isb 1216 e04062c: d65f0260 ret x19 1217 1218000000000e040630 <cortex_a57_cluster_pwr_dwn>: 1219 e040630: aa1e03f2 mov x18, x30 1220 e040634: 94000012 bl e04067c <cortex_a57_disable_dcache> 1221 e040638: 9400001b bl e0406a4 <cortex_a57_disable_l2_prefetch> 1222 e04063c: d2800020 mov x0, #0x1 // #1 1223 e040640: 94000089 bl e040864 <dcsw_op_level1> 1224 e040644: 94000201 bl e040e48 <plat_disable_acp> 1225 e040648: d2800020 mov x0, #0x1 // #1 1226 e04064c: 9400008a bl e040874 <dcsw_op_level2> 1227 e040650: 9400001e bl e0406c8 <cortex_a57_disable_smp> 1228 e040654: aa1203fe mov x30, x18 1229 e040658: 1400000e b e040690 <cortex_a57_disable_ext_debug> 1230 1231000000000e04065c <cortex_a57_core_pwr_dwn>: 1232 e04065c: aa1e03f2 mov x18, x30 1233 e040660: 94000007 bl e04067c <cortex_a57_disable_dcache> 1234 e040664: 94000010 bl e0406a4 <cortex_a57_disable_l2_prefetch> 1235 e040668: d2800020 mov x0, #0x1 // #1 1236 e04066c: 9400007e bl e040864 <dcsw_op_level1> 1237 e040670: 94000016 bl e0406c8 <cortex_a57_disable_smp> 1238 e040674: aa1203fe mov x30, x18 1239 e040678: 14000006 b e040690 <cortex_a57_disable_ext_debug> 1240 1241000000000e04067c <cortex_a57_disable_dcache>: 1242 e04067c: d53e1001 mrs x1, sctlr_el3 1243 e040680: 927df821 and x1, x1, #0xfffffffffffffffb 1244 e040684: d51e1001 msr sctlr_el3, x1 1245 e040688: d5033fdf isb 1246 e04068c: d65f03c0 ret 1247 1248000000000e040690 <cortex_a57_disable_ext_debug>: 1249 e040690: d2800020 mov x0, #0x1 // #1 1250 e040694: d5101380 msr osdlr_el1, x0 1251 e040698: d5033fdf isb 1252 e04069c: d5033f9f dsb sy 1253 e0406a0: d65f03c0 ret 1254 1255000000000e0406a4 <cortex_a57_disable_l2_prefetch>: 1256 e0406a4: d539f220 mrs x0, s3_1_c15_c2_1 1257 e0406a8: b25a0000 orr x0, x0, #0x4000000000 1258 e0406ac: d2c00301 mov x1, #0x1800000000 // #103079215104 1259 e0406b0: b2600421 orr x1, x1, #0x300000000 1260 e0406b4: 8a210000 bic x0, x0, x1 1261 e0406b8: d519f220 msr s3_1_c15_c2_1, x0 1262 e0406bc: d5033fdf isb 1263 e0406c0: d5033b9f dsb ish 1264 e0406c4: d65f03c0 ret 1265 1266000000000e0406c8 <cortex_a57_disable_smp>: 1267 e0406c8: d539f220 mrs x0, s3_1_c15_c2_1 1268 e0406cc: 9279f800 and x0, x0, #0xffffffffffffffbf 1269 e0406d0: d519f220 msr s3_1_c15_c2_1, x0 1270 e0406d4: d65f03c0 ret 1271 1272000000000e0406d8 <cortex_a57_reset_func>: 1273 e0406d8: aa1e03f3 mov x19, x30 1274 e0406dc: 94000054 bl e04082c <cpu_get_rev_var> 1275 e0406e0: aa0003f2 mov x18, x0 1276 e0406e4: aa1203e0 mov x0, x18 1277 e0406e8: 97ffff16 bl e040340 <a57_disable_ldnp_overread> 1278 e0406ec: 100308a0 adr x0, e046800 <mmu_sync_exception_sp_el0> 1279 e0406f0: d51ec000 msr vbar_el3, x0 1280 e0406f4: d539f200 mrs x0, s3_1_c15_c2_0 1281 e0406f8: b2490000 orr x0, x0, #0x80000000000000 1282 e0406fc: d519f200 msr s3_1_c15_c2_0, x0 1283 e040700: d5033fdf isb 1284 e040704: d5033f9f dsb sy 1285 e040708: d539f220 mrs x0, s3_1_c15_c2_1 1286 e04070c: b27a0000 orr x0, x0, #0x40 1287 e040710: d519f220 msr s3_1_c15_c2_1, x0 1288 e040714: d5033fdf isb 1289 e040718: d65f0260 ret x19 1290 1291000000000e04071c <cortex_a72_cluster_pwr_dwn>: 1292 e04071c: aa1e03f2 mov x18, x30 1293 e040720: 94000014 bl e040770 <cortex_a72_disable_dcache> 1294 e040724: 94000023 bl e0407b0 <cortex_a72_disable_l2_prefetch> 1295 e040728: 9400001c bl e040798 <cortex_a72_disable_hw_prefetcher> 1296 e04072c: d2800020 mov x0, #0x1 // #1 1297 e040730: 9400004d bl e040864 <dcsw_op_level1> 1298 e040734: 940001c5 bl e040e48 <plat_disable_acp> 1299 e040738: d2800020 mov x0, #0x1 // #1 1300 e04073c: 9400004e bl e040874 <dcsw_op_level2> 1301 e040740: 94000024 bl e0407d0 <cortex_a72_disable_smp> 1302 e040744: aa1203fe mov x30, x18 1303 e040748: 1400000f b e040784 <cortex_a72_disable_ext_debug> 1304 1305000000000e04074c <cortex_a72_core_pwr_dwn>: 1306 e04074c: aa1e03f2 mov x18, x30 1307 e040750: 94000008 bl e040770 <cortex_a72_disable_dcache> 1308 e040754: 94000017 bl e0407b0 <cortex_a72_disable_l2_prefetch> 1309 e040758: 94000010 bl e040798 <cortex_a72_disable_hw_prefetcher> 1310 e04075c: d2800020 mov x0, #0x1 // #1 1311 e040760: 94000041 bl e040864 <dcsw_op_level1> 1312 e040764: 9400001b bl e0407d0 <cortex_a72_disable_smp> 1313 e040768: aa1203fe mov x30, x18 1314 e04076c: 14000006 b e040784 <cortex_a72_disable_ext_debug> 1315 1316000000000e040770 <cortex_a72_disable_dcache>: 1317 e040770: d53e1001 mrs x1, sctlr_el3 1318 e040774: 927df821 and x1, x1, #0xfffffffffffffffb 1319 e040778: d51e1001 msr sctlr_el3, x1 1320 e04077c: d5033fdf isb 1321 e040780: d65f03c0 ret 1322 1323000000000e040784 <cortex_a72_disable_ext_debug>: 1324 e040784: d2800020 mov x0, #0x1 // #1 1325 e040788: d5101380 msr osdlr_el1, x0 1326 e04078c: d5033fdf isb 1327 e040790: d5033f9f dsb sy 1328 e040794: d65f03c0 ret 1329 1330000000000e040798 <cortex_a72_disable_hw_prefetcher>: 1331 e040798: d539f200 mrs x0, s3_1_c15_c2_0 1332 e04079c: b2480000 orr x0, x0, #0x100000000000000 1333 e0407a0: d519f200 msr s3_1_c15_c2_0, x0 1334 e0407a4: d5033fdf isb 1335 e0407a8: d5033b9f dsb ish 1336 e0407ac: d65f03c0 ret 1337 1338000000000e0407b0 <cortex_a72_disable_l2_prefetch>: 1339 e0407b0: d539f220 mrs x0, s3_1_c15_c2_1 1340 e0407b4: b25a0000 orr x0, x0, #0x4000000000 1341 e0407b8: d2c00301 mov x1, #0x1800000000 // #103079215104 1342 e0407bc: b2600421 orr x1, x1, #0x300000000 1343 e0407c0: 8a210000 bic x0, x0, x1 1344 e0407c4: d519f220 msr s3_1_c15_c2_1, x0 1345 e0407c8: d5033fdf isb 1346 e0407cc: d65f03c0 ret 1347 1348000000000e0407d0 <cortex_a72_disable_smp>: 1349 e0407d0: d539f220 mrs x0, s3_1_c15_c2_1 1350 e0407d4: 9279f800 and x0, x0, #0xffffffffffffffbf 1351 e0407d8: d519f220 msr s3_1_c15_c2_1, x0 1352 e0407dc: d65f03c0 ret 1353 1354000000000e0407e0 <cortex_a72_reset_func>: 1355 e0407e0: aa1e03f3 mov x19, x30 1356 e0407e4: 94000012 bl e04082c <cpu_get_rev_var> 1357 e0407e8: aa0003f2 mov x18, x0 1358 e0407ec: d5380400 mrs x0, id_aa64pfr0_el1 1359 e0407f0: d378ec00 ubfx x0, x0, #56, #4 1360 e0407f4: f100001f cmp x0, #0x0 1361 e0407f8: 54000061 b.ne e040804 <cortex_a72_reset_func+0x24> // b.any 1362 e0407fc: 10030020 adr x0, e046800 <mmu_sync_exception_sp_el0> 1363 e040800: d51ec000 msr vbar_el3, x0 1364 e040804: d539f200 mrs x0, s3_1_c15_c2_0 1365 e040808: b2490000 orr x0, x0, #0x80000000000000 1366 e04080c: d519f200 msr s3_1_c15_c2_0, x0 1367 e040810: d5033fdf isb 1368 e040814: d5033f9f dsb sy 1369 e040818: d539f220 mrs x0, s3_1_c15_c2_1 1370 e04081c: b27a0000 orr x0, x0, #0x40 1371 e040820: d519f220 msr s3_1_c15_c2_1, x0 1372 e040824: d5033fdf isb 1373 e040828: d65f0260 ret x19 1374 1375000000000e04082c <cpu_get_rev_var>: 1376 e04082c: d5380001 mrs x1, midr_el1 1377 e040830: d3505c20 ubfx x0, x1, #16, #8 1378 e040834: b3400c20 bfxil x0, x1, #0, #4 1379 e040838: d65f03c0 ret 1380 1381000000000e04083c <cpu_rev_var_ls>: 1382 e04083c: d2800022 mov x2, #0x1 // #1 1383 e040840: d2800003 mov x3, #0x0 // #0 1384 e040844: eb01001f cmp x0, x1 1385 e040848: 9a839040 csel x0, x2, x3, ls // ls = plast 1386 e04084c: d65f03c0 ret 1387 1388000000000e040850 <dcsw_op_all>: 1389 e040850: d5390029 mrs x9, clidr_el1 1390 e040854: d3586923 ubfx x3, x9, #24, #3 1391 e040858: d37ff863 lsl x3, x3, #1 1392 e04085c: aa1f03ea mov x10, xzr 1393 e040860: 14000012 b e0408a8 <do_dcsw_op> 1394 1395000000000e040864 <dcsw_op_level1>: 1396 e040864: d5390029 mrs x9, clidr_el1 1397 e040868: d2800043 mov x3, #0x2 // #2 1398 e04086c: d100086a sub x10, x3, #0x2 1399 e040870: 1400000e b e0408a8 <do_dcsw_op> 1400 1401000000000e040874 <dcsw_op_level2>: 1402 e040874: d5390029 mrs x9, clidr_el1 1403 e040878: d2800083 mov x3, #0x4 // #4 1404 e04087c: d100086a sub x10, x3, #0x2 1405 e040880: 1400000a b e0408a8 <do_dcsw_op> 1406 1407000000000e040884 <delegate_async_ea>: 1408 e040884: 1400004c b e0409b4 <ea_proceed> 1409 1410000000000e040888 <delegate_sync_ea>: 1411 e040888: 1400004b b e0409b4 <ea_proceed> 1412 1413000000000e04088c <disable_mmu_el3>: 1414 e04088c: d28000a1 mov x1, #0x5 // #5 1415 1416000000000e040890 <do_disable_mmu_el3>: 1417 e040890: d53e1000 mrs x0, sctlr_el3 1418 e040894: 8a210000 bic x0, x0, x1 1419 e040898: d51e1000 msr sctlr_el3, x0 1420 e04089c: d5033fdf isb 1421 e0408a0: d5033f9f dsb sy 1422 e0408a4: d65f03c0 ret 1423 1424000000000e0408a8 <do_dcsw_op>: 1425 e0408a8: b40003c3 cbz x3, e040920 <exit> 1426 e0408ac: 100003ce adr x14, e040924 <dcsw_loop_table> 1427 e0408b0: 8b0015ce add x14, x14, x0, lsl #5 1428 e0408b4: aa0903e0 mov x0, x9 1429 e0408b8: 52800028 mov w8, #0x1 // #1 1430 1431000000000e0408bc <loop1>: 1432 e0408bc: 8b4a0542 add x2, x10, x10, lsr #1 1433 e0408c0: 9ac22401 lsr x1, x0, x2 1434 e0408c4: 92400821 and x1, x1, #0x7 1435 e0408c8: f100083f cmp x1, #0x2 1436 e0408cc: 540001e3 b.cc e040908 <level_done> // b.lo, b.ul, b.last 1437 e0408d0: d51a000a msr csselr_el1, x10 1438 e0408d4: d5033fdf isb 1439 e0408d8: d5390001 mrs x1, ccsidr_el1 1440 e0408dc: 92400822 and x2, x1, #0x7 1441 e0408e0: 91001042 add x2, x2, #0x4 1442 e0408e4: d3433024 ubfx x4, x1, #3, #10 1443 e0408e8: 5ac01085 clz w5, w4 1444 e0408ec: 1ac52089 lsl w9, w4, w5 1445 e0408f0: 1ac52110 lsl w16, w8, w5 1446 e0408f4: 2a090149 orr w9, w10, w9 1447 e0408f8: 530d6c26 ubfx w6, w1, #13, #15 1448 e0408fc: 1ac22111 lsl w17, w8, w2 1449 e040900: d5033f9f dsb sy 1450 e040904: d61f01c0 br x14 1451 1452000000000e040908 <level_done>: 1453 e040908: 9100094a add x10, x10, #0x2 1454 e04090c: eb0a007f cmp x3, x10 1455 e040910: 54fffd68 b.hi e0408bc <loop1> // b.pmore 1456 e040914: d51a001f msr csselr_el1, xzr 1457 e040918: d5033f9f dsb sy 1458 e04091c: d5033fdf isb 1459 1460000000000e040920 <exit>: 1461 e040920: d65f03c0 ret 1462 1463000000000e040924 <dcsw_loop_table>: 1464 e040924: 1ac220c7 lsl w7, w6, w2 1465 1466000000000e040928 <loop3_isw>: 1467 e040928: 2a07012b orr w11, w9, w7 1468 e04092c: d508764b dc isw, x11 1469 e040930: 6b1100e7 subs w7, w7, w17 1470 e040934: 54ffffa2 b.cs e040928 <loop3_isw> // b.hs, b.nlast 1471 e040938: eb100129 subs x9, x9, x16 1472 e04093c: 54ffff42 b.cs e040924 <dcsw_loop_table> // b.hs, b.nlast 1473 e040940: 17fffff2 b e040908 <level_done> 1474 1475000000000e040944 <loop2_cisw>: 1476 e040944: 1ac220c7 lsl w7, w6, w2 1477 1478000000000e040948 <loop3_cisw>: 1479 e040948: 2a07012b orr w11, w9, w7 1480 e04094c: d5087e4b dc cisw, x11 1481 e040950: 6b1100e7 subs w7, w7, w17 1482 e040954: 54ffffa2 b.cs e040948 <loop3_cisw> // b.hs, b.nlast 1483 e040958: eb100129 subs x9, x9, x16 1484 e04095c: 54ffff42 b.cs e040944 <loop2_cisw> // b.hs, b.nlast 1485 e040960: 17ffffea b e040908 <level_done> 1486 1487000000000e040964 <loop2_csw>: 1488 e040964: 1ac220c7 lsl w7, w6, w2 1489 1490000000000e040968 <loop3_csw>: 1491 e040968: 2a07012b orr w11, w9, w7 1492 e04096c: d5087a4b dc csw, x11 1493 e040970: 6b1100e7 subs w7, w7, w17 1494 e040974: 54ffffa2 b.cs e040968 <loop3_csw> // b.hs, b.nlast 1495 e040978: eb100129 subs x9, x9, x16 1496 e04097c: 54ffff42 b.cs e040964 <loop2_csw> // b.hs, b.nlast 1497 e040980: 17ffffe2 b e040908 <level_done> 1498 1499000000000e040984 <do_panic>: 1500 e040984: aa1e03e6 mov x6, x30 1501 e040988: 94000129 bl e040e2c <plat_crash_console_init> 1502 e04098c: b4000100 cbz x0, e0409ac <_panic_handler> 1503 e040990: 10036964 adr x4, e0476bc <panic_msg> 1504 e040994: 97fffe93 bl e0403e0 <asm_print_str> 1505 e040998: aa0603e4 mov x4, x6 1506 e04099c: d1001084 sub x4, x4, #0x4 1507 e0409a0: 97fffe82 bl e0403a8 <asm_print_hex> 1508 e0409a4: 97fffe8d bl e0403d8 <asm_print_newline> 1509 e0409a8: 9400011f bl e040e24 <plat_crash_console_flush> 1510 1511000000000e0409ac <_panic_handler>: 1512 e0409ac: aa0603fe mov x30, x6 1513 e0409b0: 14000132 b e040e78 <plat_panic_handler> 1514 1515000000000e0409b4 <ea_proceed>: 1516 e0409b4: f94087e5 ldr x5, [sp, #264] 1517 e0409b8: b4000045 cbz x5, e0409c0 <ea_proceed+0xc> 1518 e0409bc: 9400012b bl e040e68 <plat_handle_double_fault> 1519 e0409c0: d53e4002 mrs x2, spsr_el3 1520 e0409c4: d53e4023 mrs x3, elr_el3 1521 e0409c8: a9118fe2 stp x2, x3, [sp, #280] 1522 e0409cc: d53e1104 mrs x4, scr_el3 1523 e0409d0: d53e5205 mrs x5, esr_el3 1524 e0409d4: a91017e4 stp x4, x5, [sp, #256] 1525 e0409d8: aa1f03e2 mov x2, xzr 1526 e0409dc: 910003e3 mov x3, sp 1527 e0409e0: d3400084 ubfx x4, x4, #0, #1 1528 e0409e4: f9408be5 ldr x5, [sp, #272] 1529 e0409e8: d50040bf msr spsel, #0x0 1530 e0409ec: 910000bf mov sp, x5 1531 e0409f0: aa1e03fd mov x29, x30 1532 e0409f4: 940009ee bl e0431ac <plat_default_ea_handler> 1533 e0409f8: d50041bf msr spsel, #0x1 1534 e0409fc: a9518be1 ldp x1, x2, [sp, #280] 1535 e040a00: d51e4001 msr spsr_el3, x1 1536 e040a04: d51e4022 msr elr_el3, x2 1537 e040a08: a95013e3 ldp x3, x4, [sp, #256] 1538 e040a0c: d51e1103 msr scr_el3, x3 1539 e040a10: d51e5204 msr esr_el3, x4 1540 e040a14: f90087ff str xzr, [sp, #264] 1541 e040a18: d65f03a0 ret x29 1542 1543000000000e040a1c <el1_sysregs_context_restore>: 1544 e040a1c: a9402809 ldp x9, x10, [x0] 1545 e040a20: d5184009 msr spsr_el1, x9 1546 e040a24: d518402a msr elr_el1, x10 1547 e040a28: a941400f ldp x15, x16, [x0, #16] 1548 e040a2c: d518100f msr sctlr_el1, x15 1549 e040a30: d5182050 msr tcr_el1, x16 1550 e040a34: a9422411 ldp x17, x9, [x0, #32] 1551 e040a38: d5181051 msr cpacr_el1, x17 1552 e040a3c: d51a0009 msr csselr_el1, x9 1553 e040a40: a9432c0a ldp x10, x11, [x0, #48] 1554 e040a44: d51c410a msr sp_el1, x10 1555 e040a48: d518520b msr esr_el1, x11 1556 e040a4c: a944340c ldp x12, x13, [x0, #64] 1557 e040a50: d518200c msr ttbr0_el1, x12 1558 e040a54: d518202d msr ttbr1_el1, x13 1559 e040a58: a9453c0e ldp x14, x15, [x0, #80] 1560 e040a5c: d518a20e msr mair_el1, x14 1561 e040a60: d518a30f msr amair_el1, x15 1562 e040a64: a9464410 ldp x16, x17, [x0, #96] 1563 e040a68: d5181030 msr actlr_el1, x16 1564 e040a6c: d518d091 msr tpidr_el1, x17 1565 e040a70: a9472809 ldp x9, x10, [x0, #112] 1566 e040a74: d51bd049 msr tpidr_el0, x9 1567 e040a78: d51bd06a msr tpidrro_el0, x10 1568 e040a7c: a948380d ldp x13, x14, [x0, #128] 1569 e040a80: d518740d msr par_el1, x13 1570 e040a84: d518600e msr far_el1, x14 1571 e040a88: a949400f ldp x15, x16, [x0, #144] 1572 e040a8c: d518510f msr afsr0_el1, x15 1573 e040a90: d5185130 msr afsr1_el1, x16 1574 e040a94: a94a2411 ldp x17, x9, [x0, #160] 1575 e040a98: d518d031 msr contextidr_el1, x17 1576 e040a9c: d518c009 msr vbar_el1, x9 1577 e040aa0: a94b300b ldp x11, x12, [x0, #176] 1578 e040aa4: d51c432b msr spsr_abt, x11 1579 e040aa8: d51c434c msr spsr_und, x12 1580 e040aac: a94c380d ldp x13, x14, [x0, #192] 1581 e040ab0: d51c430d msr spsr_irq, x13 1582 e040ab4: d51c436e msr spsr_fiq, x14 1583 e040ab8: a94d400f ldp x15, x16, [x0, #208] 1584 e040abc: d51c300f msr dacr32_el2, x15 1585 e040ac0: d51c5030 msr ifsr32_el2, x16 1586 e040ac4: a94e2c0a ldp x10, x11, [x0, #224] 1587 e040ac8: d51be22a msr cntp_ctl_el0, x10 1588 e040acc: d51be24b msr cntp_cval_el0, x11 1589 e040ad0: a94f340c ldp x12, x13, [x0, #240] 1590 e040ad4: d51be32c msr cntv_ctl_el0, x12 1591 e040ad8: d51be34d msr cntv_cval_el0, x13 1592 e040adc: f940800e ldr x14, [x0, #256] 1593 e040ae0: d518e10e msr cntkctl_el1, x14 1594 e040ae4: d65f03c0 ret 1595 1596000000000e040ae8 <el1_sysregs_context_save>: 1597 e040ae8: d5384009 mrs x9, spsr_el1 1598 e040aec: d538402a mrs x10, elr_el1 1599 e040af0: a9002809 stp x9, x10, [x0] 1600 e040af4: d538100f mrs x15, sctlr_el1 1601 e040af8: d5382050 mrs x16, tcr_el1 1602 e040afc: a901400f stp x15, x16, [x0, #16] 1603 e040b00: d5381051 mrs x17, cpacr_el1 1604 e040b04: d53a0009 mrs x9, csselr_el1 1605 e040b08: a9022411 stp x17, x9, [x0, #32] 1606 e040b0c: d53c410a mrs x10, sp_el1 1607 e040b10: d538520b mrs x11, esr_el1 1608 e040b14: a9032c0a stp x10, x11, [x0, #48] 1609 e040b18: d538200c mrs x12, ttbr0_el1 1610 e040b1c: d538202d mrs x13, ttbr1_el1 1611 e040b20: a904340c stp x12, x13, [x0, #64] 1612 e040b24: d538a20e mrs x14, mair_el1 1613 e040b28: d538a30f mrs x15, amair_el1 1614 e040b2c: a9053c0e stp x14, x15, [x0, #80] 1615 e040b30: d5381030 mrs x16, actlr_el1 1616 e040b34: d538d091 mrs x17, tpidr_el1 1617 e040b38: a9064410 stp x16, x17, [x0, #96] 1618 e040b3c: d53bd049 mrs x9, tpidr_el0 1619 e040b40: d53bd06a mrs x10, tpidrro_el0 1620 e040b44: a9072809 stp x9, x10, [x0, #112] 1621 e040b48: d538740d mrs x13, par_el1 1622 e040b4c: d538600e mrs x14, far_el1 1623 e040b50: a908380d stp x13, x14, [x0, #128] 1624 e040b54: d538510f mrs x15, afsr0_el1 1625 e040b58: d5385130 mrs x16, afsr1_el1 1626 e040b5c: a909400f stp x15, x16, [x0, #144] 1627 e040b60: d538d031 mrs x17, contextidr_el1 1628 e040b64: d538c009 mrs x9, vbar_el1 1629 e040b68: a90a2411 stp x17, x9, [x0, #160] 1630 e040b6c: d53c432b mrs x11, spsr_abt 1631 e040b70: d53c434c mrs x12, spsr_und 1632 e040b74: a90b300b stp x11, x12, [x0, #176] 1633 e040b78: d53c430d mrs x13, spsr_irq 1634 e040b7c: d53c436e mrs x14, spsr_fiq 1635 e040b80: a90c380d stp x13, x14, [x0, #192] 1636 e040b84: d53c300f mrs x15, dacr32_el2 1637 e040b88: d53c5030 mrs x16, ifsr32_el2 1638 e040b8c: a90d400f stp x15, x16, [x0, #208] 1639 e040b90: d53be22a mrs x10, cntp_ctl_el0 1640 e040b94: d53be24b mrs x11, cntp_cval_el0 1641 e040b98: a90e2c0a stp x10, x11, [x0, #224] 1642 e040b9c: d53be32c mrs x12, cntv_ctl_el0 1643 e040ba0: d53be34d mrs x13, cntv_cval_el0 1644 e040ba4: a90f340c stp x12, x13, [x0, #240] 1645 e040ba8: d538e10e mrs x14, cntkctl_el1 1646 e040bac: f900800e str x14, [x0, #256] 1647 e040bb0: d65f03c0 ret 1648 1649000000000e040bb4 <el3_exit>: 1650 e040bb4: 910003f1 mov x17, sp 1651 e040bb8: d50041bf msr spsel, #0x1 1652 e040bbc: f9008bf1 str x17, [sp, #272] 1653 e040bc0: f94083f2 ldr x18, [sp, #256] 1654 e040bc4: a951c7f0 ldp x16, x17, [sp, #280] 1655 e040bc8: d51e1112 msr scr_el3, x18 1656 e040bcc: d51e4010 msr spsr_el3, x16 1657 e040bd0: d51e4031 msr elr_el3, x17 1658 e040bd4: a953d3f3 ldp x19, x20, [sp, #312] 1659 e040bd8: d51e1153 msr cptr_el3, x19 1660 e040bdc: f2780273 ands x19, x19, #0x100 1661 e040be0: 54000060 b.eq e040bec <sve_not_enabled> // b.none 1662 e040be4: d5033fdf isb 1663 e040be8: d51e1214 msr zcr_el3, x20 1664 1665000000000e040bec <sve_not_enabled>: 1666 e040bec: 940000fb bl e040fd8 <restore_gp_pmcr_pauth_regs> 1667 e040bf0: f9407bfe ldr x30, [sp, #240] 1668 e040bf4: d5033f9f dsb sy 1669 e040bf8: f9009bff str xzr, [sp, #304] 1670 e040bfc: d69f03e0 eret 1671 e040c00: d503379f dsb nsh 1672 e040c04: d5033fdf isb 1673 1674000000000e040c08 <enable_mmu_direct_el3>: 1675 e040c08: d50e871f tlbi alle3 1676 e040c0c: aa0003e7 mov x7, x0 1677 e040c10: d0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 1678 e040c14: 91336000 add x0, x0, #0xcd8 1679 e040c18: f9400001 ldr x1, [x0] 1680 e040c1c: d51ea201 msr mair_el3, x1 1681 e040c20: f9400402 ldr x2, [x0, #8] 1682 e040c24: d51e2042 msr tcr_el3, x2 1683 e040c28: f9400803 ldr x3, [x0, #16] 1684 e040c2c: d51e2003 msr ttbr0_el3, x3 1685 e040c30: d5033b9f dsb ish 1686 e040c34: d5033fdf isb 1687 e040c38: d53e1004 mrs x4, sctlr_el3 1688 e040c3c: d28000a5 mov x5, #0x5 // #5 1689 e040c40: f2a00105 movk x5, #0x8, lsl #16 1690 e040c44: aa050084 orr x4, x4, x5 1691 e040c48: 927df885 and x5, x4, #0xfffffffffffffffb 1692 e040c4c: f24000ff tst x7, #0x1 1693 e040c50: 9a8410a4 csel x4, x5, x4, ne // ne = any 1694 e040c54: d51e1004 msr sctlr_el3, x4 1695 e040c58: d5033fdf isb 1696 e040c5c: d65f03c0 ret 1697 1698000000000e040c60 <enter_lower_el_async_ea>: 1699 e040c60: f9007bfe str x30, [sp, #240] 1700 1701000000000e040c64 <handle_lower_el_async_ea>: 1702 e040c64: 940000f9 bl e041048 <save_gp_pmcr_pauth_regs> 1703 e040c68: d2800000 mov x0, #0x0 // #0 1704 e040c6c: d53e5201 mrs x1, esr_el3 1705 e040c70: 97ffff05 bl e040884 <delegate_async_ea> 1706 e040c74: d50040bf msr spsel, #0x0 1707 e040c78: 17ffffcf b e040bb4 <el3_exit> 1708 1709000000000e040c7c <enter_lower_el_sync_ea>: 1710 e040c7c: f9007bfe str x30, [sp, #240] 1711 e040c80: d53e521e mrs x30, esr_el3 1712 e040c84: d35a7fde ubfx x30, x30, #26, #6 1713 e040c88: f10083df cmp x30, #0x20 1714 e040c8c: 540001a0 b.eq e040cc0 <enter_lower_el_sync_ea+0x44> // b.none 1715 e040c90: f10093df cmp x30, #0x24 1716 e040c94: 54000160 b.eq e040cc0 <enter_lower_el_sync_ea+0x44> // b.none 1717 e040c98: a90007e0 stp x0, x1, [sp] 1718 e040c9c: a9010fe2 stp x2, x3, [sp, #16] 1719 e040ca0: a90217e4 stp x4, x5, [sp, #32] 1720 e040ca4: 94000022 bl e040d2c <get_cpu_ops_ptr> 1721 e040ca8: f9401000 ldr x0, [x0, #32] 1722 e040cac: b40001a0 cbz x0, e040ce0 <enter_lower_el_sync_ea+0x64> 1723 e040cb0: d53e5201 mrs x1, esr_el3 1724 e040cb4: d35a7c21 ubfx x1, x1, #26, #6 1725 e040cb8: d63f0000 blr x0 1726 e040cbc: 14000009 b e040ce0 <enter_lower_el_sync_ea+0x64> 1727 e040cc0: d53e521e mrs x30, esr_el3 1728 e040cc4: 3648015e tbz w30, #9, e040cec <enter_lower_el_sync_ea+0x70> 1729 e040cc8: 940000e0 bl e041048 <save_gp_pmcr_pauth_regs> 1730 e040ccc: d2800020 mov x0, #0x1 // #1 1731 e040cd0: d53e5201 mrs x1, esr_el3 1732 e040cd4: 97fffeed bl e040888 <delegate_sync_ea> 1733 e040cd8: d50040bf msr spsel, #0x0 1734 e040cdc: 17ffffb6 b e040bb4 <el3_exit> 1735 e040ce0: a94007e0 ldp x0, x1, [sp] 1736 e040ce4: a9410fe2 ldp x2, x3, [sp, #16] 1737 e040ce8: a94217e4 ldp x4, x5, [sp, #32] 1738 e040cec: f9407bfe ldr x30, [sp, #240] 1739 e040cf0: 940000b1 bl e040fb4 <report_unhandled_exception> 1740 1741000000000e040cf4 <flush_dcache_range>: 1742 e040cf4: b40001a1 cbz x1, e040d28 <exit_loop_civac> 1743 e040cf8: d53b0023 mrs x3, ctr_el0 1744 e040cfc: d3504c63 ubfx x3, x3, #16, #4 1745 e040d00: d2800082 mov x2, #0x4 // #4 1746 e040d04: 9ac32042 lsl x2, x2, x3 1747 e040d08: 8b010001 add x1, x0, x1 1748 e040d0c: d1000443 sub x3, x2, #0x1 1749 e040d10: 8a230000 bic x0, x0, x3 1750 1751000000000e040d14 <loop_civac>: 1752 e040d14: d50b7e20 dc civac, x0 1753 e040d18: 8b020000 add x0, x0, x2 1754 e040d1c: eb01001f cmp x0, x1 1755 e040d20: 54ffffa3 b.cc e040d14 <loop_civac> // b.lo, b.ul, b.last 1756 e040d24: d5033f9f dsb sy 1757 1758000000000e040d28 <exit_loop_civac>: 1759 e040d28: d65f03c0 ret 1760 1761000000000e040d2c <get_cpu_ops_ptr>: 1762 e040d2c: d5380002 mrs x2, midr_el1 1763 e040d30: d29ffe03 mov x3, #0xfff0 // #65520 1764 e040d34: f2bfe003 movk x3, #0xff00, lsl #16 1765 e040d38: 0a030042 and w2, w2, w3 1766 e040d3c: 10035b25 adr x5, e0478a0 <__cb_func_spe_drain_buffers_hookcm_entering_secure_world> 1767 e040d40: d2800000 mov x0, #0x0 // #0 1768 e040d44: 10035064 adr x4, e047750 <__CPU_OPS_START__> 1769 e040d48: eb05009f cmp x4, x5 1770 e040d4c: 540000e0 b.eq e040d68 <search_def_ptr> // b.none 1771 e040d50: f8438481 ldr x1, [x4], #56 1772 e040d54: 0a030021 and w1, w1, w3 1773 e040d58: 6b02003f cmp w1, w2 1774 e040d5c: 54ffff61 b.ne e040d48 <get_cpu_ops_ptr+0x1c> // b.any 1775 e040d60: d100e080 sub x0, x4, #0x38 1776 e040d64: d65f03c0 ret 1777 1778000000000e040d68 <search_def_ptr>: 1779 e040d68: d65f03c0 ret 1780 1781000000000e040d6c <init_cpu_data_ptr>: 1782 e040d6c: aa1e03ea mov x10, x30 1783 e040d70: 94000040 bl e040e70 <plat_my_core_pos> 1784 e040d74: 97fffd66 bl e04030c <_cpu_data_by_index> 1785 e040d78: d51ed040 msr tpidr_el3, x0 1786 e040d7c: d65f0140 ret x10 1787 1788000000000e040d80 <init_cpu_ops>: 1789 e040d80: d53ed046 mrs x6, tpidr_el3 1790 e040d84: f94008c0 ldr x0, [x6, #16] 1791 e040d88: b50000a0 cbnz x0, e040d9c <init_cpu_ops+0x1c> 1792 e040d8c: aa1e03ea mov x10, x30 1793 e040d90: 97ffffe7 bl e040d2c <get_cpu_ops_ptr> 1794 e040d94: f8010cc0 str x0, [x6, #16]! 1795 e040d98: aa0a03fe mov x30, x10 1796 e040d9c: d65f03c0 ret 1797 1798000000000e040da0 <inv_dcache_range>: 1799 e040da0: b40001a1 cbz x1, e040dd4 <exit_loop_ivac> 1800 e040da4: d53b0023 mrs x3, ctr_el0 1801 e040da8: d3504c63 ubfx x3, x3, #16, #4 1802 e040dac: d2800082 mov x2, #0x4 // #4 1803 e040db0: 9ac32042 lsl x2, x2, x3 1804 e040db4: 8b010001 add x1, x0, x1 1805 e040db8: d1000443 sub x3, x2, #0x1 1806 e040dbc: 8a230000 bic x0, x0, x3 1807 1808000000000e040dc0 <loop_ivac>: 1809 e040dc0: d5087620 dc ivac, x0 1810 e040dc4: 8b020000 add x0, x0, x2 1811 e040dc8: eb01001f cmp x0, x1 1812 e040dcc: 54ffffa3 b.cc e040dc0 <loop_ivac> // b.lo, b.ul, b.last 1813 e040dd0: d5033f9f dsb sy 1814 1815000000000e040dd4 <exit_loop_ivac>: 1816 e040dd4: d65f03c0 ret 1817 1818000000000e040dd8 <opteed_enter_sp>: 1819 e040dd8: 910003e3 mov x3, sp 1820 e040ddc: f9000003 str x3, [x0] 1821 e040de0: d10183ff sub sp, sp, #0x60 1822 e040de4: a90053f3 stp x19, x20, [sp] 1823 e040de8: a9015bf5 stp x21, x22, [sp, #16] 1824 e040dec: a90263f7 stp x23, x24, [sp, #32] 1825 e040df0: a9036bf9 stp x25, x26, [sp, #48] 1826 e040df4: a90473fb stp x27, x28, [sp, #64] 1827 e040df8: a9057bfd stp x29, x30, [sp, #80] 1828 e040dfc: 17ffff6e b e040bb4 <el3_exit> 1829 1830000000000e040e00 <opteed_exit_sp>: 1831 e040e00: 9100001f mov sp, x0 1832 e040e04: a97a5013 ldp x19, x20, [x0, #-96] 1833 e040e08: a97b5815 ldp x21, x22, [x0, #-80] 1834 e040e0c: a97c6017 ldp x23, x24, [x0, #-64] 1835 e040e10: a97d6819 ldp x25, x26, [x0, #-48] 1836 e040e14: a97e701b ldp x27, x28, [x0, #-32] 1837 e040e18: a97f781d ldp x29, x30, [x0, #-16] 1838 e040e1c: aa0103e0 mov x0, x1 1839 e040e20: d65f03c0 ret 1840 1841000000000e040e24 <plat_crash_console_flush>: 1842 e040e24: d2a12080 mov x0, #0x9040000 // #151257088 1843 e040e28: 17fffd99 b e04048c <console_pl011_core_flush> 1844 1845000000000e040e2c <plat_crash_console_init>: 1846 e040e2c: d2a12080 mov x0, #0x9040000 // #151257088 1847 e040e30: d2800021 mov x1, #0x1 // #1 1848 e040e34: d2984002 mov x2, #0xc200 // #49664 1849 e040e38: f2a00022 movk x2, #0x1, lsl #16 1850 e040e3c: 17fffd9e b e0404b4 <console_pl011_core_init> 1851 1852000000000e040e40 <plat_crash_console_putc>: 1853 e040e40: d2a12081 mov x1, #0x9040000 // #151257088 1854 e040e44: 17fffdb2 b e04050c <console_pl011_core_putc> 1855 1856000000000e040e48 <plat_disable_acp>: 1857 e040e48: d65f03c0 ret 1858 1859000000000e040e4c <plat_get_my_stack>: 1860 e040e4c: aa1e03ea mov x10, x30 1861 e040e50: 94000008 bl e040e70 <plat_my_core_pos> 1862 e040e54: b0000042 adrp x2, e049000 <__STACKS_START__+0xf80> 1863 e040e58: 91020042 add x2, x2, #0x80 1864 e040e5c: d2820001 mov x1, #0x1000 // #4096 1865 e040e60: 9b010800 madd x0, x0, x1, x2 1866 e040e64: d65f0140 ret x10 1867 1868000000000e040e68 <plat_handle_double_fault>: 1869 e040e68: 14000053 b e040fb4 <report_unhandled_exception> 1870 1871000000000e040e6c <plat_handle_el3_ea>: 1872 e040e6c: 14000052 b e040fb4 <report_unhandled_exception> 1873 1874000000000e040e70 <plat_my_core_pos>: 1875 e040e70: d53800a0 mrs x0, mpidr_el1 1876 e040e74: 14000003 b e040e80 <plat_qemu_calc_core_pos> 1877 1878000000000e040e78 <plat_panic_handler>: 1879 e040e78: d503207f wfi 1880 e040e7c: 17ffffff b e040e78 <plat_panic_handler> 1881 1882000000000e040e80 <plat_qemu_calc_core_pos>: 1883 e040e80: 92401c01 and x1, x0, #0xff 1884 e040e84: 92781c00 and x0, x0, #0xff00 1885 e040e88: 8b401820 add x0, x1, x0, lsr #6 1886 e040e8c: d65f03c0 ret 1887 1888000000000e040e90 <plat_reset_handler>: 1889 e040e90: d65f03c0 ret 1890 1891000000000e040e94 <plat_secondary_cold_boot_setup>: 1892 e040e94: 97fffff7 bl e040e70 <plat_my_core_pos> 1893 e040e98: d37df000 lsl x0, x0, #3 1894 e040e9c: d2800102 mov x2, #0x8 // #8 1895 e040ea0: f2a1c002 movk x2, #0xe00, lsl #16 1896 1897000000000e040ea4 <poll_mailbox>: 1898 e040ea4: f8606841 ldr x1, [x2, x0] 1899 e040ea8: b40000c1 cbz x1, e040ec0 <poll_mailbox+0x1c> 1900 e040eac: d2800001 mov x1, #0x0 // #0 1901 e040eb0: f8206841 str x1, [x2, x0] 1902 e040eb4: d2a1c000 mov x0, #0xe000000 // #234881024 1903 e040eb8: f9400001 ldr x1, [x0] 1904 e040ebc: d61f0020 br x1 1905 e040ec0: d503205f wfe 1906 e040ec4: 17fffff8 b e040ea4 <poll_mailbox> 1907 1908000000000e040ec8 <plat_set_my_stack>: 1909 e040ec8: aa1e03e9 mov x9, x30 1910 e040ecc: 97ffffe0 bl e040e4c <plat_get_my_stack> 1911 e040ed0: 9100001f mov sp, x0 1912 e040ed4: d65f0120 ret x9 1913 1914000000000e040ed8 <prepare_cpu_pwr_dwn>: 1915 e040ed8: d2800022 mov x2, #0x1 // #1 1916 e040edc: eb02001f cmp x0, x2 1917 e040ee0: 9a808042 csel x2, x2, x0, hi // hi = pmore 1918 e040ee4: d53ed041 mrs x1, tpidr_el3 1919 e040ee8: f9400820 ldr x0, [x1, #16] 1920 e040eec: d2800501 mov x1, #0x28 // #40 1921 e040ef0: 8b020c21 add x1, x1, x2, lsl #3 1922 e040ef4: f8616801 ldr x1, [x0, x1] 1923 e040ef8: d61f0020 br x1 1924 1925000000000e040efc <psci_do_pwrdown_cache_maintenance>: 1926 e040efc: a9bf7bfd stp x29, x30, [sp, #-16]! 1927 e040f00: a9bf53f3 stp x19, x20, [sp, #-16]! 1928 e040f04: 97fffff5 bl e040ed8 <prepare_cpu_pwr_dwn> 1929 e040f08: 97ffffd1 bl e040e4c <plat_get_my_stack> 1930 e040f0c: aa0003f3 mov x19, x0 1931 e040f10: 910003e1 mov x1, sp 1932 e040f14: cb010001 sub x1, x0, x1 1933 e040f18: 910003e0 mov x0, sp 1934 e040f1c: 97ffff76 bl e040cf4 <flush_dcache_range> 1935 e040f20: d1400660 sub x0, x19, #0x1, lsl #12 1936 e040f24: cb2063e1 sub x1, sp, x0 1937 e040f28: 97ffff9e bl e040da0 <inv_dcache_range> 1938 e040f2c: a8c153f3 ldp x19, x20, [sp], #16 1939 e040f30: a8c17bfd ldp x29, x30, [sp], #16 1940 e040f34: d65f03c0 ret 1941 1942000000000e040f38 <psci_do_pwrup_cache_maintenance>: 1943 e040f38: a9bf7bfd stp x29, x30, [sp, #-16]! 1944 e040f3c: d5033ebf dmb st 1945 e040f40: 97ffffc3 bl e040e4c <plat_get_my_stack> 1946 e040f44: 910003e1 mov x1, sp 1947 e040f48: cb010001 sub x1, x0, x1 1948 e040f4c: 910003e0 mov x0, sp 1949 e040f50: 97ffff94 bl e040da0 <inv_dcache_range> 1950 e040f54: d53e1000 mrs x0, sctlr_el3 1951 e040f58: b27e0000 orr x0, x0, #0x4 1952 e040f5c: d51e1000 msr sctlr_el3, x0 1953 e040f60: d5033fdf isb 1954 e040f64: a8c17bfd ldp x29, x30, [sp], #16 1955 e040f68: d65f03c0 ret 1956 1957000000000e040f6c <psci_power_down_wfi>: 1958 e040f6c: d5033f9f dsb sy 1959 e040f70: d503207f wfi 1960 e040f74: 97ffffc1 bl e040e78 <plat_panic_handler> 1961 1962000000000e040f78 <qemu_max_cluster_pwr_dwn>: 1963 e040f78: d53e1001 mrs x1, sctlr_el3 1964 e040f7c: 927df821 and x1, x1, #0xfffffffffffffffb 1965 e040f80: d51e1001 msr sctlr_el3, x1 1966 e040f84: d5033fdf isb 1967 e040f88: d2800020 mov x0, #0x1 // #1 1968 e040f8c: 17fffe31 b e040850 <dcsw_op_all> 1969 1970000000000e040f90 <qemu_max_core_pwr_dwn>: 1971 e040f90: d53e1001 mrs x1, sctlr_el3 1972 e040f94: 927df821 and x1, x1, #0xfffffffffffffffb 1973 e040f98: d51e1001 msr sctlr_el3, x1 1974 e040f9c: d5033fdf isb 1975 e040fa0: aa1e03f2 mov x18, x30 1976 e040fa4: d2800020 mov x0, #0x1 // #1 1977 e040fa8: 97fffe2f bl e040864 <dcsw_op_level1> 1978 e040fac: aa1203fe mov x30, x18 1979 e040fb0: d65f03c0 ret 1980 1981000000000e040fb4 <report_unhandled_exception>: 1982 e040fb4: 97ffffb1 bl e040e78 <plat_panic_handler> 1983 1984000000000e040fb8 <reset_handler>: 1985 e040fb8: aa1e03f3 mov x19, x30 1986 e040fbc: 97ffffb5 bl e040e90 <plat_reset_handler> 1987 e040fc0: 97ffff5b bl e040d2c <get_cpu_ops_ptr> 1988 e040fc4: f9400402 ldr x2, [x0, #8] 1989 e040fc8: aa1303fe mov x30, x19 1990 e040fcc: b4000042 cbz x2, e040fd4 <reset_handler+0x1c> 1991 e040fd0: d61f0040 br x2 1992 e040fd4: d65f03c0 ret 1993 1994000000000e040fd8 <restore_gp_pmcr_pauth_regs>: 1995 e040fd8: d53e1100 mrs x0, scr_el3 1996 e040fdc: f240001f tst x0, #0x1 1997 e040fe0: 54000100 b.eq e041000 <restore_gp_pmcr_pauth_regs+0x28> // b.none 1998 e040fe4: d2a01001 mov x1, #0x800000 // #8388608 1999 e040fe8: f2c00081 movk x1, #0x4, lsl #32 2000 e040fec: d53e1320 mrs x0, mdcr_el3 2001 e040ff0: ea01001f tst x0, x1 2002 e040ff4: 54000061 b.ne e041000 <restore_gp_pmcr_pauth_regs+0x28> // b.any 2003 e040ff8: f94097e0 ldr x0, [sp, #296] 2004 e040ffc: d51b9c00 msr pmcr_el0, x0 2005 e041000: a94007e0 ldp x0, x1, [sp] 2006 e041004: a9410fe2 ldp x2, x3, [sp, #16] 2007 e041008: a94217e4 ldp x4, x5, [sp, #32] 2008 e04100c: a9431fe6 ldp x6, x7, [sp, #48] 2009 e041010: a94427e8 ldp x8, x9, [sp, #64] 2010 e041014: a9452fea ldp x10, x11, [sp, #80] 2011 e041018: a94637ec ldp x12, x13, [sp, #96] 2012 e04101c: a9473fee ldp x14, x15, [sp, #112] 2013 e041020: a94847f0 ldp x16, x17, [sp, #128] 2014 e041024: a9494ff2 ldp x18, x19, [sp, #144] 2015 e041028: a94a57f4 ldp x20, x21, [sp, #160] 2016 e04102c: a94b5ff6 ldp x22, x23, [sp, #176] 2017 e041030: a94c67f8 ldp x24, x25, [sp, #192] 2018 e041034: a94d6ffa ldp x26, x27, [sp, #208] 2019 e041038: f9407ffc ldr x28, [sp, #248] 2020 e04103c: d518411c msr sp_el0, x28 2021 e041040: a94e77fc ldp x28, x29, [sp, #224] 2022 e041044: d65f03c0 ret 2023 2024000000000e041048 <save_gp_pmcr_pauth_regs>: 2025 e041048: a90007e0 stp x0, x1, [sp] 2026 e04104c: a9010fe2 stp x2, x3, [sp, #16] 2027 e041050: a90217e4 stp x4, x5, [sp, #32] 2028 e041054: a9031fe6 stp x6, x7, [sp, #48] 2029 e041058: a90427e8 stp x8, x9, [sp, #64] 2030 e04105c: a9052fea stp x10, x11, [sp, #80] 2031 e041060: a90637ec stp x12, x13, [sp, #96] 2032 e041064: a9073fee stp x14, x15, [sp, #112] 2033 e041068: a90847f0 stp x16, x17, [sp, #128] 2034 e04106c: a9094ff2 stp x18, x19, [sp, #144] 2035 e041070: a90a57f4 stp x20, x21, [sp, #160] 2036 e041074: a90b5ff6 stp x22, x23, [sp, #176] 2037 e041078: a90c67f8 stp x24, x25, [sp, #192] 2038 e04107c: a90d6ffa stp x26, x27, [sp, #208] 2039 e041080: a90e77fc stp x28, x29, [sp, #224] 2040 e041084: d5384112 mrs x18, sp_el0 2041 e041088: f9007ff2 str x18, [sp, #248] 2042 e04108c: d2a0100a mov x10, #0x800000 // #8388608 2043 e041090: f2c0008a movk x10, #0x4, lsl #32 2044 e041094: d53e1329 mrs x9, mdcr_el3 2045 e041098: ea0a013f tst x9, x10 2046 e04109c: 54000121 b.ne e0410c0 <save_gp_pmcr_pauth_regs+0x78> // b.any 2047 e0410a0: d53b9c09 mrs x9, pmcr_el0 2048 e0410a4: d53e110a mrs x10, scr_el3 2049 e0410a8: f240015f tst x10, #0x1 2050 e0410ac: 54000040 b.eq e0410b4 <save_gp_pmcr_pauth_regs+0x6c> // b.none 2051 e0410b0: f90097e9 str x9, [sp, #296] 2052 e0410b4: b27b0129 orr x9, x9, #0x20 2053 e0410b8: d51b9c09 msr pmcr_el0, x9 2054 e0410bc: d5033fdf isb 2055 e0410c0: d65f03c0 ret 2056 2057000000000e0410c4 <smc_handler>: 2058 e0410c4: 37f003a0 tbnz w0, #30, e041138 <smc_prohibited> 2059 2060000000000e0410c8 <smc_handler64>: 2061 e0410c8: 97ffffe0 bl e041048 <save_gp_pmcr_pauth_regs> 2062 e0410cc: aa1f03e5 mov x5, xzr 2063 e0410d0: 910003e6 mov x6, sp 2064 e0410d4: f94088cc ldr x12, [x6, #272] 2065 e0410d8: d50040bf msr spsel, #0x0 2066 e0410dc: d53e4010 mrs x16, spsr_el3 2067 e0410e0: d53e4031 mrs x17, elr_el3 2068 e0410e4: d53e1112 mrs x18, scr_el3 2069 e0410e8: a911c4d0 stp x16, x17, [x6, #280] 2070 e0410ec: f90080d2 str x18, [x6, #256] 2071 e0410f0: aa1f03e7 mov x7, xzr 2072 e0410f4: b3400247 bfxil x7, x18, #0, #1 2073 e0410f8: 9100019f mov sp, x12 2074 e0410fc: d3587410 ubfx x16, x0, #24, #6 2075 e041100: d35f7c0f ubfx x15, x0, #31, #1 2076 e041104: aa0f1a10 orr x16, x16, x15, lsl #6 2077 e041108: b000008e adrp x14, e052000 <opteed_sp_context+0xa00> 2078 e04110c: 913b71ce add x14, x14, #0xedc 2079 e041110: 387069cf ldrb w15, [x14, x16] 2080 e041114: 373800cf tbnz w15, #7, e04112c <smc_unknown> 2081 e041118: 10032e8b adr x11, e0476e8 <__svc_desc_arm_arch_svc+0x18> 2082 e04111c: 531b69ea lsl w10, w15, #5 2083 e041120: f86a496f ldr x15, [x11, w10, uxtw] 2084 e041124: d63f01e0 blr x15 2085 e041128: 17fffea3 b e040bb4 <el3_exit> 2086 2087000000000e04112c <smc_unknown>: 2088 e04112c: 92800000 mov x0, #0xffffffffffffffff // #-1 2089 e041130: f90000c0 str x0, [x6] 2090 e041134: 17fffea0 b e040bb4 <el3_exit> 2091 2092000000000e041138 <smc_prohibited>: 2093 e041138: a94e77fc ldp x28, x29, [sp, #224] 2094 e04113c: f9407bfe ldr x30, [sp, #240] 2095 e041140: 92800000 mov x0, #0xffffffffffffffff // #-1 2096 e041144: d69f03e0 eret 2097 e041148: d503379f dsb nsh 2098 e04114c: d5033fdf isb 2099 2100000000000e041150 <spin_lock>: 2101 e041150: 52800022 mov w2, #0x1 // #1 2102 e041154: d50320bf sevl 2103 2104000000000e041158 <l1>: 2105 e041158: d503205f wfe 2106 2107000000000e04115c <l2>: 2108 e04115c: 885ffc01 ldaxr w1, [x0] 2109 e041160: 35ffffc1 cbnz w1, e041158 <l1> 2110 e041164: 88017c02 stxr w1, w2, [x0] 2111 e041168: 35ffffa1 cbnz w1, e04115c <l2> 2112 e04116c: d65f03c0 ret 2113 2114000000000e041170 <spin_unlock>: 2115 e041170: 889ffc1f stlr wzr, [x0] 2116 e041174: d65f03c0 ret 2117 2118000000000e041178 <zeromem>: 2119 e041178: 8b010002 add x2, x0, x1 2120 e04117c: 14000030 b e04123c <zero_normalmem+0xbc> 2121 2122000000000e041180 <zero_normalmem>: 2123 e041180: 8b010002 add x2, x0, x1 2124 e041184: d53b00e3 mrs x3, dczid_el0 2125 e041188: d3400c63 ubfx x3, x3, #0, #4 2126 e04118c: d2800085 mov x5, #0x4 // #4 2127 e041190: 9ac320a3 lsl x3, x5, x3 2128 e041194: eb03003f cmp x1, x3 2129 e041198: 54000523 b.cc e04123c <zero_normalmem+0xbc> // b.lo, b.ul, b.last 2130 e04119c: d1000461 sub x1, x3, #0x1 2131 e0411a0: ea01001f tst x0, x1 2132 e0411a4: 54000260 b.eq e0411f0 <zero_normalmem+0x70> // b.none 2133 e0411a8: aa010004 orr x4, x0, x1 2134 e0411ac: 91000484 add x4, x4, #0x1 2135 e0411b0: b4000464 cbz x4, e04123c <zero_normalmem+0xbc> 2136 e0411b4: eb02009f cmp x4, x2 2137 e0411b8: 54000428 b.hi e04123c <zero_normalmem+0xbc> // b.pmore 2138 e0411bc: f2400c1f tst x0, #0xf 2139 e0411c0: 540000e0 b.eq e0411dc <zero_normalmem+0x5c> // b.none 2140 e0411c4: b2400c05 orr x5, x0, #0xf 2141 e0411c8: 910004a5 add x5, x5, #0x1 2142 e0411cc: b4000385 cbz x5, e04123c <zero_normalmem+0xbc> 2143 e0411d0: 3800141f strb wzr, [x0], #1 2144 e0411d4: eb05001f cmp x0, x5 2145 e0411d8: 54ffffc1 b.ne e0411d0 <zero_normalmem+0x50> // b.any 2146 e0411dc: eb04001f cmp x0, x4 2147 e0411e0: 54000082 b.cs e0411f0 <zero_normalmem+0x70> // b.hs, b.nlast 2148 e0411e4: a8817c1f stp xzr, xzr, [x0], #16 2149 e0411e8: eb04001f cmp x0, x4 2150 e0411ec: 54ffffc3 b.cc e0411e4 <zero_normalmem+0x64> // b.lo, b.ul, b.last 2151 e0411f0: 8a210044 bic x4, x2, x1 2152 e0411f4: eb04001f cmp x0, x4 2153 e0411f8: 540000a2 b.cs e04120c <zero_normalmem+0x8c> // b.hs, b.nlast 2154 e0411fc: d50b7420 dc zva, x0 2155 e041200: 8b030000 add x0, x0, x3 2156 e041204: eb04001f cmp x0, x4 2157 e041208: 54ffffa3 b.cc e0411fc <zero_normalmem+0x7c> // b.lo, b.ul, b.last 2158 e04120c: 927cec44 and x4, x2, #0xfffffffffffffff0 2159 e041210: eb04001f cmp x0, x4 2160 e041214: 54000082 b.cs e041224 <zero_normalmem+0xa4> // b.hs, b.nlast 2161 e041218: a8817c1f stp xzr, xzr, [x0], #16 2162 e04121c: eb04001f cmp x0, x4 2163 e041220: 54ffffc3 b.cc e041218 <zero_normalmem+0x98> // b.lo, b.ul, b.last 2164 e041224: eb02001f cmp x0, x2 2165 e041228: 54000080 b.eq e041238 <zero_normalmem+0xb8> // b.none 2166 e04122c: 3800141f strb wzr, [x0], #1 2167 e041230: eb02001f cmp x0, x2 2168 e041234: 54ffffc1 b.ne e04122c <zero_normalmem+0xac> // b.any 2169 e041238: d65f03c0 ret 2170 e04123c: f2400c1f tst x0, #0xf 2171 e041240: 54fffe60 b.eq e04120c <zero_normalmem+0x8c> // b.none 2172 e041244: b2400c04 orr x4, x0, #0xf 2173 e041248: 91000484 add x4, x4, #0x1 2174 e04124c: b4fffec4 cbz x4, e041224 <zero_normalmem+0xa4> 2175 e041250: eb02009f cmp x4, x2 2176 e041254: 54fffe82 b.cs e041224 <zero_normalmem+0xa4> // b.hs, b.nlast 2177 e041258: 3800141f strb wzr, [x0], #1 2178 e04125c: eb04001f cmp x0, x4 2179 e041260: 54ffffc1 b.ne e041258 <zero_normalmem+0xd8> // b.any 2180 e041264: 17ffffea b e04120c <zero_normalmem+0x8c> 2181 2182000000000e041268 <bakery_lock_get>: 2183 e041268: a9be7bfd stp x29, x30, [sp, #-32]! 2184 e04126c: 910003fd mov x29, sp 2185 e041270: f9000bf3 str x19, [sp, #16] 2186 e041274: aa0003f3 mov x19, x0 2187 e041278: 97fffefe bl e040e70 <plat_my_core_pos> 2188 e04127c: d37f7c04 ubfiz x4, x0, #1, #32 2189 e041280: 52800021 mov w1, #0x1 // #1 2190 e041284: 52800002 mov w2, #0x0 // #0 2191 e041288: 78246a61 strh w1, [x19, x4] 2192 e04128c: 52800001 mov w1, #0x0 // #0 2193 e041290: 2a0203e3 mov w3, w2 2194 e041294: 11000442 add w2, w2, #0x1 2195 e041298: 78637a63 ldrh w3, [x19, x3, lsl #1] 2196 e04129c: d3413c63 ubfx x3, x3, #1, #15 2197 e0412a0: 6b03003f cmp w1, w3 2198 e0412a4: 1a832021 csel w1, w1, w3, cs // cs = hs, nlast 2199 e0412a8: 7100205f cmp w2, #0x8 2200 e0412ac: 54ffff21 b.ne e041290 <bakery_lock_get+0x28> // b.any 2201 e0412b0: 11000421 add w1, w1, #0x1 2202 e0412b4: 531f3822 ubfiz w2, w1, #1, #15 2203 e0412b8: 2a012001 orr w1, w0, w1, lsl #8 2204 e0412bc: 78246a62 strh w2, [x19, x4] 2205 e0412c0: 52800002 mov w2, #0x0 // #0 2206 e0412c4: 6b02001f cmp w0, w2 2207 e0412c8: 54000200 b.eq e041308 <bakery_lock_get+0xa0> // b.none 2208 e0412cc: d37f7c45 ubfiz x5, x2, #1, #32 2209 e0412d0: 78656a64 ldrh w4, [x19, x5] 2210 e0412d4: 8b050266 add x6, x19, x5 2211 e0412d8: 12003c83 and w3, w4, #0xffff 2212 e0412dc: 3707ffa4 tbnz w4, #0, e0412d0 <bakery_lock_get+0x68> 2213 e0412e0: 53017c63 lsr w3, w3, #1 2214 e0412e4: 34000123 cbz w3, e041308 <bakery_lock_get+0xa0> 2215 e0412e8: 2a032044 orr w4, w2, w3, lsl #8 2216 e0412ec: 6b04003f cmp w1, w4 2217 e0412f0: 540000c9 b.ls e041308 <bakery_lock_get+0xa0> // b.plast 2218 e0412f4: d503205f wfe 2219 e0412f8: 794000c4 ldrh w4, [x6] 2220 e0412fc: d3413c84 ubfx x4, x4, #1, #15 2221 e041300: 6b04007f cmp w3, w4 2222 e041304: 54ffff80 b.eq e0412f4 <bakery_lock_get+0x8c> // b.none 2223 e041308: 11000442 add w2, w2, #0x1 2224 e04130c: 7100205f cmp w2, #0x8 2225 e041310: 54fffda1 b.ne e0412c4 <bakery_lock_get+0x5c> // b.any 2226 e041314: d5033bbf dmb ish 2227 e041318: f9400bf3 ldr x19, [sp, #16] 2228 e04131c: a8c27bfd ldp x29, x30, [sp], #32 2229 e041320: d65f03c0 ret 2230 2231000000000e041324 <bakery_lock_release>: 2232 e041324: a9be7bfd stp x29, x30, [sp, #-32]! 2233 e041328: 910003fd mov x29, sp 2234 e04132c: f9000bf3 str x19, [sp, #16] 2235 e041330: aa0003f3 mov x19, x0 2236 e041334: 97fffecf bl e040e70 <plat_my_core_pos> 2237 e041338: d5033bbf dmb ish 2238 e04133c: 2a0003e1 mov w1, w0 2239 e041340: 78217a7f strh wzr, [x19, x1, lsl #1] 2240 e041344: d5033f9f dsb sy 2241 e041348: d503209f sev 2242 e04134c: f9400bf3 ldr x19, [sp, #16] 2243 e041350: a8c27bfd ldp x29, x30, [sp], #32 2244 e041354: d65f03c0 ret 2245 2246000000000e041358 <bl31_early_platform_setup2>: 2247 e041358: a9bd7bfd stp x29, x30, [sp, #-48]! 2248 e04135c: 910003fd mov x29, sp 2249 e041360: a90153f3 stp x19, x20, [sp, #16] 2250 e041364: aa0003f3 mov x19, x0 2251 e041368: b0000094 adrp x20, e052000 <opteed_sp_context+0xa00> 2252 e04136c: f90013f5 str x21, [sp, #32] 2253 e041370: 94000dda bl e044ad8 <qemu_console_init> 2254 e041374: f9400673 ldr x19, [x19, #8] 2255 e041378: b0000095 adrp x21, e052000 <opteed_sp_context+0xa00> 2256 e04137c: 91300294 add x20, x20, #0xc00 2257 e041380: 912ea2b5 add x21, x21, #0xba8 2258 e041384: b50000d3 cbnz x19, e04139c <bl31_early_platform_setup2+0x44> 2259 e041388: b0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 2260 e04138c: f9460400 ldr x0, [x0, #3080] 2261 e041390: b5000240 cbnz x0, e0413d8 <bl31_early_platform_setup2+0x80> 2262 e041394: 940001be bl e041a8c <console_flush> 2263 e041398: 97fffd7b bl e040984 <do_panic> 2264 e04139c: b9400260 ldr w0, [x19] 2265 e0413a0: 7100101f cmp w0, #0x4 2266 e0413a4: 540000e1 b.ne e0413c0 <bl31_early_platform_setup2+0x68> // b.any 2267 e0413a8: f9400a61 ldr x1, [x19, #16] 2268 e0413ac: aa1503e0 mov x0, x21 2269 e0413b0: d2800b02 mov x2, #0x58 // #88 2270 e0413b4: 94000497 bl e042610 <memcpy> 2271 e0413b8: f9400e73 ldr x19, [x19, #24] 2272 e0413bc: 17fffff2 b e041384 <bl31_early_platform_setup2+0x2c> 2273 e0413c0: 7100141f cmp w0, #0x5 2274 e0413c4: 54ffffa1 b.ne e0413b8 <bl31_early_platform_setup2+0x60> // b.any 2275 e0413c8: aa1403e0 mov x0, x20 2276 e0413cc: d2800b02 mov x2, #0x58 // #88 2277 e0413d0: f9400a61 ldr x1, [x19, #16] 2278 e0413d4: 17fffff8 b e0413b4 <bl31_early_platform_setup2+0x5c> 2279 e0413d8: a94153f3 ldp x19, x20, [sp, #16] 2280 e0413dc: f94013f5 ldr x21, [sp, #32] 2281 e0413e0: a8c37bfd ldp x29, x30, [sp], #48 2282 e0413e4: d65f03c0 ret 2283 2284000000000e0413e8 <bl31_main>: 2285 e0413e8: a9be7bfd stp x29, x30, [sp, #-32]! 2286 e0413ec: d0000021 adrp x1, e047000 <__TEXT_END__> 2287 e0413f0: 910c1021 add x1, x1, #0x304 2288 e0413f4: 910003fd mov x29, sp 2289 e0413f8: f9000bf3 str x19, [sp, #16] 2290 e0413fc: d0000033 adrp x19, e047000 <__TEXT_END__> 2291 e041400: 910d9e73 add x19, x19, #0x367 2292 e041404: aa1303e0 mov x0, x19 2293 e041408: 94000f56 bl e045160 <tf_log> 2294 e04140c: aa1303e0 mov x0, x19 2295 e041410: d0000021 adrp x1, e047000 <__TEXT_END__> 2296 e041414: 910b9821 add x1, x1, #0x2e6 2297 e041418: 94000f52 bl e045160 <tf_log> 2298 e04141c: 9400002f bl e0414d8 <bl31_platform_setup> 2299 e041420: 940000a4 bl e0416b0 <cm_init> 2300 e041424: 94000e33 bl e044cf0 <runtime_svc_init> 2301 e041428: b0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 2302 e04142c: f9454000 ldr x0, [x0, #2688] 2303 e041430: b40000c0 cbz x0, e041448 <bl31_main+0x60> 2304 e041434: d63f0000 blr x0 2305 e041438: 35000080 cbnz w0, e041448 <bl31_main+0x60> 2306 e04143c: d0000020 adrp x0, e047000 <__TEXT_END__> 2307 e041440: 910dc800 add x0, x0, #0x372 2308 e041444: 94000f47 bl e045160 <tf_log> 2309 e041448: 9400002c bl e0414f8 <bl31_prepare_next_image_entry> 2310 e04144c: 94000190 bl e041a8c <console_flush> 2311 e041450: f9400bf3 ldr x19, [sp, #16] 2312 e041454: a8c27bfd ldp x29, x30, [sp], #32 2313 e041458: 1400001e b e0414d0 <bl31_plat_runtime_setup> 2314 2315000000000e04145c <bl31_plat_arch_setup>: 2316 e04145c: b00000c0 adrp x0, e05a000 <__BL31_END__> 2317 e041460: 929fffe1 mov x1, #0xffffffffffff0000 // #-65536 2318 e041464: 91000000 add x0, x0, #0x0 2319 e041468: b00000c7 adrp x7, e05a000 <__BL31_END__> 2320 e04146c: 900000c6 adrp x6, e059000 <psci_locks> 2321 e041470: 910000e7 add x7, x7, #0x0 2322 e041474: 910000c6 add x6, x6, #0x0 2323 e041478: f0000025 adrp x5, e048000 <tf_xlat_ctx> 2324 e04147c: d0000024 adrp x4, e047000 <__TEXT_END__> 2325 e041480: 910000a5 add x5, x5, #0x0 2326 e041484: 91000084 add x4, x4, #0x0 2327 e041488: d0000023 adrp x3, e047000 <__TEXT_END__> 2328 e04148c: f0ffffe2 adrp x2, e040000 <bl31_entrypoint> 2329 e041490: 91000063 add x3, x3, #0x0 2330 e041494: 91000042 add x2, x2, #0x0 2331 e041498: f2be3f81 movk x1, #0xf1fc, lsl #16 2332 e04149c: 8b010001 add x1, x0, x1 2333 e0414a0: d2a1c080 mov x0, #0xe040000 // #235143168 2334 e0414a4: 14000d65 b e044a38 <qemu_configure_mmu_el3> 2335 2336000000000e0414a8 <bl31_plat_get_next_image_ep_info>: 2337 e0414a8: 7100041f cmp w0, #0x1 2338 e0414ac: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 2339 e0414b0: b0000082 adrp x2, e052000 <opteed_sp_context+0xa00> 2340 e0414b4: 91300020 add x0, x1, #0xc00 2341 e0414b8: 912ea042 add x2, x2, #0xba8 2342 e0414bc: 9a820000 csel x0, x0, x2, eq // eq = none 2343 e0414c0: f9400401 ldr x1, [x0, #8] 2344 e0414c4: f100003f cmp x1, #0x0 2345 e0414c8: 9a9f1000 csel x0, x0, xzr, ne // ne = any 2346 e0414cc: d65f03c0 ret 2347 2348000000000e0414d0 <bl31_plat_runtime_setup>: 2349 e0414d0: 52800040 mov w0, #0x2 // #2 2350 e0414d4: 140001c8 b e041bf4 <console_switch_state> 2351 2352000000000e0414d8 <bl31_platform_setup>: 2353 e0414d8: a9bf7bfd stp x29, x30, [sp, #-16]! 2354 e0414dc: 910003fd mov x29, sp 2355 e0414e0: 94000795 bl e043334 <plat_qemu_gic_init> 2356 e0414e4: 940006f2 bl e0430ac <pl061_gpio_init> 2357 e0414e8: a8c17bfd ldp x29, x30, [sp], #16 2358 e0414ec: 52800001 mov w1, #0x0 // #0 2359 e0414f0: d2a12160 mov x0, #0x90b0000 // #151715840 2360 e0414f4: 140006f1 b e0430b8 <pl061_gpio_register> 2361 2362000000000e0414f8 <bl31_prepare_next_image_entry>: 2363 e0414f8: a9be7bfd stp x29, x30, [sp, #-32]! 2364 e0414fc: 910003fd mov x29, sp 2365 e041500: a90153f3 stp x19, x20, [sp, #16] 2366 e041504: d5380400 mrs x0, id_aa64pfr0_el1 2367 e041508: d3441c00 ubfx x0, x0, #4, #4 2368 e04150c: f100041f cmp x0, #0x1 2369 e041510: 540000c1 b.ne e041528 <bl31_prepare_next_image_entry+0x30> // b.any 2370 e041514: d0000020 adrp x0, e047000 <__TEXT_END__> 2371 e041518: 910c5c00 add x0, x0, #0x317 2372 e04151c: 94000f11 bl e045160 <tf_log> 2373 e041520: 9400015b bl e041a8c <console_flush> 2374 e041524: 97fffd18 bl e040984 <do_panic> 2375 e041528: f0000020 adrp x0, e048000 <tf_xlat_ctx> 2376 e04152c: b9406014 ldr w20, [x0, #96] 2377 e041530: 2a1403e0 mov w0, w20 2378 e041534: 97ffffdd bl e0414a8 <bl31_plat_get_next_image_ep_info> 2379 e041538: aa0003f3 mov x19, x0 2380 e04153c: 94000790 bl e04337c <print_entry_point_info> 2381 e041540: aa1303e0 mov x0, x19 2382 e041544: 94000068 bl e0416e4 <cm_init_my_context> 2383 e041548: 2a1403e0 mov w0, w20 2384 e04154c: a94153f3 ldp x19, x20, [sp, #16] 2385 e041550: a8c27bfd ldp x29, x30, [sp], #32 2386 e041554: 14000070 b e041714 <cm_prepare_el3_exit> 2387 2388000000000e041558 <bl31_register_bl32_init>: 2389 e041558: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 2390 e04155c: f9054020 str x0, [x1, #2688] 2391 e041560: d65f03c0 ret 2392 2393000000000e041564 <bl31_setup>: 2394 e041564: a9bf7bfd stp x29, x30, [sp, #-16]! 2395 e041568: 910003fd mov x29, sp 2396 e04156c: 97ffff7b bl e041358 <bl31_early_platform_setup2> 2397 e041570: a8c17bfd ldp x29, x30, [sp], #16 2398 e041574: 17ffffba b e04145c <bl31_plat_arch_setup> 2399 2400000000000e041578 <cm_el1_sysregs_context_restore>: 2401 e041578: a9be7bfd stp x29, x30, [sp, #-32]! 2402 e04157c: 910003fd mov x29, sp 2403 e041580: a90153f3 stp x19, x20, [sp, #16] 2404 e041584: 2a0003f3 mov w19, w0 2405 e041588: 9400003a bl e041670 <cm_get_context> 2406 e04158c: 91054000 add x0, x0, #0x150 2407 e041590: 97fffd23 bl e040a1c <el1_sysregs_context_restore> 2408 e041594: 34000273 cbz w19, e0415e0 <cm_el1_sysregs_context_restore+0x68> 2409 e041598: d0000033 adrp x19, e047000 <__TEXT_END__> 2410 e04159c: d0000034 adrp x20, e047000 <__TEXT_END__> 2411 e0415a0: 9122a273 add x19, x19, #0x8a8 2412 e0415a4: 9122a294 add x20, x20, #0x8a8 2413 e0415a8: eb14027f cmp x19, x20 2414 e0415ac: 54000142 b.cs e0415d4 <cm_el1_sysregs_context_restore+0x5c> // b.hs, b.nlast 2415 e0415b0: f8408661 ldr x1, [x19], #8 2416 e0415b4: d2800000 mov x0, #0x0 // #0 2417 e0415b8: d63f0020 blr x1 2418 e0415bc: 17fffffb b e0415a8 <cm_el1_sysregs_context_restore+0x30> 2419 e0415c0: f8408661 ldr x1, [x19], #8 2420 e0415c4: d2800000 mov x0, #0x0 // #0 2421 e0415c8: d63f0020 blr x1 2422 e0415cc: eb14027f cmp x19, x20 2423 e0415d0: 54ffff83 b.cc e0415c0 <cm_el1_sysregs_context_restore+0x48> // b.lo, b.ul, b.last 2424 e0415d4: a94153f3 ldp x19, x20, [sp, #16] 2425 e0415d8: a8c27bfd ldp x29, x30, [sp], #32 2426 e0415dc: d65f03c0 ret 2427 e0415e0: d0000033 adrp x19, e047000 <__TEXT_END__> 2428 e0415e4: d0000034 adrp x20, e047000 <__TEXT_END__> 2429 e0415e8: 91228273 add x19, x19, #0x8a0 2430 e0415ec: 9122a294 add x20, x20, #0x8a8 2431 e0415f0: 17fffff7 b e0415cc <cm_el1_sysregs_context_restore+0x54> 2432 2433000000000e0415f4 <cm_el1_sysregs_context_save>: 2434 e0415f4: a9be7bfd stp x29, x30, [sp, #-32]! 2435 e0415f8: 910003fd mov x29, sp 2436 e0415fc: a90153f3 stp x19, x20, [sp, #16] 2437 e041600: 2a0003f3 mov w19, w0 2438 e041604: 9400001b bl e041670 <cm_get_context> 2439 e041608: 91054000 add x0, x0, #0x150 2440 e04160c: 97fffd37 bl e040ae8 <el1_sysregs_context_save> 2441 e041610: 34000273 cbz w19, e04165c <cm_el1_sysregs_context_save+0x68> 2442 e041614: d0000033 adrp x19, e047000 <__TEXT_END__> 2443 e041618: d0000034 adrp x20, e047000 <__TEXT_END__> 2444 e04161c: 9122a273 add x19, x19, #0x8a8 2445 e041620: 9122a294 add x20, x20, #0x8a8 2446 e041624: eb14027f cmp x19, x20 2447 e041628: 54000142 b.cs e041650 <cm_el1_sysregs_context_save+0x5c> // b.hs, b.nlast 2448 e04162c: f8408661 ldr x1, [x19], #8 2449 e041630: d2800000 mov x0, #0x0 // #0 2450 e041634: d63f0020 blr x1 2451 e041638: 17fffffb b e041624 <cm_el1_sysregs_context_save+0x30> 2452 e04163c: f8408661 ldr x1, [x19], #8 2453 e041640: d2800000 mov x0, #0x0 // #0 2454 e041644: d63f0020 blr x1 2455 e041648: eb14027f cmp x19, x20 2456 e04164c: 54ffff83 b.cc e04163c <cm_el1_sysregs_context_save+0x48> // b.lo, b.ul, b.last 2457 e041650: a94153f3 ldp x19, x20, [sp, #16] 2458 e041654: a8c27bfd ldp x29, x30, [sp], #32 2459 e041658: d65f03c0 ret 2460 e04165c: d0000033 adrp x19, e047000 <__TEXT_END__> 2461 e041660: d0000034 adrp x20, e047000 <__TEXT_END__> 2462 e041664: 9122a273 add x19, x19, #0x8a8 2463 e041668: 9122a294 add x20, x20, #0x8a8 2464 e04166c: 17fffff7 b e041648 <cm_el1_sysregs_context_save+0x54> 2465 2466000000000e041670 <cm_get_context>: 2467 e041670: d53ed041 mrs x1, tpidr_el3 2468 e041674: 7100001f cmp w0, #0x0 2469 e041678: 9a9f07e0 cset x0, ne // ne = any 2470 e04167c: f8607820 ldr x0, [x1, x0, lsl #3] 2471 e041680: d65f03c0 ret 2472 2473000000000e041684 <cm_get_context_by_index>: 2474 e041684: a9be7bfd stp x29, x30, [sp, #-32]! 2475 e041688: 910003fd mov x29, sp 2476 e04168c: f9000bf3 str x19, [sp, #16] 2477 e041690: 2a0103f3 mov w19, w1 2478 e041694: 97fffb1e bl e04030c <_cpu_data_by_index> 2479 e041698: 7100027f cmp w19, #0x0 2480 e04169c: 9a9f07e1 cset x1, ne // ne = any 2481 e0416a0: f9400bf3 ldr x19, [sp, #16] 2482 e0416a4: a8c27bfd ldp x29, x30, [sp], #32 2483 e0416a8: f8617800 ldr x0, [x0, x1, lsl #3] 2484 e0416ac: d65f03c0 ret 2485 2486000000000e0416b0 <cm_init>: 2487 e0416b0: d65f03c0 ret 2488 2489000000000e0416b4 <cm_init_context_by_index>: 2490 e0416b4: a9be7bfd stp x29, x30, [sp, #-32]! 2491 e0416b8: 910003fd mov x29, sp 2492 e0416bc: f9000bf3 str x19, [sp, #16] 2493 e0416c0: aa0103f3 mov x19, x1 2494 e0416c4: 52800421 mov w1, #0x21 // #33 2495 e0416c8: b9400662 ldr w2, [x19, #4] 2496 e0416cc: 0a010041 and w1, w2, w1 2497 e0416d0: 97ffffed bl e041684 <cm_get_context_by_index> 2498 e0416d4: aa1303e1 mov x1, x19 2499 e0416d8: f9400bf3 ldr x19, [sp, #16] 2500 e0416dc: a8c27bfd ldp x29, x30, [sp], #32 2501 e0416e0: 14000062 b e041868 <cm_setup_context> 2502 2503000000000e0416e4 <cm_init_my_context>: 2504 e0416e4: a9be7bfd stp x29, x30, [sp, #-32]! 2505 e0416e8: 910003fd mov x29, sp 2506 e0416ec: f9000bf3 str x19, [sp, #16] 2507 e0416f0: aa0003f3 mov x19, x0 2508 e0416f4: 52800420 mov w0, #0x21 // #33 2509 e0416f8: b9400661 ldr w1, [x19, #4] 2510 e0416fc: 0a000020 and w0, w1, w0 2511 e041700: 97ffffdc bl e041670 <cm_get_context> 2512 e041704: aa1303e1 mov x1, x19 2513 e041708: f9400bf3 ldr x19, [sp, #16] 2514 e04170c: a8c27bfd ldp x29, x30, [sp], #32 2515 e041710: 14000056 b e041868 <cm_setup_context> 2516 2517000000000e041714 <cm_prepare_el3_exit>: 2518 e041714: a9be7bfd stp x29, x30, [sp, #-32]! 2519 e041718: 910003fd mov x29, sp 2520 e04171c: f9000bf3 str x19, [sp, #16] 2521 e041720: 2a0003f3 mov w19, w0 2522 e041724: 97ffffd3 bl e041670 <cm_get_context> 2523 e041728: 7100067f cmp w19, #0x1 2524 e04172c: 540004e1 b.ne e0417c8 <cm_prepare_el3_exit+0xb4> // b.any 2525 e041730: f9408001 ldr x1, [x0, #256] 2526 e041734: 92780022 and x2, x1, #0x100 2527 e041738: 36400121 tbz w1, #8, e04175c <cm_prepare_el3_exit+0x48> 2528 e04173c: f940b000 ldr x0, [x0, #352] 2529 e041740: d2810601 mov x1, #0x830 // #2096 2530 e041744: f2a618a1 movk x1, #0x30c5, lsl #16 2531 e041748: 92670000 and x0, x0, #0x2000000 2532 e04174c: aa010000 orr x0, x0, x1 2533 e041750: d51c1000 msr sctlr_el2, x0 2534 e041754: 52800000 mov w0, #0x0 // #0 2535 e041758: 1400001b b e0417c4 <cm_prepare_el3_exit+0xb0> 2536 e04175c: d5380400 mrs x0, id_aa64pfr0_el1 2537 e041760: f2780c1f tst x0, #0xf00 2538 e041764: 54ffff80 b.eq e041754 <cm_prepare_el3_exit+0x40> // b.none 2539 e041768: f2760021 ands x1, x1, #0x400 2540 e04176c: d2b00000 mov x0, #0x80000000 // #2147483648 2541 e041770: 9a800021 csel x1, x1, x0, eq // eq = none 2542 e041774: b2580421 orr x1, x1, #0x30000000000 2543 e041778: d51c1101 msr hcr_el2, x1 2544 e04177c: d2867fe0 mov x0, #0x33ff // #13311 2545 e041780: d51c1140 msr cptr_el2, x0 2546 e041784: d2800060 mov x0, #0x3 // #3 2547 e041788: d51ce100 msr cnthctl_el2, x0 2548 e04178c: d51ce062 msr cntvoff_el2, x2 2549 e041790: d5380000 mrs x0, midr_el1 2550 e041794: d51c0000 msr vpidr_el2, x0 2551 e041798: d53800a0 mrs x0, mpidr_el1 2552 e04179c: d51c00a0 msr vmpidr_el2, x0 2553 e0417a0: d51c2102 msr vttbr_el2, x2 2554 e0417a4: d53b9c00 mrs x0, pmcr_el0 2555 e0417a8: d34b3c00 ubfx x0, x0, #11, #5 2556 e0417ac: d2a08041 mov x1, #0x4020000 // #67239936 2557 e0417b0: aa010000 orr x0, x0, x1 2558 e0417b4: d51c1120 msr mdcr_el2, x0 2559 e0417b8: d51c1162 msr hstr_el2, x2 2560 e0417bc: d51ce222 msr cnthp_ctl_el2, x2 2561 e0417c0: 2a1303e0 mov w0, w19 2562 e0417c4: 94000e09 bl e044fe8 <spe_enable> 2563 e0417c8: 2a1303e0 mov w0, w19 2564 e0417cc: 97ffff6b bl e041578 <cm_el1_sysregs_context_restore> 2565 e0417d0: 2a1303e0 mov w0, w19 2566 e0417d4: f9400bf3 ldr x19, [sp, #16] 2567 e0417d8: a8c27bfd ldp x29, x30, [sp], #32 2568 e0417dc: 1400001b b e041848 <cm_set_next_eret_context> 2569 2570000000000e0417e0 <cm_set_context>: 2571 e0417e0: d53ed042 mrs x2, tpidr_el3 2572 e0417e4: 7100003f cmp w1, #0x0 2573 e0417e8: 9a9f07e1 cset x1, ne // ne = any 2574 e0417ec: f8217840 str x0, [x2, x1, lsl #3] 2575 e0417f0: d65f03c0 ret 2576 2577000000000e0417f4 <cm_set_context_by_index>: 2578 e0417f4: a9be7bfd stp x29, x30, [sp, #-32]! 2579 e0417f8: 910003fd mov x29, sp 2580 e0417fc: a90153f3 stp x19, x20, [sp, #16] 2581 e041800: aa0103f3 mov x19, x1 2582 e041804: 2a0203f4 mov w20, w2 2583 e041808: 97fffac1 bl e04030c <_cpu_data_by_index> 2584 e04180c: 7100029f cmp w20, #0x0 2585 e041810: 9a9f07e1 cset x1, ne // ne = any 2586 e041814: f8217813 str x19, [x0, x1, lsl #3] 2587 e041818: a94153f3 ldp x19, x20, [sp, #16] 2588 e04181c: a8c27bfd ldp x29, x30, [sp], #32 2589 e041820: d65f03c0 ret 2590 2591000000000e041824 <cm_set_elr_el3>: 2592 e041824: a9be7bfd stp x29, x30, [sp, #-32]! 2593 e041828: 910003fd mov x29, sp 2594 e04182c: f9000bf3 str x19, [sp, #16] 2595 e041830: aa0103f3 mov x19, x1 2596 e041834: 97ffff8f bl e041670 <cm_get_context> 2597 e041838: f9009013 str x19, [x0, #288] 2598 e04183c: f9400bf3 ldr x19, [sp, #16] 2599 e041840: a8c27bfd ldp x29, x30, [sp], #32 2600 e041844: d65f03c0 ret 2601 2602000000000e041848 <cm_set_next_eret_context>: 2603 e041848: a9bf7bfd stp x29, x30, [sp, #-16]! 2604 e04184c: 910003fd mov x29, sp 2605 e041850: 97ffff88 bl e041670 <cm_get_context> 2606 e041854: d50041bf msr spsel, #0x1 2607 e041858: 9100001f mov sp, x0 2608 e04185c: d50040bf msr spsel, #0x0 2609 e041860: a8c17bfd ldp x29, x30, [sp], #16 2610 e041864: d65f03c0 ret 2611 2612000000000e041868 <cm_setup_context>: 2613 e041868: a9bd7bfd stp x29, x30, [sp, #-48]! 2614 e04186c: 910003fd mov x29, sp 2615 e041870: a90153f3 stp x19, x20, [sp, #16] 2616 e041874: b9400434 ldr w20, [x1, #4] 2617 e041878: a9025bf5 stp x21, x22, [sp, #32] 2618 e04187c: aa0103f5 mov x21, x1 2619 e041880: 52800421 mov w1, #0x21 // #33 2620 e041884: aa0003f6 mov x22, x0 2621 e041888: 0a010294 and w20, w20, w1 2622 e04188c: d2804e01 mov x1, #0x270 // #624 2623 e041890: 97fffe3a bl e041178 <zeromem> 2624 e041894: d53e1113 mrs x19, scr_el3 2625 e041898: 9281a0e0 mov x0, #0xfffffffffffff2f8 // #-3336 2626 e04189c: 8a000273 and x19, x19, x0 2627 e0418a0: 7100069f cmp w20, #0x1 2628 e0418a4: 54000041 b.ne e0418ac <cm_setup_context+0x44> // b.any 2629 e0418a8: b2400273 orr x19, x19, #0x1 2630 e0418ac: b94012a0 ldr w0, [x21, #16] 2631 e0418b0: 37200040 tbnz w0, #4, e0418b8 <cm_setup_context+0x50> 2632 e0418b4: b2760273 orr x19, x19, #0x400 2633 e0418b8: b94006a0 ldr w0, [x21, #4] 2634 e0418bc: 36100040 tbz w0, #2, e0418c4 <cm_setup_context+0x5c> 2635 e0418c0: b2750273 orr x19, x19, #0x800 2636 e0418c4: 927cfa73 and x19, x19, #0xfffffffffffffff7 2637 e0418c8: 7100069f cmp w20, #0x1 2638 e0418cc: 54000041 b.ne e0418d4 <cm_setup_context+0x6c> // b.any 2639 e0418d0: b2700673 orr x19, x19, #0x30000 2640 e0418d4: d5380420 mrs x0, id_aa64pfr1_el1 2641 e0418d8: 53082c00 ubfx w0, w0, #8, #4 2642 e0418dc: 7100041f cmp w0, #0x1 2643 e0418e0: 540000c0 b.eq e0418f8 <cm_setup_context+0x90> // b.none 2644 e0418e4: 51000800 sub w0, w0, #0x2 2645 e0418e8: 7100041f cmp w0, #0x1 2646 e0418ec: 54000088 b.hi e0418fc <cm_setup_context+0x94> // b.pmore 2647 e0418f0: 7100069f cmp w20, #0x1 2648 e0418f4: 54000041 b.ne e0418fc <cm_setup_context+0x94> // b.any 2649 e0418f8: b2660273 orr x19, x19, #0x4000000 2650 e0418fc: 7100869f cmp w20, #0x21 2651 e041900: 54000080 b.eq e041910 <cm_setup_context+0xa8> // b.none 2652 e041904: 2a1403e0 mov w0, w20 2653 e041908: 940000dc bl e041c78 <get_scr_el3_from_routing_model> 2654 e04190c: aa000273 orr x19, x19, x0 2655 e041910: d53e1140 mrs x0, cptr_el3 2656 e041914: f9009ec0 str x0, [x22, #312] 2657 e041918: b94012a0 ldr w0, [x21, #16] 2658 e04191c: d3441003 ubfx x3, x0, #4, #1 2659 e041920: 37200240 tbnz w0, #4, e041968 <cm_setup_context+0x100> 2660 e041924: d3420c01 ubfx x1, x0, #2, #2 2661 e041928: 7100083f cmp w1, #0x2 2662 e04192c: 540003a1 b.ne e0419a0 <cm_setup_context+0x138> // b.any 2663 e041930: d5380702 mrs x2, id_aa64mmfr0_el1 2664 e041934: d2802001 mov x1, #0x100 // #256 2665 e041938: d378ec42 ubfx x2, x2, #56, #4 2666 e04193c: b2780264 orr x4, x19, #0x100 2667 e041940: f100045f cmp x2, #0x1 2668 e041944: f2a10001 movk x1, #0x800, lsl #16 2669 e041948: aa010273 orr x19, x19, x1 2670 e04194c: 9a840273 csel x19, x19, x4, eq // eq = none 2671 e041950: d5380701 mrs x1, id_aa64mmfr0_el1 2672 e041954: d37cfc21 lsr x1, x1, #60 2673 e041958: f100083f cmp x1, #0x2 2674 e04195c: 540000c1 b.ne e041974 <cm_setup_context+0x10c> // b.any 2675 e041960: b2640273 orr x19, x19, #0x10000000 2676 e041964: 14000004 b e041974 <cm_setup_context+0x10c> 2677 e041968: 12000c01 and w1, w0, #0xf 2678 e04196c: 7100283f cmp w1, #0xa 2679 e041970: 54fffe00 b.eq e041930 <cm_setup_context+0xc8> // b.none 2680 e041974: 35000174 cbnz w20, e0419a0 <cm_setup_context+0x138> 2681 e041978: d3420c00 ubfx x0, x0, #2, #2 2682 e04197c: 7100081f cmp w0, #0x2 2683 e041980: 54000101 b.ne e0419a0 <cm_setup_context+0x138> // b.any 2684 e041984: b26e0273 orr x19, x19, #0x40000 2685 e041988: 340000c3 cbz w3, e0419a0 <cm_setup_context+0x138> 2686 e04198c: d0000020 adrp x0, e047000 <__TEXT_END__> 2687 e041990: 910f9400 add x0, x0, #0x3e5 2688 e041994: 94000df3 bl e045160 <tf_log> 2689 e041998: 9400003d bl e041a8c <console_flush> 2690 e04199c: 97fffbfa bl e040984 <do_panic> 2691 e0419a0: d5380400 mrs x0, id_aa64pfr0_el1 2692 e0419a4: d36cfc00 lsr x0, x0, #44 2693 e0419a8: f27f081f tst x0, #0xe 2694 e0419ac: 540000a0 b.eq e0419c0 <cm_setup_context+0x158> // b.none 2695 e0419b0: d5380400 mrs x0, id_aa64pfr0_el1 2696 e0419b4: f2780c1f tst x0, #0xf00 2697 e0419b8: 54000040 b.eq e0419c0 <cm_setup_context+0x158> // b.none 2698 e0419bc: b25d0273 orr x19, x19, #0x800000000 2699 e0419c0: b94006a2 ldr w2, [x21, #4] 2700 e0419c4: d2810014 mov x20, #0x800 // #2048 2701 e0419c8: d2810700 mov x0, #0x838 // #2104 2702 e0419cc: 7100007f cmp w3, #0x0 2703 e0419d0: f2a018a0 movk x0, #0xc5, lsl #16 2704 e0419d4: f2a61a14 movk x20, #0x30d0, lsl #16 2705 e0419d8: d3689c42 lsl x2, x2, #24 2706 e0419dc: 92670042 and x2, x2, #0x2000000 2707 e0419e0: aa140054 orr x20, x2, x20 2708 e0419e4: aa000042 orr x2, x2, x0 2709 e0419e8: 9a941054 csel x20, x2, x20, ne // ne = any 2710 e0419ec: d5380720 mrs x0, id_aa64mmfr1_el1 2711 e0419f0: d3608c00 ubfx x0, x0, #32, #4 2712 e0419f4: f100041f cmp x0, #0x1 2713 e0419f8: 540000c1 b.ne e041a10 <cm_setup_context+0x1a8> // b.any 2714 e0419fc: 940005dc bl e04316c <plat_arm_set_twedel_scr_el3> 2715 e041a00: 3100041f cmn w0, #0x1 2716 e041a04: 54000060 b.eq e041a10 <cm_setup_context+0x1a8> // b.none 2717 e041a08: b3620c13 bfi x19, x0, #30, #4 2718 e041a0c: b2630273 orr x19, x19, #0x20000000 2719 e041a10: f900b2d4 str x20, [x22, #352] 2720 e041a14: d5381020 mrs x0, actlr_el1 2721 e041a18: f94006a1 ldr x1, [x21, #8] 2722 e041a1c: f90092c1 str x1, [x22, #288] 2723 e041a20: b94012a1 ldr w1, [x21, #16] 2724 e041a24: d2800802 mov x2, #0x40 // #64 2725 e041a28: f90082d3 str x19, [x22, #256] 2726 e041a2c: f900dac0 str x0, [x22, #432] 2727 e041a30: aa1603e0 mov x0, x22 2728 e041a34: a94153f3 ldp x19, x20, [sp, #16] 2729 e041a38: f9008ec1 str x1, [x22, #280] 2730 e041a3c: 910062a1 add x1, x21, #0x18 2731 e041a40: a9425bf5 ldp x21, x22, [sp, #32] 2732 e041a44: a8c37bfd ldp x29, x30, [sp], #48 2733 e041a48: 140002f2 b e042610 <memcpy> 2734 2735000000000e041a4c <cm_write_scr_el3_bit>: 2736 e041a4c: a9be7bfd stp x29, x30, [sp, #-32]! 2737 e041a50: 910003fd mov x29, sp 2738 e041a54: a90153f3 stp x19, x20, [sp, #16] 2739 e041a58: 2a0103f4 mov w20, w1 2740 e041a5c: 2a0203f3 mov w19, w2 2741 e041a60: 97ffff04 bl e041670 <cm_get_context> 2742 e041a64: f9408001 ldr x1, [x0, #256] 2743 e041a68: d2800022 mov x2, #0x1 // #1 2744 e041a6c: 9ad42042 lsl x2, x2, x20 2745 e041a70: 8a220022 bic x2, x1, x2 2746 e041a74: 9ad42273 lsl x19, x19, x20 2747 e041a78: aa020273 orr x19, x19, x2 2748 e041a7c: f9008013 str x19, [x0, #256] 2749 e041a80: a94153f3 ldp x19, x20, [sp, #16] 2750 e041a84: a8c27bfd ldp x29, x30, [sp], #32 2751 e041a88: d65f03c0 ret 2752 2753000000000e041a8c <console_flush>: 2754 e041a8c: a9be7bfd stp x29, x30, [sp, #-32]! 2755 e041a90: b0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 2756 e041a94: 910003fd mov x29, sp 2757 e041a98: a90153f3 stp x19, x20, [sp, #16] 2758 e041a9c: f0000034 adrp x20, e048000 <tf_xlat_ctx> 2759 e041aa0: 9101ae94 add x20, x20, #0x6b 2760 e041aa4: f9465013 ldr x19, [x0, #3232] 2761 e041aa8: b5000093 cbnz x19, e041ab8 <console_flush+0x2c> 2762 e041aac: a94153f3 ldp x19, x20, [sp, #16] 2763 e041ab0: a8c27bfd ldp x29, x30, [sp], #32 2764 e041ab4: d65f03c0 ret 2765 e041ab8: f9400660 ldr x0, [x19, #8] 2766 e041abc: 39400281 ldrb w1, [x20] 2767 e041ac0: ea00003f tst x1, x0 2768 e041ac4: 540000a0 b.eq e041ad8 <console_flush+0x4c> // b.none 2769 e041ac8: f9401261 ldr x1, [x19, #32] 2770 e041acc: b4000061 cbz x1, e041ad8 <console_flush+0x4c> 2771 e041ad0: aa1303e0 mov x0, x19 2772 e041ad4: d63f0020 blr x1 2773 e041ad8: f9400273 ldr x19, [x19] 2774 e041adc: 17fffff3 b e041aa8 <console_flush+0x1c> 2775 2776000000000e041ae0 <console_is_registered>: 2777 e041ae0: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 2778 e041ae4: f9465021 ldr x1, [x1, #3232] 2779 e041ae8: b5000061 cbnz x1, e041af4 <console_is_registered+0x14> 2780 e041aec: 52800000 mov w0, #0x0 // #0 2781 e041af0: d65f03c0 ret 2782 e041af4: eb00003f cmp x1, x0 2783 e041af8: 54000060 b.eq e041b04 <console_is_registered+0x24> // b.none 2784 e041afc: f9400021 ldr x1, [x1] 2785 e041b00: 17fffffa b e041ae8 <console_is_registered+0x8> 2786 e041b04: 52800020 mov w0, #0x1 // #1 2787 e041b08: 17fffffa b e041af0 <console_is_registered+0x10> 2788 2789000000000e041b0c <console_putc>: 2790 e041b0c: a9bd7bfd stp x29, x30, [sp, #-48]! 2791 e041b10: 910003fd mov x29, sp 2792 e041b14: a9025bf5 stp x21, x22, [sp, #32] 2793 e041b18: 2a0003f5 mov w21, w0 2794 e041b1c: b0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 2795 e041b20: a90153f3 stp x19, x20, [sp, #16] 2796 e041b24: f0000036 adrp x22, e048000 <tf_xlat_ctx> 2797 e041b28: 9101aed6 add x22, x22, #0x6b 2798 e041b2c: f9465013 ldr x19, [x0, #3232] 2799 e041b30: 12800ff4 mov w20, #0xffffff80 // #-128 2800 e041b34: b50000d3 cbnz x19, e041b4c <console_putc+0x40> 2801 e041b38: 2a1403e0 mov w0, w20 2802 e041b3c: a94153f3 ldp x19, x20, [sp, #16] 2803 e041b40: a9425bf5 ldp x21, x22, [sp, #32] 2804 e041b44: a8c37bfd ldp x29, x30, [sp], #48 2805 e041b48: d65f03c0 ret 2806 e041b4c: f9400660 ldr x0, [x19, #8] 2807 e041b50: 394002c1 ldrb w1, [x22] 2808 e041b54: ea00003f tst x1, x0 2809 e041b58: 54000180 b.eq e041b88 <console_putc+0x7c> // b.none 2810 e041b5c: f9400a62 ldr x2, [x19, #16] 2811 e041b60: b4000142 cbz x2, e041b88 <console_putc+0x7c> 2812 e041b64: 71002abf cmp w21, #0xa 2813 e041b68: 54000140 b.eq e041b90 <console_putc+0x84> // b.none 2814 e041b6c: f9400a62 ldr x2, [x19, #16] 2815 e041b70: aa1303e1 mov x1, x19 2816 e041b74: 2a1503e0 mov w0, w21 2817 e041b78: d63f0040 blr x2 2818 e041b7c: 3102029f cmn w20, #0x80 2819 e041b80: 7a401280 ccmp w20, w0, #0x0, ne // ne = any 2820 e041b84: 1a80d294 csel w20, w20, w0, le 2821 e041b88: f9400273 ldr x19, [x19] 2822 e041b8c: 17ffffea b e041b34 <console_putc+0x28> 2823 e041b90: 3647fee0 tbz w0, #8, e041b6c <console_putc+0x60> 2824 e041b94: aa1303e1 mov x1, x19 2825 e041b98: 528001a0 mov w0, #0xd // #13 2826 e041b9c: d63f0040 blr x2 2827 e041ba0: 36fffe60 tbz w0, #31, e041b6c <console_putc+0x60> 2828 e041ba4: 17fffff6 b e041b7c <console_putc+0x70> 2829 2830000000000e041ba8 <console_register>: 2831 e041ba8: a9bf7bfd stp x29, x30, [sp, #-16]! 2832 e041bac: aa0003e2 mov x2, x0 2833 e041bb0: 910003fd mov x29, sp 2834 e041bb4: 97ffffcb bl e041ae0 <console_is_registered> 2835 e041bb8: 7100041f cmp w0, #0x1 2836 e041bbc: 540000a0 b.eq e041bd0 <console_register+0x28> // b.none 2837 e041bc0: b0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 2838 e041bc4: f9465001 ldr x1, [x0, #3232] 2839 e041bc8: f9000041 str x1, [x2] 2840 e041bcc: f9065002 str x2, [x0, #3232] 2841 e041bd0: 52800020 mov w0, #0x1 // #1 2842 e041bd4: a8c17bfd ldp x29, x30, [sp], #16 2843 e041bd8: d65f03c0 ret 2844 2845000000000e041bdc <console_set_scope>: 2846 e041bdc: f9400402 ldr x2, [x0, #8] 2847 e041be0: 2a0103e1 mov w1, w1 2848 e041be4: 92785c42 and x2, x2, #0xffffff00 2849 e041be8: aa010042 orr x2, x2, x1 2850 e041bec: f9000402 str x2, [x0, #8] 2851 e041bf0: d65f03c0 ret 2852 2853000000000e041bf4 <console_switch_state>: 2854 e041bf4: f0000021 adrp x1, e048000 <tf_xlat_ctx> 2855 e041bf8: 3901ac20 strb w0, [x1, #107] 2856 e041bfc: d65f03c0 ret 2857 2858000000000e041c00 <enable_mmu_el3>: 2859 e041c00: f0000022 adrp x2, e048000 <tf_xlat_ctx> 2860 e041c04: 91000042 add x2, x2, #0x0 2861 e041c08: a9be7bfd stp x29, x30, [sp, #-32]! 2862 e041c0c: 2a0003e1 mov w1, w0 2863 e041c10: 52800065 mov w5, #0x3 // #3 2864 e041c14: 910003fd mov x29, sp 2865 e041c18: f9400444 ldr x4, [x2, #8] 2866 e041c1c: f9402043 ldr x3, [x2, #64] 2867 e041c20: f9401842 ldr x2, [x2, #48] 2868 e041c24: f9000bf3 str x19, [sp, #16] 2869 e041c28: 2a0003f3 mov w19, w0 2870 e041c2c: b0000080 adrp x0, e052000 <opteed_sp_context+0xa00> 2871 e041c30: 91336000 add x0, x0, #0xcd8 2872 e041c34: 94000cc2 bl e044f3c <setup_mmu_cfg> 2873 e041c38: 2a1303e0 mov w0, w19 2874 e041c3c: f9400bf3 ldr x19, [sp, #16] 2875 e041c40: a8c27bfd ldp x29, x30, [sp], #32 2876 e041c44: 17fffbf1 b e040c08 <enable_mmu_direct_el3> 2877 2878000000000e041c48 <get_arm_std_svc_args>: 2879 e041c48: d0000020 adrp x0, e047000 <__TEXT_END__> 2880 e041c4c: 91000000 add x0, x0, #0x0 2881 e041c50: d65f03c0 ret 2882 2883000000000e041c54 <get_interrupt_type_handler>: 2884 e041c54: 7100081f cmp w0, #0x2 2885 e041c58: 540000c8 b.hi e041c70 <get_interrupt_type_handler+0x1c> // b.pmore 2886 e041c5c: d37b7c00 ubfiz x0, x0, #5, #32 2887 e041c60: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 2888 e041c64: 912a2021 add x1, x1, #0xa88 2889 e041c68: f8606820 ldr x0, [x1, x0] 2890 e041c6c: d65f03c0 ret 2891 e041c70: d2800000 mov x0, #0x0 // #0 2892 e041c74: 17fffffe b e041c6c <get_interrupt_type_handler+0x18> 2893 2894000000000e041c78 <get_scr_el3_from_routing_model>: 2895 e041c78: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 2896 e041c7c: 912a2022 add x2, x1, #0xa88 2897 e041c80: 2a0003e1 mov w1, w0 2898 e041c84: 8b010c40 add x0, x2, x1, lsl #3 2899 e041c88: 8b010c43 add x3, x2, x1, lsl #3 2900 e041c8c: 8b010c41 add x1, x2, x1, lsl #3 2901 e041c90: f9400463 ldr x3, [x3, #8] 2902 e041c94: f9402400 ldr x0, [x0, #72] 2903 e041c98: f9401421 ldr x1, [x1, #40] 2904 e041c9c: aa030000 orr x0, x0, x3 2905 e041ca0: aa010000 orr x0, x0, x1 2906 e041ca4: d65f03c0 ret 2907 2908000000000e041ca8 <gicd_clr_igroupr>: 2909 e041ca8: 53057c23 lsr w3, w1, #5 2910 e041cac: 91020000 add x0, x0, #0x80 2911 e041cb0: 52800022 mov w2, #0x1 // #1 2912 e041cb4: d37ef463 lsl x3, x3, #2 2913 e041cb8: 1ac12041 lsl w1, w2, w1 2914 e041cbc: b8606864 ldr w4, [x3, x0] 2915 e041cc0: 0a210081 bic w1, w4, w1 2916 e041cc4: b8206861 str w1, [x3, x0] 2917 e041cc8: d65f03c0 ret 2918 2919000000000e041ccc <gicd_clr_igrpmodr>: 2920 e041ccc: 53057c23 lsr w3, w1, #5 2921 e041cd0: 91340000 add x0, x0, #0xd00 2922 e041cd4: 52800022 mov w2, #0x1 // #1 2923 e041cd8: d37ef463 lsl x3, x3, #2 2924 e041cdc: 1ac12041 lsl w1, w2, w1 2925 e041ce0: b8606864 ldr w4, [x3, x0] 2926 e041ce4: 0a210081 bic w1, w4, w1 2927 e041ce8: b8206861 str w1, [x3, x0] 2928 e041cec: d65f03c0 ret 2929 2930000000000e041cf0 <gicd_set_icfgr>: 2931 e041cf0: 531f0c24 ubfiz w4, w1, #1, #4 2932 e041cf4: 53047c21 lsr w1, w1, #4 2933 e041cf8: 91300000 add x0, x0, #0xc00 2934 e041cfc: 12000442 and w2, w2, #0x3 2935 e041d00: d37ef421 lsl x1, x1, #2 2936 e041d04: 52800063 mov w3, #0x3 // #3 2937 e041d08: 1ac42063 lsl w3, w3, w4 2938 e041d0c: 1ac42042 lsl w2, w2, w4 2939 e041d10: b8606825 ldr w5, [x1, x0] 2940 e041d14: 0a2300a3 bic w3, w5, w3 2941 e041d18: 2a020063 orr w3, w3, w2 2942 e041d1c: b8206823 str w3, [x1, x0] 2943 e041d20: d65f03c0 ret 2944 2945000000000e041d24 <gicd_set_igrpmodr>: 2946 e041d24: 53057c23 lsr w3, w1, #5 2947 e041d28: 91340000 add x0, x0, #0xd00 2948 e041d2c: 52800022 mov w2, #0x1 // #1 2949 e041d30: d37ef463 lsl x3, x3, #2 2950 e041d34: 1ac12041 lsl w1, w2, w1 2951 e041d38: b8606864 ldr w4, [x3, x0] 2952 e041d3c: 2a040021 orr w1, w1, w4 2953 e041d40: b8206861 str w1, [x3, x0] 2954 e041d44: d65f03c0 ret 2955 2956000000000e041d48 <gicd_set_ipriorityr>: 2957 e041d48: 91100000 add x0, x0, #0x400 2958 e041d4c: 2a0103e1 mov w1, w1 2959 e041d50: 12001c42 and w2, w2, #0xff 2960 e041d54: 38216802 strb w2, [x0, x1] 2961 e041d58: d65f03c0 ret 2962 2963000000000e041d5c <gicd_set_isenabler>: 2964 e041d5c: 52800022 mov w2, #0x1 // #1 2965 e041d60: 91040000 add x0, x0, #0x100 2966 e041d64: 1ac12042 lsl w2, w2, w1 2967 e041d68: 53057c21 lsr w1, w1, #5 2968 e041d6c: d37ef421 lsl x1, x1, #2 2969 e041d70: b8206822 str w2, [x1, x0] 2970 e041d74: d65f03c0 ret 2971 2972000000000e041d78 <gicd_wait_for_pending_write>: 2973 e041d78: b9400001 ldr w1, [x0] 2974 e041d7c: 37ffffe1 tbnz w1, #31, e041d78 <gicd_wait_for_pending_write> 2975 e041d80: d65f03c0 ret 2976 2977000000000e041d84 <gicd_write_icfgr>: 2978 e041d84: 53047c21 lsr w1, w1, #4 2979 e041d88: 91300000 add x0, x0, #0xc00 2980 e041d8c: d37ef421 lsl x1, x1, #2 2981 e041d90: b8206822 str w2, [x1, x0] 2982 e041d94: d65f03c0 ret 2983 2984000000000e041d98 <gicd_write_igroupr>: 2985 e041d98: 53057c21 lsr w1, w1, #5 2986 e041d9c: 91020000 add x0, x0, #0x80 2987 e041da0: d37ef421 lsl x1, x1, #2 2988 e041da4: b8206822 str w2, [x1, x0] 2989 e041da8: d65f03c0 ret 2990 2991000000000e041dac <gicd_write_ipriorityr>: 2992 e041dac: 927e7421 and x1, x1, #0xfffffffc 2993 e041db0: 91100000 add x0, x0, #0x400 2994 e041db4: b8206822 str w2, [x1, x0] 2995 e041db8: d65f03c0 ret 2996 2997000000000e041dbc <gicr_clr_igroupr>: 2998 e041dbc: 53057c23 lsr w3, w1, #5 2999 e041dc0: 91404000 add x0, x0, #0x10, lsl #12 3000 e041dc4: 91020000 add x0, x0, #0x80 3001 e041dc8: 52800022 mov w2, #0x1 // #1 3002 e041dcc: d37ef463 lsl x3, x3, #2 3003 e041dd0: 1ac12041 lsl w1, w2, w1 3004 e041dd4: b8606864 ldr w4, [x3, x0] 3005 e041dd8: 0a210081 bic w1, w4, w1 3006 e041ddc: b8206861 str w1, [x3, x0] 3007 e041de0: d65f03c0 ret 3008 3009000000000e041de4 <gicr_clr_igrpmodr>: 3010 e041de4: 53057c23 lsr w3, w1, #5 3011 e041de8: 91404000 add x0, x0, #0x10, lsl #12 3012 e041dec: 91340000 add x0, x0, #0xd00 3013 e041df0: 52800022 mov w2, #0x1 // #1 3014 e041df4: d37ef463 lsl x3, x3, #2 3015 e041df8: 1ac12041 lsl w1, w2, w1 3016 e041dfc: b8606864 ldr w4, [x3, x0] 3017 e041e00: 0a210081 bic w1, w4, w1 3018 e041e04: b8206861 str w1, [x3, x0] 3019 e041e08: d65f03c0 ret 3020 3021000000000e041e0c <gicr_set_icfgr>: 3022 e041e0c: 531f0c24 ubfiz w4, w1, #1, #4 3023 e041e10: 53047c21 lsr w1, w1, #4 3024 e041e14: 91404000 add x0, x0, #0x10, lsl #12 3025 e041e18: 12000442 and w2, w2, #0x3 3026 e041e1c: d37ef421 lsl x1, x1, #2 3027 e041e20: 91300000 add x0, x0, #0xc00 3028 e041e24: 52800063 mov w3, #0x3 // #3 3029 e041e28: 1ac42042 lsl w2, w2, w4 3030 e041e2c: 1ac42063 lsl w3, w3, w4 3031 e041e30: b8606825 ldr w5, [x1, x0] 3032 e041e34: 0a2300a3 bic w3, w5, w3 3033 e041e38: 2a020063 orr w3, w3, w2 3034 e041e3c: b8206823 str w3, [x1, x0] 3035 e041e40: d65f03c0 ret 3036 3037000000000e041e44 <gicr_set_igrpmodr>: 3038 e041e44: 53057c23 lsr w3, w1, #5 3039 e041e48: 91404000 add x0, x0, #0x10, lsl #12 3040 e041e4c: 91340000 add x0, x0, #0xd00 3041 e041e50: 52800022 mov w2, #0x1 // #1 3042 e041e54: d37ef463 lsl x3, x3, #2 3043 e041e58: 1ac12041 lsl w1, w2, w1 3044 e041e5c: b8606864 ldr w4, [x3, x0] 3045 e041e60: 2a040021 orr w1, w1, w4 3046 e041e64: b8206861 str w1, [x3, x0] 3047 e041e68: d65f03c0 ret 3048 3049000000000e041e6c <gicr_set_ipriorityr>: 3050 e041e6c: 91404000 add x0, x0, #0x10, lsl #12 3051 e041e70: 2a0103e1 mov w1, w1 3052 e041e74: 91100000 add x0, x0, #0x400 3053 e041e78: 12001c42 and w2, w2, #0xff 3054 e041e7c: 38216802 strb w2, [x0, x1] 3055 e041e80: d65f03c0 ret 3056 3057000000000e041e84 <gicr_set_isenabler>: 3058 e041e84: 52800022 mov w2, #0x1 // #1 3059 e041e88: 91404000 add x0, x0, #0x10, lsl #12 3060 e041e8c: 1ac12042 lsl w2, w2, w1 3061 e041e90: 53057c21 lsr w1, w1, #5 3062 e041e94: 91040000 add x0, x0, #0x100 3063 e041e98: d37ef421 lsl x1, x1, #2 3064 e041e9c: b8206822 str w2, [x1, x0] 3065 e041ea0: d65f03c0 ret 3066 3067000000000e041ea4 <gicr_write_ipriorityr>: 3068 e041ea4: 91404000 add x0, x0, #0x10, lsl #12 3069 e041ea8: 927e7421 and x1, x1, #0xfffffffc 3070 e041eac: 91100000 add x0, x0, #0x400 3071 e041eb0: b8206822 str w2, [x1, x0] 3072 e041eb4: d65f03c0 ret 3073 3074000000000e041eb8 <gicv3_cpuif_disable>: 3075 e041eb8: d53ecca1 mrs x1, s3_6_c12_c12_5 3076 e041ebc: b27f0421 orr x1, x1, #0x6 3077 e041ec0: d51ecca1 msr s3_6_c12_c12_5, x1 3078 e041ec4: d538ccc1 mrs x1, s3_0_c12_c12_6 3079 e041ec8: 927f7821 and x1, x1, #0xfffffffe 3080 e041ecc: d518ccc1 msr s3_0_c12_c12_6, x1 3081 e041ed0: d53ecce1 mrs x1, s3_6_c12_c12_7 3082 e041ed4: 927e7421 and x1, x1, #0xfffffffc 3083 e041ed8: d51ecce1 msr s3_6_c12_c12_7, x1 3084 e041edc: d5033fdf isb 3085 e041ee0: d5033f9f dsb sy 3086 e041ee4: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 3087 e041ee8: f9457421 ldr x1, [x1, #2792] 3088 e041eec: f9401021 ldr x1, [x1, #32] 3089 e041ef0: f8605820 ldr x0, [x1, w0, uxtw #3] 3090 e041ef4: 140000c5 b e042208 <gicv3_rdistif_mark_core_asleep> 3091 3092000000000e041ef8 <gicv3_cpuif_enable>: 3093 e041ef8: a9bf7bfd stp x29, x30, [sp, #-16]! 3094 e041efc: b0000081 adrp x1, e052000 <opteed_sp_context+0xa00> 3095 e041f00: 910003fd mov x29, sp 3096 e041f04: f9457421 ldr x1, [x1, #2792] 3097 e041f08: f9401021 ldr x1, [x1, #32] 3098 e041f0c: f8605820 ldr x0, [x1, w0, uxtw #3] 3099 e041f10: 940000c5 bl e042224 <gicv3_rdistif_mark_core_awake> 3100 e041f14: d53ecca0 mrs x0, s3_6_c12_c12_5 3101 e041f18: b2400c00 orr x0, x0, #0xf 3102 e041f1c: d51ecca0 msr s3_6_c12_c12_5, x0 3103 e041f20: d53e1100 mrs x0, scr_el3 3104 e041f24: b2400001 orr x1, x0, #0x1 3105 e041f28: d51e1101 msr scr_el3, x1 3106 e041f2c: d5033fdf isb 3107 e041f30: d53cc9a1 mrs x1, s3_4_c12_c9_5 3108 e041f34: b2400c21 orr x1, x1, #0xf 3109 e041f38: d51cc9a1 msr s3_4_c12_c9_5, x1 3110 e041f3c: d2800021 mov x1, #0x1 // #1 3111 e041f40: d518cca1 msr s3_0_c12_c12_5, x1 3112 e041f44: d5033fdf isb 3113 e041f48: 927ff800 and x0, x0, #0xfffffffffffffffe 3114 e041f4c: d51e1100 msr scr_el3, x0 3115 e041f50: d5033fdf isb 3116 e041f54: d518cca1 msr s3_0_c12_c12_5, x1 3117 e041f58: d5033fdf isb 3118 e041f5c: d2801fe0 mov x0, #0xff // #255 3119 e041f60: d5184600 msr s3_0_c4_c6_0, x0 3120 e041f64: d518ccc1 msr s3_0_c12_c12_6, x1 3121 e041f68: d53ecce0 mrs x0, s3_6_c12_c12_7 3122 e041f6c: b27f0000 orr x0, x0, #0x2 3123 e041f70: d51ecce0 msr s3_6_c12_c12_7, x0 3124 e041f74: d5033fdf isb 3125 e041f78: d5033f9f dsb sy 3126 e041f7c: a8c17bfd ldp x29, x30, [sp], #16 3127 e041f80: d65f03c0 ret 3128 3129000000000e041f84 <gicv3_distif_init>: 3130 e041f84: a9be7bfd stp x29, x30, [sp, #-32]! 3131 e041f88: 910003fd mov x29, sp 3132 e041f8c: f9000bf3 str x19, [sp, #16] 3133 e041f90: b0000093 adrp x19, e052000 <opteed_sp_context+0xa00> 3134 e041f94: f9457660 ldr x0, [x19, #2792] 3135 e041f98: f9400000 ldr x0, [x0] 3136 e041f9c: b9400001 ldr w1, [x0] 3137 e041fa0: 121d7021 and w1, w1, #0xfffffff8 3138 e041fa4: b9000001 str w1, [x0] 3139 e041fa8: 97ffff74 bl e041d78 <gicd_wait_for_pending_write> 3140 e041fac: f9457660 ldr x0, [x19, #2792] 3141 e041fb0: f9400000 ldr x0, [x0] 3142 e041fb4: b9400001 ldr w1, [x0] 3143 e041fb8: 321c0421 orr w1, w1, #0x30 3144 e041fbc: b9000001 str w1, [x0] 3145 e041fc0: 97ffff6e bl e041d78 <gicd_wait_for_pending_write> 3146 e041fc4: f9457660 ldr x0, [x19, #2792] 3147 e041fc8: f9400000 ldr x0, [x0] 3148 e041fcc: 9400010c bl e0423fc <gicv3_spis_config_defaults> 3149 e041fd0: f9457660 ldr x0, [x19, #2792] 3150 e041fd4: b9401802 ldr w2, [x0, #24] 3151 e041fd8: f9400801 ldr x1, [x0, #16] 3152 e041fdc: f9400000 ldr x0, [x0] 3153 e041fe0: 940000cd bl e042314 <gicv3_secure_spis_config_props> 3154 e041fe4: f9457661 ldr x1, [x19, #2792] 3155 e041fe8: f9400bf3 ldr x19, [sp, #16] 3156 e041fec: f9400021 ldr x1, [x1] 3157 e041ff0: b9400022 ldr w2, [x1] 3158 e041ff4: 2a020000 orr w0, w0, w2 3159 e041ff8: b9000020 str w0, [x1] 3160 e041ffc: aa0103e0 mov x0, x1 3161 e042000: a8c27bfd ldp x29, x30, [sp], #32 3162 e042004: 17ffff5d b e041d78 <gicd_wait_for_pending_write> 3163 3164000000000e042008 <gicv3_driver_init>: 3165 e042008: a9be7bfd stp x29, x30, [sp, #-32]! 3166 e04200c: d29ffd01 mov x1, #0xffe8 // #65512 3167 e042010: 910003fd mov x29, sp 3168 e042014: a90153f3 stp x19, x20, [sp, #16] 3169 e042018: aa0003f3 mov x19, x0 3170 e04201c: f9400000 ldr x0, [x0] 3171 e042020: f9400662 ldr x2, [x19, #8] 3172 e042024: b8616801 ldr w1, [x0, x1] 3173 e042028: b9400000 ldr w0, [x0] 3174 e04202c: b4000102 cbz x2, e04204c <gicv3_driver_init+0x44> 3175 e042030: a9420e60 ldp x0, x3, [x19, #32] 3176 e042034: b9401e61 ldr w1, [x19, #28] 3177 e042038: 94000035 bl e04210c <gicv3_rdistif_base_addrs_probe> 3178 e04203c: f9401260 ldr x0, [x19, #32] 3179 e042040: b9401e61 ldr w1, [x19, #28] 3180 e042044: d37df021 lsl x1, x1, #3 3181 e042048: 97fffb2b bl e040cf4 <flush_dcache_range> 3182 e04204c: 90000094 adrp x20, e052000 <opteed_sp_context+0xa00> 3183 e042050: d2800101 mov x1, #0x8 // #8 3184 e042054: 912ba280 add x0, x20, #0xae8 3185 e042058: f9057693 str x19, [x20, #2792] 3186 e04205c: 97fffb26 bl e040cf4 <flush_dcache_range> 3187 e042060: f9457680 ldr x0, [x20, #2792] 3188 e042064: d2800601 mov x1, #0x30 // #48 3189 e042068: a94153f3 ldp x19, x20, [sp, #16] 3190 e04206c: a8c27bfd ldp x29, x30, [sp], #32 3191 e042070: 17fffb21 b e040cf4 <flush_dcache_range> 3192 3193000000000e042074 <gicv3_get_pending_interrupt_type>: 3194 e042074: d538c840 mrs x0, s3_0_c12_c8_2 3195 e042078: 12005c00 and w0, w0, #0xffffff 3196 e04207c: d65f03c0 ret 3197 3198000000000e042080 <gicv3_get_spi_limit>: 3199 e042080: b9400400 ldr w0, [x0, #4] 3200 e042084: 52807f81 mov w1, #0x3fc // #1020 3201 e042088: 531b1000 ubfiz w0, w0, #5, #5 3202 e04208c: 11008000 add w0, w0, #0x20 3203 e042090: 710ff01f cmp w0, #0x3fc 3204 e042094: 1a819000 csel w0, w0, w1, ls // ls = plast 3205 e042098: d65f03c0 ret 3206 3207000000000e04209c <gicv3_ppi_sgi_config_defaults>: 3208 e04209c: a9be7bfd stp x29, x30, [sp, #-32]! 3209 e0420a0: 12800001 mov w1, #0xffffffff // #-1 3210 e0420a4: 910003fd mov x29, sp 3211 e0420a8: a90153f3 stp x19, x20, [sp, #16] 3212 e0420ac: aa0003f3 mov x19, x0 3213 e0420b0: d2803000 mov x0, #0x180 // #384 3214 e0420b4: f2a00020 movk x0, #0x1, lsl #16 3215 e0420b8: b8206a61 str w1, [x19, x0] 3216 e0420bc: b9400260 ldr w0, [x19] 3217 e0420c0: 121d0014 and w20, w0, #0x8 3218 e0420c4: 371fffc0 tbnz w0, #3, e0420bc <gicv3_ppi_sgi_config_defaults+0x20> 3219 e0420c8: d2801000 mov x0, #0x80 // #128 3220 e0420cc: 12800001 mov w1, #0xffffffff // #-1 3221 e0420d0: f2a00020 movk x0, #0x1, lsl #16 3222 e0420d4: b8206a61 str w1, [x19, x0] 3223 e0420d8: 2a1403e1 mov w1, w20 3224 e0420dc: aa1303e0 mov x0, x19 3225 e0420e0: 3201c3e2 mov w2, #0x80808080 // #-2139062144 3226 e0420e4: 11000694 add w20, w20, #0x1 3227 e0420e8: 97ffff6f bl e041ea4 <gicr_write_ipriorityr> 3228 e0420ec: 7100229f cmp w20, #0x8 3229 e0420f0: 54ffff41 b.ne e0420d8 <gicv3_ppi_sgi_config_defaults+0x3c> // b.any 3230 e0420f4: d2818080 mov x0, #0xc04 // #3076 3231 e0420f8: f2a00020 movk x0, #0x1, lsl #16 3232 e0420fc: b8206a7f str wzr, [x19, x0] 3233 e042100: a94153f3 ldp x19, x20, [sp, #16] 3234 e042104: a8c27bfd ldp x29, x30, [sp], #32 3235 e042108: d65f03c0 ret 3236 3237000000000e04210c <gicv3_rdistif_base_addrs_probe>: 3238 e04210c: a9bc7bfd stp x29, x30, [sp, #-64]! 3239 e042110: 910003fd mov x29, sp 3240 e042114: a90153f3 stp x19, x20, [sp, #16] 3241 e042118: aa0203f3 mov x19, x2 3242 e04211c: a9025bf5 stp x21, x22, [sp, #32] 3243 e042120: aa0003f6 mov x22, x0 3244 e042124: aa0303f5 mov x21, x3 3245 e042128: f9001bf7 str x23, [sp, #48] 3246 e04212c: 2a0103f7 mov w23, w1 3247 e042130: f9400674 ldr x20, [x19, #8] 3248 e042134: b40001f5 cbz x21, e042170 <gicv3_rdistif_base_addrs_probe+0x64> 3249 e042138: d360de81 ubfx x1, x20, #32, #24 3250 e04213c: d378fe80 lsr x0, x20, #56 3251 e042140: aa008020 orr x0, x1, x0, lsl #32 3252 e042144: d63f02a0 blr x21 3253 e042148: 6b17001f cmp w0, w23 3254 e04214c: 54000042 b.cs e042154 <gicv3_rdistif_base_addrs_probe+0x48> // b.hs, b.nlast 3255 e042150: f8205ad3 str x19, [x22, w0, uxtw #3] 3256 e042154: 91408273 add x19, x19, #0x20, lsl #12 3257 e042158: 3627fed4 tbz w20, #4, e042130 <gicv3_rdistif_base_addrs_probe+0x24> 3258 e04215c: a94153f3 ldp x19, x20, [sp, #16] 3259 e042160: a9425bf5 ldp x21, x22, [sp, #32] 3260 e042164: f9401bf7 ldr x23, [sp, #48] 3261 e042168: a8c47bfd ldp x29, x30, [sp], #64 3262 e04216c: d65f03c0 ret 3263 e042170: 53085e80 ubfx w0, w20, #8, #16 3264 e042174: 17fffff5 b e042148 <gicv3_rdistif_base_addrs_probe+0x3c> 3265 3266000000000e042178 <gicv3_rdistif_init>: 3267 e042178: a9bd7bfd stp x29, x30, [sp, #-48]! 3268 e04217c: 910003fd mov x29, sp 3269 e042180: a90153f3 stp x19, x20, [sp, #16] 3270 e042184: 90000093 adrp x19, e052000 <opteed_sp_context+0xa00> 3271 e042188: 2a0003f4 mov w20, w0 3272 e04218c: f9457661 ldr x1, [x19, #2792] 3273 e042190: f9400021 ldr x1, [x1] 3274 e042194: f90013f5 str x21, [sp, #32] 3275 e042198: b9400035 ldr w21, [x1] 3276 e04219c: 9400002a bl e042244 <gicv3_rdistif_on> 3277 e0421a0: f9457660 ldr x0, [x19, #2792] 3278 e0421a4: f9401000 ldr x0, [x0, #32] 3279 e0421a8: f8745814 ldr x20, [x0, w20, uxtw #3] 3280 e0421ac: aa1403e0 mov x0, x20 3281 e0421b0: 97ffffbb bl e04209c <gicv3_ppi_sgi_config_defaults> 3282 e0421b4: f9457660 ldr x0, [x19, #2792] 3283 e0421b8: b9401802 ldr w2, [x0, #24] 3284 e0421bc: f9400801 ldr x1, [x0, #16] 3285 e0421c0: aa1403e0 mov x0, x20 3286 e0421c4: 94000021 bl e042248 <gicv3_secure_ppi_sgi_config_props> 3287 e0421c8: 6a35001f bics wzr, w0, w21 3288 e0421cc: 54000160 b.eq e0421f8 <gicv3_rdistif_init+0x80> // b.none 3289 e0421d0: 2a0003e1 mov w1, w0 3290 e0421d4: f9457660 ldr x0, [x19, #2792] 3291 e0421d8: a94153f3 ldp x19, x20, [sp, #16] 3292 e0421dc: f9400000 ldr x0, [x0] 3293 e0421e0: f94013f5 ldr x21, [sp, #32] 3294 e0421e4: b9400002 ldr w2, [x0] 3295 e0421e8: 2a020021 orr w1, w1, w2 3296 e0421ec: b9000001 str w1, [x0] 3297 e0421f0: a8c37bfd ldp x29, x30, [sp], #48 3298 e0421f4: 17fffee1 b e041d78 <gicd_wait_for_pending_write> 3299 e0421f8: a94153f3 ldp x19, x20, [sp, #16] 3300 e0421fc: f94013f5 ldr x21, [sp, #32] 3301 e042200: a8c37bfd ldp x29, x30, [sp], #48 3302 e042204: d65f03c0 ret 3303 3304000000000e042208 <gicv3_rdistif_mark_core_asleep>: 3305 e042208: b9401401 ldr w1, [x0, #20] 3306 e04220c: 91005002 add x2, x0, #0x14 3307 e042210: 321f0021 orr w1, w1, #0x2 3308 e042214: b9001401 str w1, [x0, #20] 3309 e042218: b9400040 ldr w0, [x2] 3310 e04221c: 3617ffe0 tbz w0, #2, e042218 <gicv3_rdistif_mark_core_asleep+0x10> 3311 e042220: d65f03c0 ret 3312 3313000000000e042224 <gicv3_rdistif_mark_core_awake>: 3314 e042224: b9401401 ldr w1, [x0, #20] 3315 e042228: 91005002 add x2, x0, #0x14 3316 e04222c: 121e7821 and w1, w1, #0xfffffffd 3317 e042230: b9001401 str w1, [x0, #20] 3318 e042234: b9400040 ldr w0, [x2] 3319 e042238: 3717ffe0 tbnz w0, #2, e042234 <gicv3_rdistif_mark_core_awake+0x10> 3320 e04223c: d65f03c0 ret 3321 3322000000000e042240 <gicv3_rdistif_off>: 3323 e042240: d65f03c0 ret 3324 3325000000000e042244 <gicv3_rdistif_on>: 3326 e042244: d65f03c0 ret 3327 3328000000000e042248 <gicv3_secure_ppi_sgi_config_props>: 3329 e042248: a9bc7bfd stp x29, x30, [sp, #-64]! 3330 e04224c: 910003fd mov x29, sp 3331 e042250: a90153f3 stp x19, x20, [sp, #16] 3332 e042254: aa0103f3 mov x19, x1 3333 e042258: a9025bf5 stp x21, x22, [sp, #32] 3334 e04225c: aa0003f5 mov x21, x0 3335 e042260: 52800016 mov w22, #0x0 // #0 3336 e042264: f9001bf7 str x23, [sp, #48] 3337 e042268: 8b224837 add x23, x1, w2, uxtw #2 3338 e04226c: eb17027f cmp x19, x23 3339 e042270: 540000e1 b.ne e04228c <gicv3_secure_ppi_sgi_config_props+0x44> // b.any 3340 e042274: 2a1603e0 mov w0, w22 3341 e042278: a94153f3 ldp x19, x20, [sp, #16] 3342 e04227c: a9425bf5 ldp x21, x22, [sp, #32] 3343 e042280: f9401bf7 ldr x23, [sp, #48] 3344 e042284: a8c47bfd ldp x29, x30, [sp], #64 3345 e042288: d65f03c0 ret 3346 e04228c: b9400274 ldr w20, [x19] 3347 e042290: 12002694 and w20, w20, #0x3ff 3348 e042294: 71007e9f cmp w20, #0x1f 3349 e042298: 54000348 b.hi e042300 <gicv3_secure_ppi_sgi_config_props+0xb8> // b.pmore 3350 e04229c: 2a1403e1 mov w1, w20 3351 e0422a0: aa1503e0 mov x0, x21 3352 e0422a4: 97fffec6 bl e041dbc <gicr_clr_igroupr> 3353 e0422a8: b9400260 ldr w0, [x19] 3354 e0422ac: 2a1403e1 mov w1, w20 3355 e0422b0: 720e041f tst w0, #0xc0000 3356 e0422b4: aa1503e0 mov x0, x21 3357 e0422b8: 54000281 b.ne e042308 <gicv3_secure_ppi_sgi_config_props+0xc0> // b.any 3358 e0422bc: 321e02d6 orr w22, w22, #0x4 3359 e0422c0: 97fffee1 bl e041e44 <gicr_set_igrpmodr> 3360 e0422c4: b9400262 ldr w2, [x19] 3361 e0422c8: 2a1403e1 mov w1, w20 3362 e0422cc: aa1503e0 mov x0, x21 3363 e0422d0: d34a4442 ubfx x2, x2, #10, #8 3364 e0422d4: 97fffee6 bl e041e6c <gicr_set_ipriorityr> 3365 e0422d8: 71003e9f cmp w20, #0xf 3366 e0422dc: 540000c9 b.ls e0422f4 <gicv3_secure_ppi_sgi_config_props+0xac> // b.plast 3367 e0422e0: b9400262 ldr w2, [x19] 3368 e0422e4: 2a1403e1 mov w1, w20 3369 e0422e8: aa1503e0 mov x0, x21 3370 e0422ec: d3545442 ubfx x2, x2, #20, #2 3371 e0422f0: 97fffec7 bl e041e0c <gicr_set_icfgr> 3372 e0422f4: 2a1403e1 mov w1, w20 3373 e0422f8: aa1503e0 mov x0, x21 3374 e0422fc: 97fffee2 bl e041e84 <gicr_set_isenabler> 3375 e042300: 91001273 add x19, x19, #0x4 3376 e042304: 17ffffda b e04226c <gicv3_secure_ppi_sgi_config_props+0x24> 3377 e042308: 320002d6 orr w22, w22, #0x1 3378 e04230c: 97fffeb6 bl e041de4 <gicr_clr_igrpmodr> 3379 e042310: 17ffffed b e0422c4 <gicv3_secure_ppi_sgi_config_props+0x7c> 3380 3381000000000e042314 <gicv3_secure_spis_config_props>: 3382 e042314: a9bb7bfd stp x29, x30, [sp, #-80]! 3383 e042318: 910003fd mov x29, sp 3384 e04231c: a90153f3 stp x19, x20, [sp, #16] 3385 e042320: aa0103f3 mov x19, x1 3386 e042324: a9025bf5 stp x21, x22, [sp, #32] 3387 e042328: aa0003f5 mov x21, x0 3388 e04232c: 52800016 mov w22, #0x0 // #0 3389 e042330: a90363f7 stp x23, x24, [sp, #48] 3390 e042334: 8b224837 add x23, x1, w2, uxtw #2 3391 e042338: f90023f9 str x25, [sp, #64] 3392 e04233c: 91401819 add x25, x0, #0x6, lsl #12 3393 e042340: eb17027f cmp x19, x23 3394 e042344: 54000101 b.ne e042364 <gicv3_secure_spis_config_props+0x50> // b.any 3395 e042348: 2a1603e0 mov w0, w22 3396 e04234c: a94153f3 ldp x19, x20, [sp, #16] 3397 e042350: a9425bf5 ldp x21, x22, [sp, #32] 3398 e042354: a94363f7 ldp x23, x24, [sp, #48] 3399 e042358: f94023f9 ldr x25, [sp, #64] 3400 e04235c: a8c57bfd ldp x29, x30, [sp], #80 3401 e042360: d65f03c0 ret 3402 e042364: b9400274 ldr w20, [x19] 3403 e042368: d3402698 ubfx x24, x20, #0, #10 3404 e04236c: 12002694 and w20, w20, #0x3ff 3405 e042370: 51008280 sub w0, w20, #0x20 3406 e042374: 710f6c1f cmp w0, #0x3db 3407 e042378: 54000388 b.hi e0423e8 <gicv3_secure_spis_config_props+0xd4> // b.pmore 3408 e04237c: 2a1403e1 mov w1, w20 3409 e042380: aa1503e0 mov x0, x21 3410 e042384: 97fffe49 bl e041ca8 <gicd_clr_igroupr> 3411 e042388: b9400260 ldr w0, [x19] 3412 e04238c: 2a1403e1 mov w1, w20 3413 e042390: 720e041f tst w0, #0xc0000 3414 e042394: aa1503e0 mov x0, x21 3415 e042398: 540002c1 b.ne e0423f0 <gicv3_secure_spis_config_props+0xdc> // b.any 3416 e04239c: 321e02d6 orr w22, w22, #0x4 3417 e0423a0: 97fffe61 bl e041d24 <gicd_set_igrpmodr> 3418 e0423a4: b9400262 ldr w2, [x19] 3419 e0423a8: 2a1403e1 mov w1, w20 3420 e0423ac: aa1503e0 mov x0, x21 3421 e0423b0: d3545442 ubfx x2, x2, #20, #2 3422 e0423b4: 97fffe4f bl e041cf0 <gicd_set_icfgr> 3423 e0423b8: b9400262 ldr w2, [x19] 3424 e0423bc: 2a1403e1 mov w1, w20 3425 e0423c0: aa1503e0 mov x0, x21 3426 e0423c4: d34a4442 ubfx x2, x2, #10, #8 3427 e0423c8: 97fffe60 bl e041d48 <gicd_set_ipriorityr> 3428 e0423cc: d53800a0 mrs x0, mpidr_el1 3429 e0423d0: d37d2718 ubfiz x24, x24, #3, #10 3430 e0423d4: 92405c00 and x0, x0, #0xffffff 3431 e0423d8: 2a1403e1 mov w1, w20 3432 e0423dc: f8386b20 str x0, [x25, x24] 3433 e0423e0: aa1503e0 mov x0, x21 3434 e0423e4: 97fffe5e bl e041d5c <gicd_set_isenabler> 3435 e0423e8: 91001273 add x19, x19, #0x4 3436 e0423ec: 17ffffd5 b e042340 <gicv3_secure_spis_config_props+0x2c> 3437 e0423f0: 320002d6 orr w22, w22, #0x1 3438 e0423f4: 97fffe36 bl e041ccc <gicd_clr_igrpmodr> 3439 e0423f8: 17ffffeb b e0423a4 <gicv3_secure_spis_config_props+0x90> 3440 3441000000000e0423fc <gicv3_spis_config_defaults>: 3442 e0423fc: a9bd7bfd stp x29, x30, [sp, #-48]! 3443 e042400: 910003fd mov x29, sp 3444 e042404: a90153f3 stp x19, x20, [sp, #16] 3445 e042408: aa0003f4 mov x20, x0 3446 e04240c: f90013f5 str x21, [sp, #32] 3447 e042410: 97ffff1c bl e042080 <gicv3_get_spi_limit> 3448 e042414: 2a0003f3 mov w19, w0 3449 e042418: 52800415 mov w21, #0x20 // #32 3450 e04241c: 6b1302bf cmp w21, w19 3451 e042420: 54000163 b.cc e04244c <gicv3_spis_config_defaults+0x50> // b.lo, b.ul, b.last 3452 e042424: 52800415 mov w21, #0x20 // #32 3453 e042428: 6b1302bf cmp w21, w19 3454 e04242c: 540001c3 b.cc e042464 <gicv3_spis_config_defaults+0x68> // b.lo, b.ul, b.last 3455 e042430: 52800415 mov w21, #0x20 // #32 3456 e042434: 6b1302bf cmp w21, w19 3457 e042438: 54000223 b.cc e04247c <gicv3_spis_config_defaults+0x80> // b.lo, b.ul, b.last 3458 e04243c: a94153f3 ldp x19, x20, [sp, #16] 3459 e042440: f94013f5 ldr x21, [sp, #32] 3460 e042444: a8c37bfd ldp x29, x30, [sp], #48 3461 e042448: d65f03c0 ret 3462 e04244c: 2a1503e1 mov w1, w21 3463 e042450: aa1403e0 mov x0, x20 3464 e042454: 12800002 mov w2, #0xffffffff // #-1 3465 e042458: 110082b5 add w21, w21, #0x20 3466 e04245c: 97fffe4f bl e041d98 <gicd_write_igroupr> 3467 e042460: 17ffffef b e04241c <gicv3_spis_config_defaults+0x20> 3468 e042464: 2a1503e1 mov w1, w21 3469 e042468: aa1403e0 mov x0, x20 3470 e04246c: 3201c3e2 mov w2, #0x80808080 // #-2139062144 3471 e042470: 110012b5 add w21, w21, #0x4 3472 e042474: 97fffe4e bl e041dac <gicd_write_ipriorityr> 3473 e042478: 17ffffec b e042428 <gicv3_spis_config_defaults+0x2c> 3474 e04247c: 2a1503e1 mov w1, w21 3475 e042480: aa1403e0 mov x0, x20 3476 e042484: 52800002 mov w2, #0x0 // #0 3477 e042488: 110042b5 add w21, w21, #0x10 3478 e04248c: 97fffe3e bl e041d84 <gicd_write_icfgr> 3479 e042490: 17ffffe9 b e042434 <gicv3_spis_config_defaults+0x38> 3480 3481000000000e042494 <gpio_init>: 3482 e042494: 90000081 adrp x1, e052000 <opteed_sp_context+0xa00> 3483 e042498: f9058820 str x0, [x1, #2832] 3484 e04249c: d65f03c0 ret 3485 3486000000000e0424a0 <gpio_set_direction>: 3487 e0424a0: 90000082 adrp x2, e052000 <opteed_sp_context+0xa00> 3488 e0424a4: f9458842 ldr x2, [x2, #2832] 3489 e0424a8: f9400442 ldr x2, [x2, #8] 3490 e0424ac: aa0203f0 mov x16, x2 3491 e0424b0: d61f0200 br x16 3492 3493000000000e0424b4 <gpio_set_value>: 3494 e0424b4: 90000082 adrp x2, e052000 <opteed_sp_context+0xa00> 3495 e0424b8: f9458842 ldr x2, [x2, #2832] 3496 e0424bc: f9400c42 ldr x2, [x2, #24] 3497 e0424c0: aa0203f0 mov x16, x2 3498 e0424c4: d61f0200 br x16 3499 3500000000000e0424c8 <init_xlat_tables>: 3501 e0424c8: a9bf7bfd stp x29, x30, [sp, #-16]! 3502 e0424cc: 910003fd mov x29, sp 3503 e0424d0: 94000c85 bl e0456e4 <xlat_arch_current_el> 3504 e0424d4: 2a0003e1 mov w1, w0 3505 e0424d8: 7100041f cmp w0, #0x1 3506 e0424dc: d0000020 adrp x0, e048000 <tf_xlat_ctx> 3507 e0424e0: 91000000 add x0, x0, #0x0 3508 e0424e4: 54000081 b.ne e0424f4 <init_xlat_tables+0x2c> // b.any 3509 e0424e8: b9005801 str w1, [x0, #88] 3510 e0424ec: a8c17bfd ldp x29, x30, [sp], #16 3511 e0424f0: 14000005 b e042504 <init_xlat_tables_ctx> 3512 e0424f4: 7100083f cmp w1, #0x2 3513 e0424f8: 52800062 mov w2, #0x3 // #3 3514 e0424fc: 1a820021 csel w1, w1, w2, eq // eq = none 3515 e042500: 17fffffa b e0424e8 <init_xlat_tables+0x20> 3516 3517000000000e042504 <init_xlat_tables_ctx>: 3518 e042504: a9bd7bfd stp x29, x30, [sp, #-48]! 3519 e042508: 910003fd mov x29, sp 3520 e04250c: a90153f3 stp x19, x20, [sp, #16] 3521 e042510: aa0003f3 mov x19, x0 3522 e042514: f9400814 ldr x20, [x0, #16] 3523 e042518: f90013f5 str x21, [sp, #32] 3524 e04251c: aa1403e0 mov x0, x20 3525 e042520: 94000cc7 bl e04583c <xlat_mmap_print> 3526 e042524: b9403a61 ldr w1, [x19, #56] 3527 e042528: d2800000 mov x0, #0x0 // #0 3528 e04252c: 6b00003f cmp w1, w0 3529 e042530: 540001c8 b.hi e042568 <init_xlat_tables_ctx+0x64> // b.pmore 3530 e042534: b9402a63 ldr w3, [x19, #40] 3531 e042538: d2800000 mov x0, #0x0 // #0 3532 e04253c: 6b00007f cmp w3, w0 3533 e042540: 540001cc b.gt e042578 <init_xlat_tables_ctx+0x74> 3534 e042544: f9400a80 ldr x0, [x20, #16] 3535 e042548: b50002a0 cbnz x0, e04259c <init_xlat_tables_ctx+0x98> 3536 e04254c: 52800020 mov w0, #0x1 // #1 3537 e042550: 39015260 strb w0, [x19, #84] 3538 e042554: aa1303e0 mov x0, x19 3539 e042558: a94153f3 ldp x19, x20, [sp, #16] 3540 e04255c: f94013f5 ldr x21, [sp, #32] 3541 e042560: a8c37bfd ldp x29, x30, [sp], #48 3542 e042564: 14000d3f b e045a60 <xlat_tables_print> 3543 e042568: f9401a62 ldr x2, [x19, #48] 3544 e04256c: f820785f str xzr, [x2, x0, lsl #3] 3545 e042570: 91000400 add x0, x0, #0x1 3546 e042574: 17ffffee b e04252c <init_xlat_tables_ctx+0x28> 3547 e042578: f9401262 ldr x2, [x19, #32] 3548 e04257c: d2800001 mov x1, #0x0 // #0 3549 e042580: 8b003042 add x2, x2, x0, lsl #12 3550 e042584: f821785f str xzr, [x2, x1, lsl #3] 3551 e042588: 91000421 add x1, x1, #0x1 3552 e04258c: f108003f cmp x1, #0x200 3553 e042590: 54ffffa1 b.ne e042584 <init_xlat_tables_ctx+0x80> // b.any 3554 e042594: 91000400 add x0, x0, #0x1 3555 e042598: 17ffffe9 b e04253c <init_xlat_tables_ctx+0x38> 3556 e04259c: b9403a64 ldr w4, [x19, #56] 3557 e0425a0: aa1403e1 mov x1, x20 3558 e0425a4: b9405265 ldr w5, [x19, #80] 3559 e0425a8: d2800002 mov x2, #0x0 // #0 3560 e0425ac: f9401a63 ldr x3, [x19, #48] 3561 e0425b0: aa1303e0 mov x0, x19 3562 e0425b4: 94000ca3 bl e045840 <xlat_tables_map_region> 3563 e0425b8: aa0003f5 mov x21, x0 3564 e0425bc: f9401a60 ldr x0, [x19, #48] 3565 e0425c0: b9403a61 ldr w1, [x19, #56] 3566 e0425c4: d37df021 lsl x1, x1, #3 3567 e0425c8: 94000c54 bl e045718 <xlat_clean_dcache_range> 3568 e0425cc: a9408e81 ldp x1, x3, [x20, #8] 3569 e0425d0: 8b030020 add x0, x1, x3 3570 e0425d4: d1000400 sub x0, x0, #0x1 3571 e0425d8: eb15001f cmp x0, x21 3572 e0425dc: 54000100 b.eq e0425fc <init_xlat_tables_ctx+0xf8> // b.none 3573 e0425e0: b9401a84 ldr w4, [x20, #24] 3574 e0425e4: b0000020 adrp x0, e047000 <__TEXT_END__> 3575 e0425e8: f9400282 ldr x2, [x20] 3576 e0425ec: 9119b400 add x0, x0, #0x66d 3577 e0425f0: 94000adc bl e045160 <tf_log> 3578 e0425f4: 97fffd26 bl e041a8c <console_flush> 3579 e0425f8: 97fff8e3 bl e040984 <do_panic> 3580 e0425fc: 9100a294 add x20, x20, #0x28 3581 e042600: 17ffffd1 b e042544 <init_xlat_tables_ctx+0x40> 3582 3583000000000e042604 <is_dcache_enabled>: 3584 e042604: d53e1000 mrs x0, sctlr_el3 3585 e042608: 53020800 ubfx w0, w0, #2, #1 3586 e04260c: d65f03c0 ret 3587 3588000000000e042610 <memcpy>: 3589 e042610: d2800003 mov x3, #0x0 // #0 3590 e042614: eb03005f cmp x2, x3 3591 e042618: 54000041 b.ne e042620 <memcpy+0x10> // b.any 3592 e04261c: d65f03c0 ret 3593 e042620: 38636824 ldrb w4, [x1, x3] 3594 e042624: 38236804 strb w4, [x0, x3] 3595 e042628: 91000463 add x3, x3, #0x1 3596 e04262c: 17fffffa b e042614 <memcpy+0x4> 3597 3598000000000e042630 <memmove>: 3599 e042630: cb010006 sub x6, x0, x1 3600 e042634: aa0003e5 mov x5, x0 3601 e042638: eb0200df cmp x6, x2 3602 e04263c: 54000043 b.cc e042644 <memmove+0x14> // b.lo, b.ul, b.last 3603 e042640: 17fffff4 b e042610 <memcpy> 3604 e042644: 8b020024 add x4, x1, x2 3605 e042648: 8b020000 add x0, x0, x2 3606 e04264c: eb05001f cmp x0, x5 3607 e042650: 54000041 b.ne e042658 <memmove+0x28> // b.any 3608 e042654: d65f03c0 ret 3609 e042658: 385ffc81 ldrb w1, [x4, #-1]! 3610 e04265c: 381ffc01 strb w1, [x0, #-1]! 3611 e042660: 17fffffb b e04264c <memmove+0x1c> 3612 3613000000000e042664 <memset>: 3614 e042664: b4000342 cbz x2, e0426cc <memset+0x68> 3615 e042668: 12001c24 and w4, w1, #0xff 3616 e04266c: aa0003e5 mov x5, x0 3617 e042670: f24008a6 ands x6, x5, #0x7 3618 e042674: 54000261 b.ne e0426c0 <memset+0x5c> // b.any 3619 e042678: d3781c83 ubfiz x3, x4, #8, #8 3620 e04267c: 92401c81 and x1, x4, #0xff 3621 e042680: aa010061 orr x1, x3, x1 3622 e042684: d2800003 mov x3, #0x0 // #0 3623 e042688: aa014021 orr x1, x1, x1, lsl #16 3624 e04268c: aa018021 orr x1, x1, x1, lsl #32 3625 e042690: cb030047 sub x7, x2, x3 3626 e042694: f1001cff cmp x7, #0x7 3627 e042698: 540001c8 b.hi e0426d0 <memset+0x6c> // b.pmore 3628 e04269c: d343fc41 lsr x1, x2, #3 3629 e0426a0: 928000e3 mov x3, #0xfffffffffffffff8 // #-8 3630 e0426a4: 9b030822 madd x2, x1, x3, x2 3631 e0426a8: 8b010ca1 add x1, x5, x1, lsl #3 3632 e0426ac: eb06005f cmp x2, x6 3633 e0426b0: 540000e0 b.eq e0426cc <memset+0x68> // b.none 3634 e0426b4: 38266824 strb w4, [x1, x6] 3635 e0426b8: 910004c6 add x6, x6, #0x1 3636 e0426bc: 17fffffc b e0426ac <memset+0x48> 3637 e0426c0: 380014a4 strb w4, [x5], #1 3638 e0426c4: f1000442 subs x2, x2, #0x1 3639 e0426c8: 54fffd41 b.ne e042670 <memset+0xc> // b.any 3640 e0426cc: d65f03c0 ret 3641 e0426d0: f82368a1 str x1, [x5, x3] 3642 e0426d4: 91002063 add x3, x3, #0x8 3643 e0426d8: 17ffffee b e042690 <memset+0x2c> 3644 3645000000000e0426dc <mmap_add>: 3646 e0426dc: aa0003e1 mov x1, x0 3647 e0426e0: d0000020 adrp x0, e048000 <tf_xlat_ctx> 3648 e0426e4: 91000000 add x0, x0, #0x0 3649 e0426e8: 14000001 b e0426ec <mmap_add_ctx> 3650 3651000000000e0426ec <mmap_add_ctx>: 3652 e0426ec: a9be7bfd stp x29, x30, [sp, #-32]! 3653 e0426f0: 910003fd mov x29, sp 3654 e0426f4: a90153f3 stp x19, x20, [sp, #16] 3655 e0426f8: aa0003f4 mov x20, x0 3656 e0426fc: aa0103f3 mov x19, x1 3657 e042700: f9401260 ldr x0, [x19, #32] 3658 e042704: b5000080 cbnz x0, e042714 <mmap_add_ctx+0x28> 3659 e042708: a94153f3 ldp x19, x20, [sp, #16] 3660 e04270c: a8c27bfd ldp x29, x30, [sp], #32 3661 e042710: d65f03c0 ret 3662 e042714: aa1303e1 mov x1, x19 3663 e042718: aa1403e0 mov x0, x20 3664 e04271c: 9100a273 add x19, x19, #0x28 3665 e042720: 9400000f bl e04275c <mmap_add_region_ctx> 3666 e042724: 17fffff7 b e042700 <mmap_add_ctx+0x14> 3667 3668000000000e042728 <mmap_add_region>: 3669 e042728: a9bc7bfd stp x29, x30, [sp, #-64]! 3670 e04272c: 910003fd mov x29, sp 3671 e042730: a90187e0 stp x0, x1, [sp, #24] 3672 e042734: d2a80000 mov x0, #0x40000000 // #1073741824 3673 e042738: 910063e1 add x1, sp, #0x18 3674 e04273c: f90017e2 str x2, [sp, #40] 3675 e042740: b90033e3 str w3, [sp, #48] 3676 e042744: f9001fe0 str x0, [sp, #56] 3677 e042748: d0000020 adrp x0, e048000 <tf_xlat_ctx> 3678 e04274c: 91000000 add x0, x0, #0x0 3679 e042750: 94000003 bl e04275c <mmap_add_region_ctx> 3680 e042754: a8c47bfd ldp x29, x30, [sp], #64 3681 e042758: d65f03c0 ret 3682 3683000000000e04275c <mmap_add_region_ctx>: 3684 e04275c: a9bc7bfd stp x29, x30, [sp, #-64]! 3685 e042760: 910003fd mov x29, sp 3686 e042764: a9025bf5 stp x21, x22, [sp, #32] 3687 e042768: aa0103f6 mov x22, x1 3688 e04276c: f9400821 ldr x1, [x1, #16] 3689 e042770: a90153f3 stp x19, x20, [sp, #16] 3690 e042774: f9001bf7 str x23, [sp, #48] 3691 e042778: b4000941 cbz x1, e0428a0 <mmap_add_region_ctx+0x144> 3692 e04277c: aa0003f3 mov x19, x0 3693 e042780: a94002c5 ldp x5, x0, [x22] 3694 e042784: f94012c2 ldr x2, [x22, #32] 3695 e042788: aa0100a3 orr x3, x5, x1 3696 e04278c: aa000063 orr x3, x3, x0 3697 e042790: f2402c7f tst x3, #0xfff 3698 e042794: 54000d81 b.ne e042944 <mmap_add_region_ctx+0x1e8> // b.any 3699 e042798: f148005f cmp x2, #0x200, lsl #12 3700 e04279c: d2a80003 mov x3, #0x40000000 // #1073741824 3701 e0427a0: fa431044 ccmp x2, x3, #0x4, ne // ne = any 3702 e0427a4: 54000060 b.eq e0427b0 <mmap_add_region_ctx+0x54> // b.none 3703 e0427a8: f140045f cmp x2, #0x1, lsl #12 3704 e0427ac: 54000cc1 b.ne e042944 <mmap_add_region_ctx+0x1e8> // b.any 3705 e0427b0: 8b0100b5 add x21, x5, x1 3706 e0427b4: 8b00002a add x10, x1, x0 3707 e0427b8: d10006b5 sub x21, x21, #0x1 3708 e0427bc: d1000554 sub x20, x10, #0x1 3709 e0427c0: eb1500bf cmp x5, x21 3710 e0427c4: fa549002 ccmp x0, x20, #0x2, ls // ls = plast 3711 e0427c8: 54000ce8 b.hi e042964 <mmap_add_region_ctx+0x208> // b.pmore 3712 e0427cc: f9400662 ldr x2, [x19, #8] 3713 e0427d0: eb02029f cmp x20, x2 3714 e0427d4: 54000c88 b.hi e042964 <mmap_add_region_ctx+0x208> // b.pmore 3715 e0427d8: f9400262 ldr x2, [x19] 3716 e0427dc: eb0202bf cmp x21, x2 3717 e0427e0: 54000c28 b.hi e042964 <mmap_add_region_ctx+0x208> // b.pmore 3718 e0427e4: b9401a69 ldr w9, [x19, #24] 3719 e0427e8: 52800503 mov w3, #0x28 // #40 3720 e0427ec: f9400a62 ldr x2, [x19, #16] 3721 e0427f0: 9b230929 smaddl x9, w9, w3, x2 3722 e0427f4: f85e8123 ldur x3, [x9, #-24] 3723 e0427f8: b5000ba3 cbnz x3, e04296c <mmap_add_region_ctx+0x210> 3724 e0427fc: aa0203e6 mov x6, x2 3725 e042800: cb05000b sub x11, x0, x5 3726 e042804: f94008c3 ldr x3, [x6, #16] 3727 e042808: b5000563 cbnz x3, e0428b4 <mmap_add_region_ctx+0x158> 3728 e04280c: aa0203e3 mov x3, x2 3729 e042810: a9409464 ldp x4, x5, [x3, #8] 3730 e042814: aa0303e0 mov x0, x3 3731 e042818: 9100a063 add x3, x3, #0x28 3732 e04281c: 8b0400a4 add x4, x5, x4 3733 e042820: d1000484 sub x4, x4, #0x1 3734 e042824: eb14009f cmp x4, x20 3735 e042828: 54000042 b.cs e042830 <mmap_add_region_ctx+0xd4> // b.hs, b.nlast 3736 e04282c: b5ffff25 cbnz x5, e042810 <mmap_add_region_ctx+0xb4> 3737 e042830: a9408c04 ldp x4, x3, [x0, #8] 3738 e042834: aa0003f7 mov x23, x0 3739 e042838: 9100a000 add x0, x0, #0x28 3740 e04283c: 8b040064 add x4, x3, x4 3741 e042840: eb04015f cmp x10, x4 3742 e042844: 54000081 b.ne e042854 <mmap_add_region_ctx+0xf8> // b.any 3743 e042848: b4000063 cbz x3, e042854 <mmap_add_region_ctx+0xf8> 3744 e04284c: eb03003f cmp x1, x3 3745 e042850: 54ffff08 b.hi e042830 <mmap_add_region_ctx+0xd4> // b.pmore 3746 e042854: f9400841 ldr x1, [x2, #16] 3747 e042858: b4000061 cbz x1, e042864 <mmap_add_region_ctx+0x108> 3748 e04285c: eb09005f cmp x2, x9 3749 e042860: 540008a3 b.cc e042974 <mmap_add_region_ctx+0x218> // b.lo, b.ul, b.last 3750 e042864: cb170042 sub x2, x2, x23 3751 e042868: aa1703e1 mov x1, x23 3752 e04286c: 97ffff71 bl e042630 <memmove> 3753 e042870: aa1603e1 mov x1, x22 3754 e042874: aa1703e0 mov x0, x23 3755 e042878: d2800502 mov x2, #0x28 // #40 3756 e04287c: 97ffff65 bl e042610 <memcpy> 3757 e042880: f9402260 ldr x0, [x19, #64] 3758 e042884: eb15001f cmp x0, x21 3759 e042888: 54000042 b.cs e042890 <mmap_add_region_ctx+0x134> // b.hs, b.nlast 3760 e04288c: f9002275 str x21, [x19, #64] 3761 e042890: f9402660 ldr x0, [x19, #72] 3762 e042894: eb14001f cmp x0, x20 3763 e042898: 54000042 b.cs e0428a0 <mmap_add_region_ctx+0x144> // b.hs, b.nlast 3764 e04289c: f9002674 str x20, [x19, #72] 3765 e0428a0: a94153f3 ldp x19, x20, [sp, #16] 3766 e0428a4: a9425bf5 ldp x21, x22, [sp, #32] 3767 e0428a8: f9401bf7 ldr x23, [sp, #48] 3768 e0428ac: a8c47bfd ldp x29, x30, [sp], #64 3769 e0428b0: d65f03c0 ret 3770 e0428b4: a94010c7 ldp x7, x4, [x6] 3771 e0428b8: 8b030088 add x8, x4, x3 3772 e0428bc: d1000508 sub x8, x8, #0x1 3773 e0428c0: eb04001f cmp x0, x4 3774 e0428c4: 54000263 b.cc e042910 <mmap_add_region_ctx+0x1b4> // b.lo, b.ul, b.last 3775 e0428c8: eb08029f cmp x20, x8 3776 e0428cc: 54000269 b.ls e042918 <mmap_add_region_ctx+0x1bc> // b.plast 3777 e0428d0: eb04001f cmp x0, x4 3778 e0428d4: 54000229 b.ls e042918 <mmap_add_region_ctx+0x1bc> // b.plast 3779 e0428d8: eb0702bf cmp x21, x7 3780 e0428dc: 54000503 b.cc e04297c <mmap_add_region_ctx+0x220> // b.lo, b.ul, b.last 3781 e0428e0: 8b070063 add x3, x3, x7 3782 e0428e4: d1000463 sub x3, x3, #0x1 3783 e0428e8: eb0300bf cmp x5, x3 3784 e0428ec: 1a9f97e3 cset w3, hi // hi = pmore 3785 e0428f0: eb04029f cmp x20, x4 3786 e0428f4: 54000243 b.cc e04293c <mmap_add_region_ctx+0x1e0> // b.lo, b.ul, b.last 3787 e0428f8: eb08001f cmp x0, x8 3788 e0428fc: 1a9f97e4 cset w4, hi // hi = pmore 3789 e042900: 6a03009f tst w4, w3 3790 e042904: 54000180 b.eq e042934 <mmap_add_region_ctx+0x1d8> // b.none 3791 e042908: 9100a0c6 add x6, x6, #0x28 3792 e04290c: 17ffffbe b e042804 <mmap_add_region_ctx+0xa8> 3793 e042910: eb08029f cmp x20, x8 3794 e042914: 54fffe23 b.cc e0428d8 <mmap_add_region_ctx+0x17c> // b.lo, b.ul, b.last 3795 e042918: cb070087 sub x7, x4, x7 3796 e04291c: eb0b00ff cmp x7, x11 3797 e042920: 540000a1 b.ne e042934 <mmap_add_region_ctx+0x1d8> // b.any 3798 e042924: eb04001f cmp x0, x4 3799 e042928: 54ffff01 b.ne e042908 <mmap_add_region_ctx+0x1ac> // b.any 3800 e04292c: eb03003f cmp x1, x3 3801 e042930: 54fffec1 b.ne e042908 <mmap_add_region_ctx+0x1ac> // b.any 3802 e042934: 12800001 mov w1, #0xffffffff // #-1 3803 e042938: 14000004 b e042948 <mmap_add_region_ctx+0x1ec> 3804 e04293c: 52800024 mov w4, #0x1 // #1 3805 e042940: 17fffff0 b e042900 <mmap_add_region_ctx+0x1a4> 3806 e042944: 128002a1 mov w1, #0xffffffea // #-22 3807 e042948: a94153f3 ldp x19, x20, [sp, #16] 3808 e04294c: b0000020 adrp x0, e047000 <__TEXT_END__> 3809 e042950: a9425bf5 ldp x21, x22, [sp, #32] 3810 e042954: 91190800 add x0, x0, #0x642 3811 e042958: f9401bf7 ldr x23, [sp, #48] 3812 e04295c: a8c47bfd ldp x29, x30, [sp], #64 3813 e042960: 14000a00 b e045160 <tf_log> 3814 e042964: 12800421 mov w1, #0xffffffde // #-34 3815 e042968: 17fffff8 b e042948 <mmap_add_region_ctx+0x1ec> 3816 e04296c: 12800161 mov w1, #0xfffffff4 // #-12 3817 e042970: 17fffff6 b e042948 <mmap_add_region_ctx+0x1ec> 3818 e042974: 9100a042 add x2, x2, #0x28 3819 e042978: 17ffffb7 b e042854 <mmap_add_region_ctx+0xf8> 3820 e04297c: eb04029f cmp x20, x4 3821 e042980: 54fffc43 b.cc e042908 <mmap_add_region_ctx+0x1ac> // b.lo, b.ul, b.last 3822 e042984: 52800023 mov w3, #0x1 // #1 3823 e042988: 17ffffdc b e0428f8 <mmap_add_region_ctx+0x19c> 3824 3825000000000e04298c <opteed_cpu_migrate_info>: 3826 e04298c: 52800040 mov w0, #0x2 // #2 3827 e042990: d65f03c0 ret 3828 3829000000000e042994 <opteed_cpu_off_handler>: 3830 e042994: a9be7bfd stp x29, x30, [sp, #-32]! 3831 e042998: 910003fd mov x29, sp 3832 e04299c: a90153f3 stp x19, x20, [sp, #16] 3833 e0429a0: 97fff934 bl e040e70 <plat_my_core_pos> 3834 e0429a4: 2a0003f3 mov w19, w0 3835 e0429a8: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 3836 e0429ac: f0000074 adrp x20, e051000 <psci_ns_context+0xd80> 3837 e0429b0: 91180294 add x20, x20, #0x600 3838 e0429b4: f9464c01 ldr x1, [x0, #3224] 3839 e0429b8: 52800000 mov w0, #0x0 // #0 3840 e0429bc: 91003021 add x1, x1, #0xc 3841 e0429c0: 97fffb99 bl e041824 <cm_set_elr_el3> 3842 e0429c4: 52805200 mov w0, #0x290 // #656 3843 e0429c8: 9ba05260 umaddl x0, w19, w0, x20 3844 e0429cc: 94000161 bl e042f50 <opteed_synchronous_sp_entry> 3845 e0429d0: 34000060 cbz w0, e0429dc <opteed_cpu_off_handler+0x48> 3846 e0429d4: 97fffc2e bl e041a8c <console_flush> 3847 e0429d8: 97fff7eb bl e040984 <do_panic> 3848 e0429dc: d2805200 mov x0, #0x290 // #656 3849 e0429e0: 9b007e73 mul x19, x19, x0 3850 e0429e4: b8736a80 ldr w0, [x20, x19] 3851 e0429e8: 121e7400 and w0, w0, #0xfffffffc 3852 e0429ec: b8336a80 str w0, [x20, x19] 3853 e0429f0: 52800000 mov w0, #0x0 // #0 3854 e0429f4: a94153f3 ldp x19, x20, [sp, #16] 3855 e0429f8: a8c27bfd ldp x29, x30, [sp], #32 3856 e0429fc: d65f03c0 ret 3857 3858000000000e042a00 <opteed_cpu_on_finish_handler>: 3859 e042a00: a9b77bfd stp x29, x30, [sp, #-144]! 3860 e042a04: 910003fd mov x29, sp 3861 e042a08: a90153f3 stp x19, x20, [sp, #16] 3862 e042a0c: f0000074 adrp x20, e051000 <psci_ns_context+0xd80> 3863 e042a10: 91180294 add x20, x20, #0x600 3864 e042a14: f90013f5 str x21, [sp, #32] 3865 e042a18: 97fff916 bl e040e70 <plat_my_core_pos> 3866 e042a1c: 2a0003f3 mov w19, w0 3867 e042a20: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 3868 e042a24: 52805215 mov w21, #0x290 // #656 3869 e042a28: d2800005 mov x5, #0x0 // #0 3870 e042a2c: f9464c02 ldr x2, [x0, #3224] 3871 e042a30: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 3872 e042a34: 9bb55275 umaddl x21, w19, w21, x20 3873 e042a38: d2800004 mov x4, #0x0 // #0 3874 e042a3c: b94ed801 ldr w1, [x0, #3800] 3875 e042a40: 91002042 add x2, x2, #0x8 3876 e042a44: aa1503e6 mov x6, x21 3877 e042a48: d2800003 mov x3, #0x0 // #0 3878 e042a4c: 9100e3e0 add x0, sp, #0x38 3879 e042a50: 94000069 bl e042bf4 <opteed_init_optee_ep_state> 3880 e042a54: 9100e3e0 add x0, sp, #0x38 3881 e042a58: 97fffb23 bl e0416e4 <cm_init_my_context> 3882 e042a5c: aa1503e0 mov x0, x21 3883 e042a60: 9400013c bl e042f50 <opteed_synchronous_sp_entry> 3884 e042a64: 34000060 cbz w0, e042a70 <opteed_cpu_on_finish_handler+0x70> 3885 e042a68: 97fffc09 bl e041a8c <console_flush> 3886 e042a6c: 97fff7c6 bl e040984 <do_panic> 3887 e042a70: d2805200 mov x0, #0x290 // #656 3888 e042a74: f94013f5 ldr x21, [sp, #32] 3889 e042a78: 9b007e73 mul x19, x19, x0 3890 e042a7c: b8736a80 ldr w0, [x20, x19] 3891 e042a80: 121e7400 and w0, w0, #0xfffffffc 3892 e042a84: 32000000 orr w0, w0, #0x1 3893 e042a88: b8336a80 str w0, [x20, x19] 3894 e042a8c: a94153f3 ldp x19, x20, [sp, #16] 3895 e042a90: a8c97bfd ldp x29, x30, [sp], #144 3896 e042a94: d65f03c0 ret 3897 3898000000000e042a98 <opteed_cpu_on_handler>: 3899 e042a98: d65f03c0 ret 3900 3901000000000e042a9c <opteed_cpu_suspend_finish_handler>: 3902 e042a9c: a9bc7bfd stp x29, x30, [sp, #-64]! 3903 e042aa0: 910003fd mov x29, sp 3904 e042aa4: a90153f3 stp x19, x20, [sp, #16] 3905 e042aa8: f0000073 adrp x19, e051000 <psci_ns_context+0xd80> 3906 e042aac: 91180273 add x19, x19, #0x600 3907 e042ab0: a9025bf5 stp x21, x22, [sp, #32] 3908 e042ab4: aa0003f6 mov x22, x0 3909 e042ab8: f9001bf7 str x23, [sp, #48] 3910 e042abc: 97fff8ed bl e040e70 <plat_my_core_pos> 3911 e042ac0: 2a0003f5 mov w21, w0 3912 e042ac4: d2805217 mov x23, #0x290 // #656 3913 e042ac8: aa1503f4 mov x20, x21 3914 e042acc: 9b177eb5 mul x21, x21, x23 3915 e042ad0: 8b150260 add x0, x19, x21 3916 e042ad4: f9001016 str x22, [x0, #32] 3917 e042ad8: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 3918 e042adc: f9464c01 ldr x1, [x0, #3224] 3919 e042ae0: 52800000 mov w0, #0x0 // #0 3920 e042ae4: 91004021 add x1, x1, #0x10 3921 e042ae8: 97fffb4f bl e041824 <cm_set_elr_el3> 3922 e042aec: 9bb77e80 umull x0, w20, w23 3923 e042af0: 8b000260 add x0, x19, x0 3924 e042af4: 94000117 bl e042f50 <opteed_synchronous_sp_entry> 3925 e042af8: 34000060 cbz w0, e042b04 <opteed_cpu_suspend_finish_handler+0x68> 3926 e042afc: 97fffbe4 bl e041a8c <console_flush> 3927 e042b00: 97fff7a1 bl e040984 <do_panic> 3928 e042b04: b8756a60 ldr w0, [x19, x21] 3929 e042b08: f9401bf7 ldr x23, [sp, #48] 3930 e042b0c: 121e7400 and w0, w0, #0xfffffffc 3931 e042b10: 32000000 orr w0, w0, #0x1 3932 e042b14: b8356a60 str w0, [x19, x21] 3933 e042b18: a94153f3 ldp x19, x20, [sp, #16] 3934 e042b1c: a9425bf5 ldp x21, x22, [sp, #32] 3935 e042b20: a8c47bfd ldp x29, x30, [sp], #64 3936 e042b24: d65f03c0 ret 3937 3938000000000e042b28 <opteed_cpu_suspend_handler>: 3939 e042b28: a9bc7bfd stp x29, x30, [sp, #-64]! 3940 e042b2c: 910003fd mov x29, sp 3941 e042b30: a90153f3 stp x19, x20, [sp, #16] 3942 e042b34: f0000073 adrp x19, e051000 <psci_ns_context+0xd80> 3943 e042b38: 91180273 add x19, x19, #0x600 3944 e042b3c: a9025bf5 stp x21, x22, [sp, #32] 3945 e042b40: aa0003f6 mov x22, x0 3946 e042b44: f9001bf7 str x23, [sp, #48] 3947 e042b48: 97fff8ca bl e040e70 <plat_my_core_pos> 3948 e042b4c: 2a0003f5 mov w21, w0 3949 e042b50: d2805217 mov x23, #0x290 // #656 3950 e042b54: aa1503f4 mov x20, x21 3951 e042b58: 9b177eb5 mul x21, x21, x23 3952 e042b5c: 8b150260 add x0, x19, x21 3953 e042b60: f9001016 str x22, [x0, #32] 3954 e042b64: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 3955 e042b68: f9464c01 ldr x1, [x0, #3224] 3956 e042b6c: 52800000 mov w0, #0x0 // #0 3957 e042b70: 91005021 add x1, x1, #0x14 3958 e042b74: 97fffb2c bl e041824 <cm_set_elr_el3> 3959 e042b78: 9bb77e80 umull x0, w20, w23 3960 e042b7c: 8b000260 add x0, x19, x0 3961 e042b80: 940000f4 bl e042f50 <opteed_synchronous_sp_entry> 3962 e042b84: 34000060 cbz w0, e042b90 <opteed_cpu_suspend_handler+0x68> 3963 e042b88: 97fffbc1 bl e041a8c <console_flush> 3964 e042b8c: 97fff77e bl e040984 <do_panic> 3965 e042b90: b8756a60 ldr w0, [x19, x21] 3966 e042b94: f9401bf7 ldr x23, [sp, #48] 3967 e042b98: 121e7400 and w0, w0, #0xfffffffc 3968 e042b9c: 321f0000 orr w0, w0, #0x2 3969 e042ba0: b8356a60 str w0, [x19, x21] 3970 e042ba4: a94153f3 ldp x19, x20, [sp, #16] 3971 e042ba8: a9425bf5 ldp x21, x22, [sp, #32] 3972 e042bac: a8c47bfd ldp x29, x30, [sp], #64 3973 e042bb0: d65f03c0 ret 3974 3975000000000e042bb4 <opteed_init>: 3976 e042bb4: a9be7bfd stp x29, x30, [sp, #-32]! 3977 e042bb8: 910003fd mov x29, sp 3978 e042bbc: f9000bf3 str x19, [sp, #16] 3979 e042bc0: 97fff8ac bl e040e70 <plat_my_core_pos> 3980 e042bc4: 2a0003f3 mov w19, w0 3981 e042bc8: 52800000 mov w0, #0x0 // #0 3982 e042bcc: 97fffa37 bl e0414a8 <bl31_plat_get_next_image_ep_info> 3983 e042bd0: 97fffac5 bl e0416e4 <cm_init_my_context> 3984 e042bd4: f0000061 adrp x1, e051000 <psci_ns_context+0xd80> 3985 e042bd8: 91180021 add x1, x1, #0x600 3986 e042bdc: 52805200 mov w0, #0x290 // #656 3987 e042be0: 9ba00660 umaddl x0, w19, w0, x1 3988 e042be4: 940000db bl e042f50 <opteed_synchronous_sp_entry> 3989 e042be8: f9400bf3 ldr x19, [sp, #16] 3990 e042bec: a8c27bfd ldp x29, x30, [sp], #32 3991 e042bf0: d65f03c0 ret 3992 3993000000000e042bf4 <opteed_init_optee_ep_state>: 3994 e042bf4: a9bc7bfd stp x29, x30, [sp, #-64]! 3995 e042bf8: 910003fd mov x29, sp 3996 e042bfc: a90153f3 stp x19, x20, [sp, #16] 3997 e042c00: aa0003f3 mov x19, x0 3998 e042c04: aa0503f4 mov x20, x5 3999 e042c08: aa0603e0 mov x0, x6 4000 e042c0c: a9025bf5 stp x21, x22, [sp, #32] 4001 e042c10: aa0303f6 mov x22, x3 4002 e042c14: aa0403f5 mov x21, x4 4003 e042c18: a90363f7 stp x23, x24, [sp, #48] 4004 e042c1c: 2a0103f7 mov w23, w1 4005 e042c20: aa0203f8 mov x24, x2 4006 e042c24: d53800a1 mrs x1, mpidr_el1 4007 e042c28: f90004c1 str x1, [x6, #8] 4008 e042c2c: 52800001 mov w1, #0x0 // #0 4009 e042c30: b802041f str wzr, [x0], #32 4010 e042c34: 97fffaeb bl e0417e0 <cm_set_context> 4011 e042c38: d53e1000 mrs x0, sctlr_el3 4012 e042c3c: 528000c1 mov w1, #0x6 // #6 4013 e042c40: f267001f tst x0, #0x2000000 4014 e042c44: 52800080 mov w0, #0x4 // #4 4015 e042c48: 1a810000 csel w0, w0, w1, eq // eq = none 4016 e042c4c: 52802021 mov w1, #0x101 // #257 4017 e042c50: 710002ff cmp w23, #0x0 4018 e042c54: 72a00b01 movk w1, #0x58, lsl #16 4019 e042c58: 29000261 stp w1, w0, [x19] 4020 e042c5c: 52803a61 mov w1, #0x1d3 // #467 4021 e042c60: 528078a0 mov w0, #0x3c5 // #965 4022 e042c64: 1a810000 csel w0, w0, w1, eq // eq = none 4023 e042c68: f9000678 str x24, [x19, #8] 4024 e042c6c: b9001260 str w0, [x19, #16] 4025 e042c70: d2800801 mov x1, #0x40 // #64 4026 e042c74: 91006260 add x0, x19, #0x18 4027 e042c78: 97fff940 bl e041178 <zeromem> 4028 e042c7c: a94363f7 ldp x23, x24, [sp, #48] 4029 e042c80: a901d676 stp x22, x21, [x19, #24] 4030 e042c84: f9001674 str x20, [x19, #40] 4031 e042c88: a94153f3 ldp x19, x20, [sp, #16] 4032 e042c8c: a9425bf5 ldp x21, x22, [sp, #32] 4033 e042c90: a8c47bfd ldp x29, x30, [sp], #64 4034 e042c94: d65f03c0 ret 4035 4036000000000e042c98 <opteed_sel1_interrupt_handler>: 4037 e042c98: a9be7bfd stp x29, x30, [sp, #-32]! 4038 e042c9c: 52800020 mov w0, #0x1 // #1 4039 e042ca0: 910003fd mov x29, sp 4040 e042ca4: f9000bf3 str x19, [sp, #16] 4041 e042ca8: 97fffa53 bl e0415f4 <cm_el1_sysregs_context_save> 4042 e042cac: 97fff871 bl e040e70 <plat_my_core_pos> 4043 e042cb0: 2a0003f3 mov w19, w0 4044 e042cb4: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 4045 e042cb8: f9464c01 ldr x1, [x0, #3224] 4046 e042cbc: 52800000 mov w0, #0x0 // #0 4047 e042cc0: 91006021 add x1, x1, #0x18 4048 e042cc4: 97fffad8 bl e041824 <cm_set_elr_el3> 4049 e042cc8: 52800000 mov w0, #0x0 // #0 4050 e042ccc: 97fffa2b bl e041578 <cm_el1_sysregs_context_restore> 4051 e042cd0: 52800000 mov w0, #0x0 // #0 4052 e042cd4: 97fffadd bl e041848 <cm_set_next_eret_context> 4053 e042cd8: d53e4023 mrs x3, elr_el3 4054 e042cdc: f0000060 adrp x0, e051000 <psci_ns_context+0xd80> 4055 e042ce0: 2a1303e1 mov w1, w19 4056 e042ce4: 91180000 add x0, x0, #0x600 4057 e042ce8: d2805202 mov x2, #0x290 // #656 4058 e042cec: 9b020021 madd x1, x1, x2, x0 4059 e042cf0: f9001023 str x3, [x1, #32] 4060 e042cf4: d2800401 mov x1, #0x20 // #32 4061 e042cf8: 9ba20673 umaddl x19, w19, w2, x1 4062 e042cfc: 8b130000 add x0, x0, x19 4063 e042d00: f9400bf3 ldr x19, [sp, #16] 4064 e042d04: a8c27bfd ldp x29, x30, [sp], #32 4065 e042d08: d65f03c0 ret 4066 4067000000000e042d0c <opteed_setup>: 4068 e042d0c: a9be7bfd stp x29, x30, [sp, #-32]! 4069 e042d10: 910003fd mov x29, sp 4070 e042d14: f9000bf3 str x19, [sp, #16] 4071 e042d18: 97fff856 bl e040e70 <plat_my_core_pos> 4072 e042d1c: 2a0003f3 mov w19, w0 4073 e042d20: 52800000 mov w0, #0x0 // #0 4074 e042d24: 97fff9e1 bl e0414a8 <bl31_plat_get_next_image_ep_info> 4075 e042d28: b50000c0 cbnz x0, e042d40 <opteed_setup+0x34> 4076 e042d2c: b0000020 adrp x0, e047000 <__TEXT_END__> 4077 e042d30: 91141c00 add x0, x0, #0x507 4078 e042d34: 9400090b bl e045160 <tf_log> 4079 e042d38: 52800020 mov w0, #0x1 // #1 4080 e042d3c: 14000012 b e042d84 <opteed_setup+0x78> 4081 e042d40: f9400402 ldr x2, [x0, #8] 4082 e042d44: b4ffffa2 cbz x2, e042d38 <opteed_setup+0x2c> 4083 e042d48: 90000084 adrp x4, e052000 <opteed_sp_context+0xa00> 4084 e042d4c: 52805206 mov w6, #0x290 // #656 4085 e042d50: f9400c01 ldr x1, [x0, #24] 4086 e042d54: b90ed881 str w1, [x4, #3800] 4087 e042d58: f0000064 adrp x4, e051000 <psci_ns_context+0xd80> 4088 e042d5c: 91180084 add x4, x4, #0x600 4089 e042d60: f9401003 ldr x3, [x0, #32] 4090 e042d64: 9ba61266 umaddl x6, w19, w6, x4 4091 e042d68: f9401404 ldr x4, [x0, #40] 4092 e042d6c: f9401805 ldr x5, [x0, #48] 4093 e042d70: 97ffffa1 bl e042bf4 <opteed_init_optee_ep_state> 4094 e042d74: 90000000 adrp x0, e042000 <gicv3_distif_init+0x7c> 4095 e042d78: 912ed000 add x0, x0, #0xbb4 4096 e042d7c: 97fff9f7 bl e041558 <bl31_register_bl32_init> 4097 e042d80: 52800000 mov w0, #0x0 // #0 4098 e042d84: f9400bf3 ldr x19, [sp, #16] 4099 e042d88: a8c27bfd ldp x29, x30, [sp], #32 4100 e042d8c: d65f03c0 ret 4101 4102000000000e042d90 <opteed_smc_handler>: 4103 e042d90: a9b97bfd stp x29, x30, [sp, #-112]! 4104 e042d94: 910003fd mov x29, sp 4105 e042d98: a90153f3 stp x19, x20, [sp, #16] 4106 e042d9c: f0000073 adrp x19, e051000 <psci_ns_context+0xd80> 4107 e042da0: 91180273 add x19, x19, #0x600 4108 e042da4: a9025bf5 stp x21, x22, [sp, #32] 4109 e042da8: 2a0003f5 mov w21, w0 4110 e042dac: aa0103f6 mov x22, x1 4111 e042db0: a90363f7 stp x23, x24, [sp, #48] 4112 e042db4: aa0203f8 mov x24, x2 4113 e042db8: 52805217 mov w23, #0x290 // #656 4114 e042dbc: a9046bf9 stp x25, x26, [sp, #64] 4115 e042dc0: aa0303f9 mov x25, x3 4116 e042dc4: aa0403fa mov x26, x4 4117 e042dc8: a90573fb stp x27, x28, [sp, #80] 4118 e042dcc: aa0603fb mov x27, x6 4119 e042dd0: aa0703fc mov x28, x7 4120 e042dd4: 97fff827 bl e040e70 <plat_my_core_pos> 4121 e042dd8: 2a0003f4 mov w20, w0 4122 e042ddc: 9bb77e97 umull x23, w20, w23 4123 e042de0: 8b1302e3 add x3, x23, x19 4124 e042de4: 3600047c tbz w28, #0, e042e70 <opteed_smc_handler+0xe0> 4125 e042de8: 52800020 mov w0, #0x1 // #1 4126 e042dec: 97fffa02 bl e0415f4 <cm_el1_sysregs_context_save> 4127 e042df0: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 4128 e042df4: f9464c01 ldr x1, [x0, #3224] 4129 e042df8: 36f80055 tbz w21, #31, e042e00 <opteed_smc_handler+0x70> 4130 e042dfc: 91001021 add x1, x1, #0x4 4131 e042e00: 52800000 mov w0, #0x0 // #0 4132 e042e04: 97fffa88 bl e041824 <cm_set_elr_el3> 4133 e042e08: 52800000 mov w0, #0x0 // #0 4134 e042e0c: 97fff9db bl e041578 <cm_el1_sysregs_context_restore> 4135 e042e10: 52800000 mov w0, #0x0 // #0 4136 e042e14: 97fffa8d bl e041848 <cm_set_next_eret_context> 4137 e042e18: 2a1403e4 mov w4, w20 4138 e042e1c: d2805201 mov x1, #0x290 // #656 4139 e042e20: f9401360 ldr x0, [x27, #32] 4140 e042e24: 9b014c84 madd x4, x4, x1, x19 4141 e042e28: f9002080 str x0, [x4, #64] 4142 e042e2c: f9401760 ldr x0, [x27, #40] 4143 e042e30: f9002480 str x0, [x4, #72] 4144 e042e34: f9401b60 ldr x0, [x27, #48] 4145 e042e38: f9002880 str x0, [x4, #80] 4146 e042e3c: f9401f60 ldr x0, [x27, #56] 4147 e042e40: f9002c80 str x0, [x4, #88] 4148 e042e44: 910082e0 add x0, x23, #0x20 4149 e042e48: a9025895 stp x21, x22, [x4, #32] 4150 e042e4c: 8b000260 add x0, x19, x0 4151 e042e50: a9036498 stp x24, x25, [x4, #48] 4152 e042e54: a94153f3 ldp x19, x20, [sp, #16] 4153 e042e58: a9425bf5 ldp x21, x22, [sp, #32] 4154 e042e5c: a94363f7 ldp x23, x24, [sp, #48] 4155 e042e60: a9446bf9 ldp x25, x26, [sp, #64] 4156 e042e64: a94573fb ldp x27, x28, [sp, #80] 4157 e042e68: a8c77bfd ldp x29, x30, [sp], #112 4158 e042e6c: d65f03c0 ret 4159 e042e70: 52a84000 mov w0, #0x42000000 // #1107296256 4160 e042e74: 0b0002b5 add w21, w21, w0 4161 e042e78: 710022bf cmp w21, #0x8 4162 e042e7c: 54000368 b.hi e042ee8 <opteed_smc_handler+0x158> // b.pmore 4163 e042e80: b0000020 adrp x0, e047000 <__TEXT_END__> 4164 e042e84: 910ab000 add x0, x0, #0x2ac 4165 e042e88: 38754800 ldrb w0, [x0, w21, uxtw] 4166 e042e8c: 10000061 adr x1, e042e98 <opteed_smc_handler+0x108> 4167 e042e90: 8b208820 add x0, x1, w0, sxtb #2 4168 e042e94: d61f0000 br x0 4169 e042e98: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 4170 e042e9c: f9064c16 str x22, [x0, #3224] 4171 e042ea0: b4000296 cbz x22, e042ef0 <opteed_smc_handler+0x160> 4172 e042ea4: d2805204 mov x4, #0x290 // #656 4173 e042ea8: f90037e3 str x3, [sp, #104] 4174 e042eac: 9b047e94 mul x20, x20, x4 4175 e042eb0: b8746a60 ldr w0, [x19, x20] 4176 e042eb4: 121e7400 and w0, w0, #0xfffffffc 4177 e042eb8: 32000000 orr w0, w0, #0x1 4178 e042ebc: b8346a60 str w0, [x19, x20] 4179 e042ec0: b0000020 adrp x0, e047000 <__TEXT_END__> 4180 e042ec4: 91046000 add x0, x0, #0x118 4181 e042ec8: 9400047e bl e0440c0 <psci_register_spd_pm_hook> 4182 e042ecc: 52800042 mov w2, #0x2 // #2 4183 e042ed0: 90000001 adrp x1, e042000 <gicv3_distif_init+0x7c> 4184 e042ed4: 52800000 mov w0, #0x0 // #0 4185 e042ed8: 91326021 add x1, x1, #0xc98 4186 e042edc: 9400076b bl e044c88 <register_interrupt_type_handler> 4187 e042ee0: f94037e3 ldr x3, [sp, #104] 4188 e042ee4: 34000060 cbz w0, e042ef0 <opteed_smc_handler+0x160> 4189 e042ee8: 97fffae9 bl e041a8c <console_flush> 4190 e042eec: 97fff6a6 bl e040984 <do_panic> 4191 e042ef0: aa1603e1 mov x1, x22 4192 e042ef4: aa0303e0 mov x0, x3 4193 e042ef8: 94000022 bl e042f80 <opteed_synchronous_sp_exit> 4194 e042efc: 52800000 mov w0, #0x0 // #0 4195 e042f00: 97fff9bd bl e0415f4 <cm_el1_sysregs_context_save> 4196 e042f04: 52800020 mov w0, #0x1 // #1 4197 e042f08: 97fff9da bl e041670 <cm_get_context> 4198 e042f0c: aa0003f3 mov x19, x0 4199 e042f10: 52800020 mov w0, #0x1 // #1 4200 e042f14: 97fff999 bl e041578 <cm_el1_sysregs_context_restore> 4201 e042f18: 52800020 mov w0, #0x1 // #1 4202 e042f1c: 97fffa4b bl e041848 <cm_set_next_eret_context> 4203 e042f20: a9006276 stp x22, x24, [x19] 4204 e042f24: a9016a79 stp x25, x26, [x19, #16] 4205 e042f28: aa1303e0 mov x0, x19 4206 e042f2c: 17ffffca b e042e54 <opteed_smc_handler+0xc4> 4207 e042f30: 52800020 mov w0, #0x1 // #1 4208 e042f34: 97fff9cf bl e041670 <cm_get_context> 4209 e042f38: aa0003f3 mov x19, x0 4210 e042f3c: 52800020 mov w0, #0x1 // #1 4211 e042f40: 97fff98e bl e041578 <cm_el1_sysregs_context_restore> 4212 e042f44: 52800020 mov w0, #0x1 // #1 4213 e042f48: 97fffa40 bl e041848 <cm_set_next_eret_context> 4214 e042f4c: 17fffff7 b e042f28 <opteed_smc_handler+0x198> 4215 4216000000000e042f50 <opteed_synchronous_sp_entry>: 4217 e042f50: a9be7bfd stp x29, x30, [sp, #-32]! 4218 e042f54: 910003fd mov x29, sp 4219 e042f58: f9000bf3 str x19, [sp, #16] 4220 e042f5c: aa0003f3 mov x19, x0 4221 e042f60: 52800000 mov w0, #0x0 // #0 4222 e042f64: 97fff985 bl e041578 <cm_el1_sysregs_context_restore> 4223 e042f68: 52800000 mov w0, #0x0 // #0 4224 e042f6c: 97fffa37 bl e041848 <cm_set_next_eret_context> 4225 e042f70: 91004260 add x0, x19, #0x10 4226 e042f74: f9400bf3 ldr x19, [sp, #16] 4227 e042f78: a8c27bfd ldp x29, x30, [sp], #32 4228 e042f7c: 17fff797 b e040dd8 <opteed_enter_sp> 4229 4230000000000e042f80 <opteed_synchronous_sp_exit>: 4231 e042f80: a9be7bfd stp x29, x30, [sp, #-32]! 4232 e042f84: 910003fd mov x29, sp 4233 e042f88: a90153f3 stp x19, x20, [sp, #16] 4234 e042f8c: aa0003f3 mov x19, x0 4235 e042f90: aa0103f4 mov x20, x1 4236 e042f94: 52800000 mov w0, #0x0 // #0 4237 e042f98: 97fff997 bl e0415f4 <cm_el1_sysregs_context_save> 4238 e042f9c: f9400a60 ldr x0, [x19, #16] 4239 e042fa0: aa1403e1 mov x1, x20 4240 e042fa4: 97fff797 bl e040e00 <opteed_exit_sp> 4241 4242000000000e042fa8 <opteed_system_off>: 4243 e042fa8: a9be7bfd stp x29, x30, [sp, #-32]! 4244 e042fac: 910003fd mov x29, sp 4245 e042fb0: f9000bf3 str x19, [sp, #16] 4246 e042fb4: 97fff7af bl e040e70 <plat_my_core_pos> 4247 e042fb8: 2a0003f3 mov w19, w0 4248 e042fbc: 90000080 adrp x0, e052000 <opteed_sp_context+0xa00> 4249 e042fc0: f9464c01 ldr x1, [x0, #3224] 4250 e042fc4: 52800000 mov w0, #0x0 // #0 4251 e042fc8: 91007021 add x1, x1, #0x1c 4252 e042fcc: 97fffa16 bl e041824 <cm_set_elr_el3> 4253 e042fd0: f0000061 adrp x1, e051000 <psci_ns_context+0xd80> 4254 e042fd4: 91180021 add x1, x1, #0x600 4255 e042fd8: 52805200 mov w0, #0x290 // #656 4256 e042fdc: 9ba00660 umaddl x0, w19, w0, x1 4257 e042fe0: f9400bf3 ldr x19, [sp, #16] 4258 e042fe4: a8c27bfd ldp x29, x30, [sp], #32 4259 e042fe8: 17ffffda b e042f50 <opteed_synchronous_sp_entry> 4260 4261000000000e042fec <opteed_system_reset>: 4262 e042fec: a9be7bfd stp x29, x30, [sp, #-32]! 4263 e042ff0: 910003fd mov x29, sp 4264 e042ff4: f9000bf3 str x19, [sp, #16] 4265 e042ff8: 97fff79e bl e040e70 <plat_my_core_pos> 4266 e042ffc: 2a0003f3 mov w19, w0 4267 e043000: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4268 e043004: f9464c01 ldr x1, [x0, #3224] 4269 e043008: 52800000 mov w0, #0x0 // #0 4270 e04300c: 91008021 add x1, x1, #0x20 4271 e043010: 97fffa05 bl e041824 <cm_set_elr_el3> 4272 e043014: d0000061 adrp x1, e051000 <psci_ns_context+0xd80> 4273 e043018: 91180021 add x1, x1, #0x600 4274 e04301c: 52805200 mov w0, #0x290 // #656 4275 e043020: 9ba00660 umaddl x0, w19, w0, x1 4276 e043024: f9400bf3 ldr x19, [sp, #16] 4277 e043028: a8c27bfd ldp x29, x30, [sp], #32 4278 e04302c: 17ffffc9 b e042f50 <opteed_synchronous_sp_entry> 4279 4280000000000e043030 <pl061_get_direction>: 4281 e043030: 52800102 mov w2, #0x8 // #8 4282 e043034: f0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 4283 e043038: 912bc021 add x1, x1, #0xaf0 4284 e04303c: 1ac20c02 sdiv w2, w0, w2 4285 e043040: f862d821 ldr x1, [x1, w2, sxtw #3] 4286 e043044: 6b0003e2 negs w2, w0 4287 e043048: 12000842 and w2, w2, #0x7 4288 e04304c: 12000800 and w0, w0, #0x7 4289 e043050: 5a824400 csneg w0, w0, w2, mi // mi = first 4290 e043054: 39500021 ldrb w1, [x1, #1024] 4291 e043058: 92401c21 and x1, x1, #0xff 4292 e04305c: 9ac02420 lsr x0, x1, x0 4293 e043060: aa2003e0 mvn x0, x0 4294 e043064: 12000000 and w0, w0, #0x1 4295 e043068: d65f03c0 ret 4296 4297000000000e04306c <pl061_get_value>: 4298 e04306c: 6b0003e1 negs w1, w0 4299 e043070: 12000802 and w2, w0, #0x7 4300 e043074: 12000821 and w1, w1, #0x7 4301 e043078: 5a814441 csneg w1, w2, w1, mi // mi = first 4302 e04307c: d2800022 mov x2, #0x1 // #1 4303 e043080: 11000821 add w1, w1, #0x2 4304 e043084: 9ac12041 lsl x1, x2, x1 4305 e043088: 52800102 mov w2, #0x8 // #8 4306 e04308c: 1ac20c00 sdiv w0, w0, w2 4307 e043090: f0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 4308 e043094: 912bc042 add x2, x2, #0xaf0 4309 e043098: f860d840 ldr x0, [x2, w0, sxtw #3] 4310 e04309c: 38606820 ldrb w0, [x1, x0] 4311 e0430a0: 72001c1f tst w0, #0xff 4312 e0430a4: 1a9f07e0 cset w0, ne // ne = any 4313 e0430a8: d65f03c0 ret 4314 4315000000000e0430ac <pl061_gpio_init>: 4316 e0430ac: 90000020 adrp x0, e047000 <__TEXT_END__> 4317 e0430b0: 91004000 add x0, x0, #0x10 4318 e0430b4: 17fffcf8 b e042494 <gpio_init> 4319 4320000000000e0430b8 <pl061_gpio_register>: 4321 e0430b8: f0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 4322 e0430bc: 912bc042 add x2, x2, #0xaf0 4323 e0430c0: f821d840 str x0, [x2, w1, sxtw #3] 4324 e0430c4: d65f03c0 ret 4325 4326000000000e0430c8 <pl061_set_direction>: 4327 e0430c8: 6b0003e2 negs w2, w0 4328 e0430cc: 12000803 and w3, w0, #0x7 4329 e0430d0: 12000842 and w2, w2, #0x7 4330 e0430d4: 5a824463 csneg w3, w3, w2, mi // mi = first 4331 e0430d8: d2800022 mov x2, #0x1 // #1 4332 e0430dc: 9ac32042 lsl x2, x2, x3 4333 e0430e0: 52800103 mov w3, #0x8 // #8 4334 e0430e4: 1ac30c00 sdiv w0, w0, w3 4335 e0430e8: f0000063 adrp x3, e052000 <opteed_sp_context+0xa00> 4336 e0430ec: 912bc063 add x3, x3, #0xaf0 4337 e0430f0: f860d860 ldr x0, [x3, w0, sxtw #3] 4338 e0430f4: 350000c1 cbnz w1, e04310c <pl061_set_direction+0x44> 4339 e0430f8: 39500001 ldrb w1, [x0, #1024] 4340 e0430fc: 2a010042 orr w2, w2, w1 4341 e043100: 12001c42 and w2, w2, #0xff 4342 e043104: 39100002 strb w2, [x0, #1024] 4343 e043108: d65f03c0 ret 4344 e04310c: 39500001 ldrb w1, [x0, #1024] 4345 e043110: 12001c21 and w1, w1, #0xff 4346 e043114: 0a220022 bic w2, w1, w2 4347 e043118: 17fffffb b e043104 <pl061_set_direction+0x3c> 4348 4349000000000e04311c <pl061_set_value>: 4350 e04311c: 6b0003e2 negs w2, w0 4351 e043120: 12000803 and w3, w0, #0x7 4352 e043124: 12000842 and w2, w2, #0x7 4353 e043128: f0000065 adrp x5, e052000 <opteed_sp_context+0xa00> 4354 e04312c: 5a824463 csneg w3, w3, w2, mi // mi = first 4355 e043130: 52800102 mov w2, #0x8 // #8 4356 e043134: 912bc0a5 add x5, x5, #0xaf0 4357 e043138: 11000864 add w4, w3, #0x2 4358 e04313c: 1ac20c00 sdiv w0, w0, w2 4359 e043140: d2800022 mov x2, #0x1 // #1 4360 e043144: 9ac42044 lsl x4, x2, x4 4361 e043148: f860d8a0 ldr x0, [x5, w0, sxtw #3] 4362 e04314c: 7100043f cmp w1, #0x1 4363 e043150: 540000a1 b.ne e043164 <pl061_set_value+0x48> // b.any 4364 e043154: 9ac32042 lsl x2, x2, x3 4365 e043158: 12001c42 and w2, w2, #0xff 4366 e04315c: 38206882 strb w2, [x4, x0] 4367 e043160: d65f03c0 ret 4368 e043164: 3820689f strb wzr, [x4, x0] 4369 e043168: 17fffffe b e043160 <pl061_set_value+0x44> 4370 4371000000000e04316c <plat_arm_set_twedel_scr_el3>: 4372 e04316c: 12800000 mov w0, #0xffffffff // #-1 4373 e043170: d65f03c0 ret 4374 4375000000000e043174 <plat_core_pos_by_mpidr>: 4376 e043174: aa0003e1 mov x1, x0 4377 e043178: 92409c00 and x0, x0, #0xffffffffff 4378 e04317c: 92705c21 and x1, x1, #0xffffff0000 4379 e043180: 9260dc00 and x0, x0, #0xffffffff00ffffff 4380 e043184: 9260dc21 and x1, x1, #0xffffffff00ffffff 4381 e043188: b50000e1 cbnz x1, e0431a4 <plat_core_pos_by_mpidr+0x30> 4382 e04318c: d348fc01 lsr x1, x0, #8 4383 e043190: 121e1402 and w2, w0, #0xfc 4384 e043194: 121f1821 and w1, w1, #0xfe 4385 e043198: 2a020021 orr w1, w1, w2 4386 e04319c: 35000041 cbnz w1, e0431a4 <plat_core_pos_by_mpidr+0x30> 4387 e0431a0: 17fff738 b e040e80 <plat_qemu_calc_core_pos> 4388 e0431a4: 12800000 mov w0, #0xffffffff // #-1 4389 e0431a8: d65f03c0 ret 4390 4391000000000e0431ac <plat_default_ea_handler>: 4392 e0431ac: a9bd7bfd stp x29, x30, [sp, #-48]! 4393 e0431b0: 910003fd mov x29, sp 4394 e0431b4: a90153f3 stp x19, x20, [sp, #16] 4395 e0431b8: 2a0003f4 mov w20, w0 4396 e0431bc: f90013f5 str x21, [sp, #32] 4397 e0431c0: aa0103f5 mov x21, x1 4398 e0431c4: d53e4013 mrs x19, spsr_el3 4399 e0431c8: 90000020 adrp x0, e047000 <__TEXT_END__> 4400 e0431cc: 53020e73 ubfx w19, w19, #2, #2 4401 e0431d0: 9113e000 add x0, x0, #0x4f8 4402 e0431d4: 94000808 bl e0451f4 <tf_log_newline> 4403 e0431d8: d53800a1 mrs x1, mpidr_el1 4404 e0431dc: 71000e7f cmp w19, #0x3 4405 e0431e0: 54000220 b.eq e043224 <plat_default_ea_handler+0x78> // b.none 4406 e0431e4: 71000a7f cmp w19, #0x2 4407 e0431e8: 90000020 adrp x0, e047000 <__TEXT_END__> 4408 e0431ec: 90000022 adrp x2, e047000 <__TEXT_END__> 4409 e0431f0: 91179000 add x0, x0, #0x5e4 4410 e0431f4: 91177842 add x2, x2, #0x5de 4411 e0431f8: 9a801042 csel x2, x2, x0, ne // ne = any 4412 e0431fc: 90000020 adrp x0, e047000 <__TEXT_END__> 4413 e043200: 9117a000 add x0, x0, #0x5e8 4414 e043204: 940007d7 bl e045160 <tf_log> 4415 e043208: aa1503e2 mov x2, x21 4416 e04320c: 2a1403e1 mov w1, w20 4417 e043210: 90000020 adrp x0, e047000 <__TEXT_END__> 4418 e043214: 91187400 add x0, x0, #0x61d 4419 e043218: 940007d2 bl e045160 <tf_log> 4420 e04321c: 97fffa1c bl e041a8c <console_flush> 4421 e043220: 97fff5d9 bl e040984 <do_panic> 4422 e043224: 90000022 adrp x2, e047000 <__TEXT_END__> 4423 e043228: 91176842 add x2, x2, #0x5da 4424 e04322c: 17fffff4 b e0431fc <plat_default_ea_handler+0x50> 4425 4426000000000e043230 <plat_get_power_domain_tree_desc>: 4427 e043230: b0000020 adrp x0, e048000 <tf_xlat_ctx> 4428 e043234: 9101a000 add x0, x0, #0x68 4429 e043238: d65f03c0 ret 4430 4431000000000e04323c <plat_get_soc_revision>: 4432 e04323c: 12800000 mov w0, #0xffffffff // #-1 4433 e043240: d65f03c0 ret 4434 4435000000000e043244 <plat_get_soc_version>: 4436 e043244: 12800000 mov w0, #0xffffffff // #-1 4437 e043248: d65f03c0 ret 4438 4439000000000e04324c <plat_get_syscnt_freq2>: 4440 e04324c: 52959400 mov w0, #0xaca0 // #44192 4441 e043250: 72a07720 movk w0, #0x3b9, lsl #16 4442 e043254: d65f03c0 ret 4443 4444000000000e043258 <plat_get_target_pwr_state>: 4445 e043258: d2800003 mov x3, #0x0 // #0 4446 e04325c: 52800040 mov w0, #0x2 // #2 4447 e043260: 38636824 ldrb w4, [x1, x3] 4448 e043264: 91000463 add x3, x3, #0x1 4449 e043268: 6b00009f cmp w4, w0 4450 e04326c: 1a809080 csel w0, w4, w0, ls // ls = plast 4451 e043270: 12001c00 and w0, w0, #0xff 4452 e043274: 6b03005f cmp w2, w3 4453 e043278: 54ffff41 b.ne e043260 <plat_get_target_pwr_state+0x8> // b.any 4454 e04327c: d65f03c0 ret 4455 4456000000000e043280 <plat_ic_get_pending_interrupt_type>: 4457 e043280: a9bf7bfd stp x29, x30, [sp, #-16]! 4458 e043284: 910003fd mov x29, sp 4459 e043288: 97fffb7b bl e042074 <gicv3_get_pending_interrupt_type> 4460 e04328c: 510ff000 sub w0, w0, #0x3fc 4461 e043290: 71000c1f cmp w0, #0x3 4462 e043294: 540000c8 b.hi e0432ac <plat_ic_get_pending_interrupt_type+0x2c> // b.pmore 4463 e043298: 90000021 adrp x1, e047000 <__TEXT_END__> 4464 e04329c: 9111f421 add x1, x1, #0x47d 4465 e0432a0: 38604820 ldrb w0, [x1, w0, uxtw] 4466 e0432a4: a8c17bfd ldp x29, x30, [sp], #16 4467 e0432a8: d65f03c0 ret 4468 e0432ac: 52800020 mov w0, #0x1 // #1 4469 e0432b0: 17fffffd b e0432a4 <plat_ic_get_pending_interrupt_type+0x24> 4470 4471000000000e0432b4 <plat_interrupt_type_to_line>: 4472 e0432b4: 7100041f cmp w0, #0x1 4473 e0432b8: 540001e0 b.eq e0432f4 <plat_interrupt_type_to_line+0x40> // b.none 4474 e0432bc: 7100081f cmp w0, #0x2 4475 e0432c0: 540000c0 b.eq e0432d8 <plat_interrupt_type_to_line+0x24> // b.none 4476 e0432c4: 35000100 cbnz w0, e0432e4 <plat_interrupt_type_to_line+0x30> 4477 e0432c8: 7100003f cmp w1, #0x0 4478 e0432cc: 1a9f07e0 cset w0, ne // ne = any 4479 e0432d0: 11000400 add w0, w0, #0x1 4480 e0432d4: d65f03c0 ret 4481 e0432d8: 7100003f cmp w1, #0x0 4482 e0432dc: 1a9f0400 csinc w0, w0, wzr, eq // eq = none 4483 e0432e0: d65f03c0 ret 4484 e0432e4: a9bf7bfd stp x29, x30, [sp, #-16]! 4485 e0432e8: 910003fd mov x29, sp 4486 e0432ec: 97fff9e8 bl e041a8c <console_flush> 4487 e0432f0: 97fff5a5 bl e040984 <do_panic> 4488 e0432f4: 52800040 mov w0, #0x2 // #2 4489 e0432f8: d65f03c0 ret 4490 4491000000000e0432fc <plat_is_smccc_feature_available>: 4492 e0432fc: 12800000 mov w0, #0xffffffff // #-1 4493 e043300: d65f03c0 ret 4494 4495000000000e043304 <plat_log_get_prefix>: 4496 e043304: 7100c81f cmp w0, #0x32 4497 e043308: 52800641 mov w1, #0x32 // #50 4498 e04330c: 1a819000 csel w0, w0, w1, ls // ls = plast 4499 e043310: 52800141 mov w1, #0xa // #10 4500 e043314: 6b01001f cmp w0, w1 4501 e043318: 1a812000 csel w0, w0, w1, cs // cs = hs, nlast 4502 e04331c: 1ac10800 udiv w0, w0, w1 4503 e043320: 90000021 adrp x1, e047000 <__TEXT_END__> 4504 e043324: 91058021 add x1, x1, #0x160 4505 e043328: 51000400 sub w0, w0, #0x1 4506 e04332c: f8607820 ldr x0, [x1, x0, lsl #3] 4507 e043330: d65f03c0 ret 4508 4509000000000e043334 <plat_qemu_gic_init>: 4510 e043334: 90000020 adrp x0, e047000 <__TEXT_END__> 4511 e043338: 91010000 add x0, x0, #0x40 4512 e04333c: a9bf7bfd stp x29, x30, [sp, #-16]! 4513 e043340: 910003fd mov x29, sp 4514 e043344: 97fffb31 bl e042008 <gicv3_driver_init> 4515 e043348: 97fffb0f bl e041f84 <gicv3_distif_init> 4516 e04334c: 97fff6c9 bl e040e70 <plat_my_core_pos> 4517 e043350: 97fffb8a bl e042178 <gicv3_rdistif_init> 4518 e043354: 97fff6c7 bl e040e70 <plat_my_core_pos> 4519 e043358: a8c17bfd ldp x29, x30, [sp], #16 4520 e04335c: 17fffae7 b e041ef8 <gicv3_cpuif_enable> 4521 4522000000000e043360 <plat_setup_psci_ops>: 4523 e043360: d2a1c002 mov x2, #0xe000000 // #234881024 4524 e043364: f9000040 str x0, [x2] 4525 e043368: 90000020 adrp x0, e047000 <__TEXT_END__> 4526 e04336c: 9101c000 add x0, x0, #0x70 4527 e043370: f9000020 str x0, [x1] 4528 e043374: 52800000 mov w0, #0x0 // #0 4529 e043378: d65f03c0 ret 4530 4531000000000e04337c <print_entry_point_info>: 4532 e04337c: d65f03c0 ret 4533 4534000000000e043380 <psci_acquire_pwr_domain_locks>: 4535 e043380: a9bc7bfd stp x29, x30, [sp, #-64]! 4536 e043384: 910003fd mov x29, sp 4537 e043388: a90153f3 stp x19, x20, [sp, #16] 4538 e04338c: 2a0003f4 mov w20, w0 4539 e043390: 52800033 mov w19, #0x1 // #1 4540 e043394: a9025bf5 stp x21, x22, [sp, #32] 4541 e043398: d00000b6 adrp x22, e059000 <psci_locks> 4542 e04339c: aa0103f5 mov x21, x1 4543 e0433a0: 910002d6 add x22, x22, #0x0 4544 e0433a4: f9001bf7 str x23, [sp, #48] 4545 e0433a8: d00000b7 adrp x23, e059000 <psci_locks> 4546 e0433ac: 910082f7 add x23, x23, #0x20 4547 e0433b0: 6b14027f cmp w19, w20 4548 e0433b4: 540000c9 b.ls e0433cc <psci_acquire_pwr_domain_locks+0x4c> // b.plast 4549 e0433b8: a94153f3 ldp x19, x20, [sp, #16] 4550 e0433bc: a9425bf5 ldp x21, x22, [sp, #32] 4551 e0433c0: f9401bf7 ldr x23, [sp, #48] 4552 e0433c4: a8c47bfd ldp x29, x30, [sp], #64 4553 e0433c8: d65f03c0 ret 4554 e0433cc: 51000660 sub w0, w19, #0x1 4555 e0433d0: 11000673 add w19, w19, #0x1 4556 e0433d4: b8607aa0 ldr w0, [x21, x0, lsl #2] 4557 e0433d8: 8b0012e0 add x0, x23, x0, lsl #4 4558 e0433dc: 79401c00 ldrh w0, [x0, #14] 4559 e0433e0: 8b0012c0 add x0, x22, x0, lsl #4 4560 e0433e4: 97fff7a1 bl e041268 <bakery_lock_get> 4561 e0433e8: 17fffff2 b e0433b0 <psci_acquire_pwr_domain_locks+0x30> 4562 4563000000000e0433ec <psci_affinity_info>: 4564 e0433ec: 340000e1 cbz w1, e043408 <psci_affinity_info+0x1c> 4565 e0433f0: 12800020 mov w0, #0xfffffffe // #-2 4566 e0433f4: d65f03c0 ret 4567 e0433f8: 12800020 mov w0, #0xfffffffe // #-2 4568 e0433fc: f9400bf3 ldr x19, [sp, #16] 4569 e043400: a8c27bfd ldp x29, x30, [sp], #32 4570 e043404: d65f03c0 ret 4571 e043408: a9be7bfd stp x29, x30, [sp, #-32]! 4572 e04340c: 910003fd mov x29, sp 4573 e043410: f9000bf3 str x19, [sp, #16] 4574 e043414: 97ffff58 bl e043174 <plat_core_pos_by_mpidr> 4575 e043418: 2a0003f3 mov w19, w0 4576 e04341c: 3100041f cmn w0, #0x1 4577 e043420: 54fffec0 b.eq e0433f8 <psci_affinity_info+0xc> // b.none 4578 e043424: 97fff3ba bl e04030c <_cpu_data_by_index> 4579 e043428: 91006000 add x0, x0, #0x18 4580 e04342c: d2800081 mov x1, #0x4 // #4 4581 e043430: 97fff631 bl e040cf4 <flush_dcache_range> 4582 e043434: 2a1303e0 mov w0, w19 4583 e043438: 97fff3b5 bl e04030c <_cpu_data_by_index> 4584 e04343c: b9401800 ldr w0, [x0, #24] 4585 e043440: 17ffffef b e0433fc <psci_affinity_info+0x10> 4586 4587000000000e043444 <psci_arch_setup>: 4588 e043444: a9bf7bfd stp x29, x30, [sp, #-16]! 4589 e043448: 910003fd mov x29, sp 4590 e04344c: 97ffff80 bl e04324c <plat_get_syscnt_freq2> 4591 e043450: 2a0003e0 mov w0, w0 4592 e043454: d51be000 msr cntfrq_el0, x0 4593 e043458: a8c17bfd ldp x29, x30, [sp], #16 4594 e04345c: 17fff649 b e040d80 <init_cpu_ops> 4595 4596000000000e043460 <psci_cpu_off>: 4597 e043460: 52800020 mov w0, #0x1 // #1 4598 e043464: 14000175 b e043a38 <psci_do_cpu_off> 4599 4600000000000e043468 <psci_cpu_on>: 4601 e043468: a9b77bfd stp x29, x30, [sp, #-144]! 4602 e04346c: 910003fd mov x29, sp 4603 e043470: a90153f3 stp x19, x20, [sp, #16] 4604 e043474: aa0003f3 mov x19, x0 4605 e043478: aa0103f4 mov x20, x1 4606 e04347c: f90013f5 str x21, [sp, #32] 4607 e043480: aa0203f5 mov x21, x2 4608 e043484: 94000522 bl e04490c <psci_validate_mpidr> 4609 e043488: 350001a0 cbnz w0, e0434bc <psci_cpu_on+0x54> 4610 e04348c: aa1503e2 mov x2, x21 4611 e043490: aa1403e1 mov x1, x20 4612 e043494: 9100e3e0 add x0, sp, #0x38 4613 e043498: 940004e0 bl e044818 <psci_validate_entry_point> 4614 e04349c: 35000080 cbnz w0, e0434ac <psci_cpu_on+0x44> 4615 e0434a0: 9100e3e1 add x1, sp, #0x38 4616 e0434a4: aa1303e0 mov x0, x19 4617 e0434a8: 9400003d bl e04359c <psci_cpu_on_start> 4618 e0434ac: a94153f3 ldp x19, x20, [sp, #16] 4619 e0434b0: f94013f5 ldr x21, [sp, #32] 4620 e0434b4: a8c97bfd ldp x29, x30, [sp], #144 4621 e0434b8: d65f03c0 ret 4622 e0434bc: 12800020 mov w0, #0xfffffffe // #-2 4623 e0434c0: 17fffffb b e0434ac <psci_cpu_on+0x44> 4624 4625000000000e0434c4 <psci_cpu_on_finish>: 4626 e0434c4: a9bd7bfd stp x29, x30, [sp, #-48]! 4627 e0434c8: 910003fd mov x29, sp 4628 e0434cc: a9025bf5 stp x21, x22, [sp, #32] 4629 e0434d0: f0000075 adrp x21, e052000 <opteed_sp_context+0xa00> 4630 e0434d4: a90153f3 stp x19, x20, [sp, #16] 4631 e0434d8: 2a0003f3 mov w19, w0 4632 e0434dc: aa0103f4 mov x20, x1 4633 e0434e0: f945cea0 ldr x0, [x21, #2968] 4634 e0434e4: f9401401 ldr x1, [x0, #40] 4635 e0434e8: aa1403e0 mov x0, x20 4636 e0434ec: d63f0020 blr x1 4637 e0434f0: 97fff692 bl e040f38 <psci_do_pwrup_cache_maintenance> 4638 e0434f4: f945cea0 ldr x0, [x21, #2968] 4639 e0434f8: f9401801 ldr x1, [x0, #48] 4640 e0434fc: b4000061 cbz x1, e043508 <psci_cpu_on_finish+0x44> 4641 e043500: aa1403e0 mov x0, x20 4642 e043504: d63f0020 blr x1 4643 e043508: d2800194 mov x20, #0xc // #12 4644 e04350c: f0000075 adrp x21, e052000 <opteed_sp_context+0xa00> 4645 e043510: 8b335294 add x20, x20, w19, uxtw #4 4646 e043514: 912c62b5 add x21, x21, #0xb18 4647 e043518: 8b150294 add x20, x20, x21 4648 e04351c: 97ffffca bl e043444 <psci_arch_setup> 4649 e043520: aa1403e0 mov x0, x20 4650 e043524: 97fff70b bl e041150 <spin_lock> 4651 e043528: aa1403e0 mov x0, x20 4652 e04352c: 97fff711 bl e041170 <spin_unlock> 4653 e043530: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4654 e043534: f945d000 ldr x0, [x0, #2976] 4655 e043538: b40000a0 cbz x0, e04354c <psci_cpu_on_finish+0x88> 4656 e04353c: f9400c01 ldr x1, [x0, #24] 4657 e043540: b4000061 cbz x1, e04354c <psci_cpu_on_finish+0x88> 4658 e043544: d2800000 mov x0, #0x0 // #0 4659 e043548: d63f0020 blr x1 4660 e04354c: 90000034 adrp x20, e047000 <__TEXT_END__> 4661 e043550: 90000036 adrp x22, e047000 <__TEXT_END__> 4662 e043554: 91228294 add x20, x20, #0x8a0 4663 e043558: 912282d6 add x22, x22, #0x8a0 4664 e04355c: eb16029f cmp x20, x22 4665 e043560: 54000163 b.cc e04358c <psci_cpu_on_finish+0xc8> // b.lo, b.ul, b.last 4666 e043564: d53800a1 mrs x1, mpidr_el1 4667 e043568: d37c7e73 ubfiz x19, x19, #4, #32 4668 e04356c: 92409c21 and x1, x1, #0xffffffffff 4669 e043570: 9260dc21 and x1, x1, #0xffffffff00ffffff 4670 e043574: 52800020 mov w0, #0x1 // #1 4671 e043578: f8336aa1 str x1, [x21, x19] 4672 e04357c: a94153f3 ldp x19, x20, [sp, #16] 4673 e043580: a9425bf5 ldp x21, x22, [sp, #32] 4674 e043584: a8c37bfd ldp x29, x30, [sp], #48 4675 e043588: 17fff863 b e041714 <cm_prepare_el3_exit> 4676 e04358c: f8408681 ldr x1, [x20], #8 4677 e043590: d2800000 mov x0, #0x0 // #0 4678 e043594: d63f0020 blr x1 4679 e043598: 17fffff1 b e04355c <psci_cpu_on_finish+0x98> 4680 4681000000000e04359c <psci_cpu_on_start>: 4682 e04359c: a9bc7bfd stp x29, x30, [sp, #-64]! 4683 e0435a0: 910003fd mov x29, sp 4684 e0435a4: a90153f3 stp x19, x20, [sp, #16] 4685 e0435a8: aa0003f4 mov x20, x0 4686 e0435ac: a9025bf5 stp x21, x22, [sp, #32] 4687 e0435b0: aa0103f6 mov x22, x1 4688 e0435b4: d2800195 mov x21, #0xc // #12 4689 e0435b8: f9001bf7 str x23, [sp, #48] 4690 e0435bc: 97fffeee bl e043174 <plat_core_pos_by_mpidr> 4691 e0435c0: f0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 4692 e0435c4: 912c6042 add x2, x2, #0xb18 4693 e0435c8: 8b2052b5 add x21, x21, w0, uxtw #4 4694 e0435cc: 2a0003f3 mov w19, w0 4695 e0435d0: 8b0202b5 add x21, x21, x2 4696 e0435d4: aa1503e0 mov x0, x21 4697 e0435d8: 97fff6de bl e041150 <spin_lock> 4698 e0435dc: 2a1303e0 mov w0, w19 4699 e0435e0: 97fff34b bl e04030c <_cpu_data_by_index> 4700 e0435e4: d2800081 mov x1, #0x4 // #4 4701 e0435e8: 91006000 add x0, x0, #0x18 4702 e0435ec: 97fff5c2 bl e040cf4 <flush_dcache_range> 4703 e0435f0: 2a1303e0 mov w0, w19 4704 e0435f4: 97fff346 bl e04030c <_cpu_data_by_index> 4705 e0435f8: b9401800 ldr w0, [x0, #24] 4706 e0435fc: 34000780 cbz w0, e0436ec <psci_cpu_on_start+0x150> 4707 e043600: 7100081f cmp w0, #0x2 4708 e043604: 54000780 b.eq e0436f4 <psci_cpu_on_start+0x158> // b.none 4709 e043608: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4710 e04360c: f945d000 ldr x0, [x0, #2976] 4711 e043610: b40000a0 cbz x0, e043624 <psci_cpu_on_start+0x88> 4712 e043614: f9400001 ldr x1, [x0] 4713 e043618: b4000061 cbz x1, e043624 <psci_cpu_on_start+0x88> 4714 e04361c: aa1403e0 mov x0, x20 4715 e043620: d63f0020 blr x1 4716 e043624: 2a1303e0 mov w0, w19 4717 e043628: 52800057 mov w23, #0x2 // #2 4718 e04362c: 97fff338 bl e04030c <_cpu_data_by_index> 4719 e043630: b9001817 str w23, [x0, #24] 4720 e043634: 2a1303e0 mov w0, w19 4721 e043638: 97fff335 bl e04030c <_cpu_data_by_index> 4722 e04363c: 91006000 add x0, x0, #0x18 4723 e043640: d2800081 mov x1, #0x4 // #4 4724 e043644: 97fff5ac bl e040cf4 <flush_dcache_range> 4725 e043648: 2a1303e0 mov w0, w19 4726 e04364c: 97fff330 bl e04030c <_cpu_data_by_index> 4727 e043650: b9401800 ldr w0, [x0, #24] 4728 e043654: 6b17001f cmp w0, w23 4729 e043658: 54000120 b.eq e04367c <psci_cpu_on_start+0xe0> // b.none 4730 e04365c: 2a1303e0 mov w0, w19 4731 e043660: 97fff32b bl e04030c <_cpu_data_by_index> 4732 e043664: b9001817 str w23, [x0, #24] 4733 e043668: 2a1303e0 mov w0, w19 4734 e04366c: 97fff328 bl e04030c <_cpu_data_by_index> 4735 e043670: 91006000 add x0, x0, #0x18 4736 e043674: d2800081 mov x1, #0x4 // #4 4737 e043678: 97fff59f bl e040cf4 <flush_dcache_range> 4738 e04367c: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4739 e043680: f945cc00 ldr x0, [x0, #2968] 4740 e043684: f9400401 ldr x1, [x0, #8] 4741 e043688: aa1403e0 mov x0, x20 4742 e04368c: d63f0020 blr x1 4743 e043690: 2a0003f4 mov w20, w0 4744 e043694: 35000180 cbnz w0, e0436c4 <psci_cpu_on_start+0x128> 4745 e043698: aa1603e1 mov x1, x22 4746 e04369c: 2a1303e0 mov w0, w19 4747 e0436a0: 97fff805 bl e0416b4 <cm_init_context_by_index> 4748 e0436a4: aa1503e0 mov x0, x21 4749 e0436a8: 97fff6b2 bl e041170 <spin_unlock> 4750 e0436ac: 2a1403e0 mov w0, w20 4751 e0436b0: a94153f3 ldp x19, x20, [sp, #16] 4752 e0436b4: a9425bf5 ldp x21, x22, [sp, #32] 4753 e0436b8: f9401bf7 ldr x23, [sp, #48] 4754 e0436bc: a8c47bfd ldp x29, x30, [sp], #64 4755 e0436c0: d65f03c0 ret 4756 e0436c4: 2a1303e0 mov w0, w19 4757 e0436c8: 97fff311 bl e04030c <_cpu_data_by_index> 4758 e0436cc: 52800021 mov w1, #0x1 // #1 4759 e0436d0: b9001801 str w1, [x0, #24] 4760 e0436d4: 2a1303e0 mov w0, w19 4761 e0436d8: 97fff30d bl e04030c <_cpu_data_by_index> 4762 e0436dc: 91006000 add x0, x0, #0x18 4763 e0436e0: d2800081 mov x1, #0x4 // #4 4764 e0436e4: 97fff584 bl e040cf4 <flush_dcache_range> 4765 e0436e8: 17ffffef b e0436a4 <psci_cpu_on_start+0x108> 4766 e0436ec: 12800074 mov w20, #0xfffffffc // #-4 4767 e0436f0: 17ffffed b e0436a4 <psci_cpu_on_start+0x108> 4768 e0436f4: 12800094 mov w20, #0xfffffffb // #-5 4769 e0436f8: 17ffffeb b e0436a4 <psci_cpu_on_start+0x108> 4770 4771000000000e0436fc <psci_cpu_suspend>: 4772 e0436fc: a9b67bfd stp x29, x30, [sp, #-160]! 4773 e043700: 910003fd mov x29, sp 4774 e043704: a90153f3 stp x19, x20, [sp, #16] 4775 e043708: 2a0003f3 mov w19, w0 4776 e04370c: a9025bf5 stp x21, x22, [sp, #32] 4777 e043710: aa0103f6 mov x22, x1 4778 e043714: 910103e1 add x1, sp, #0x40 4779 e043718: f9001bf7 str x23, [sp, #48] 4780 e04371c: aa0203f7 mov x23, x2 4781 e043720: 790083ff strh wzr, [sp, #64] 4782 e043724: 94000482 bl e04492c <psci_validate_power_state> 4783 e043728: 2a0003f4 mov w20, w0 4784 e04372c: 35000300 cbnz w0, e04378c <psci_cpu_suspend+0x90> 4785 e043730: 910103e0 add x0, sp, #0x40 4786 e043734: d3504273 ubfx x19, x19, #16, #1 4787 e043738: 9400018b bl e043d64 <psci_find_target_suspend_lvl> 4788 e04373c: 2a0003f5 mov w21, w0 4789 e043740: 7100081f cmp w0, #0x2 4790 e043744: 540000c1 b.ne e04375c <psci_cpu_suspend+0x60> // b.any 4791 e043748: 90000020 adrp x0, e047000 <__TEXT_END__> 4792 e04374c: 9110a800 add x0, x0, #0x42a 4793 e043750: 94000684 bl e045160 <tf_log> 4794 e043754: 97fff8ce bl e041a8c <console_flush> 4795 e043758: 97fff48b bl e040984 <do_panic> 4796 e04375c: 2a000260 orr w0, w19, w0 4797 e043760: 35000220 cbnz w0, e0437a4 <psci_cpu_suspend+0xa8> 4798 e043764: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4799 e043768: f945cc00 ldr x0, [x0, #2968] 4800 e04376c: f9400001 ldr x1, [x0] 4801 e043770: b4000361 cbz x1, e0437dc <psci_cpu_suspend+0xe0> 4802 e043774: 394103e0 ldrb w0, [sp, #64] 4803 e043778: d53ed042 mrs x2, tpidr_el3 4804 e04377c: 39008040 strb w0, [x2, #32] 4805 e043780: d63f0020 blr x1 4806 e043784: d53ed040 mrs x0, tpidr_el3 4807 e043788: 3900801f strb wzr, [x0, #32] 4808 e04378c: 2a1403e0 mov w0, w20 4809 e043790: a94153f3 ldp x19, x20, [sp, #16] 4810 e043794: a9425bf5 ldp x21, x22, [sp, #32] 4811 e043798: f9401bf7 ldr x23, [sp, #48] 4812 e04379c: a8ca7bfd ldp x29, x30, [sp], #160 4813 e0437a0: d65f03c0 ret 4814 e0437a4: 350000f3 cbnz w19, e0437c0 <psci_cpu_suspend+0xc4> 4815 e0437a8: 2a1303e3 mov w3, w19 4816 e0437ac: 910103e2 add x2, sp, #0x40 4817 e0437b0: 2a1503e1 mov w1, w21 4818 e0437b4: 910123e0 add x0, sp, #0x48 4819 e0437b8: 94000034 bl e043888 <psci_cpu_suspend_start> 4820 e0437bc: 17fffff4 b e04378c <psci_cpu_suspend+0x90> 4821 e0437c0: aa1703e2 mov x2, x23 4822 e0437c4: aa1603e1 mov x1, x22 4823 e0437c8: 910123e0 add x0, sp, #0x48 4824 e0437cc: 94000413 bl e044818 <psci_validate_entry_point> 4825 e0437d0: 34fffec0 cbz w0, e0437a8 <psci_cpu_suspend+0xac> 4826 e0437d4: 2a0003f4 mov w20, w0 4827 e0437d8: 17ffffed b e04378c <psci_cpu_suspend+0x90> 4828 e0437dc: 12800034 mov w20, #0xfffffffe // #-2 4829 e0437e0: 17ffffeb b e04378c <psci_cpu_suspend+0x90> 4830 4831000000000e0437e4 <psci_cpu_suspend_finish>: 4832 e0437e4: a9be7bfd stp x29, x30, [sp, #-32]! 4833 e0437e8: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4834 e0437ec: 910003fd mov x29, sp 4835 e0437f0: f945cc00 ldr x0, [x0, #2968] 4836 e0437f4: a90153f3 stp x19, x20, [sp, #16] 4837 e0437f8: aa0103f3 mov x19, x1 4838 e0437fc: f9401c01 ldr x1, [x0, #56] 4839 e043800: aa1303e0 mov x0, x19 4840 e043804: d63f0020 blr x1 4841 e043808: 97fff5cc bl e040f38 <psci_do_pwrup_cache_maintenance> 4842 e04380c: 97fffe90 bl e04324c <plat_get_syscnt_freq2> 4843 e043810: 2a0003e0 mov w0, w0 4844 e043814: d51be000 msr cntfrq_el0, x0 4845 e043818: f0000074 adrp x20, e052000 <opteed_sp_context+0xa00> 4846 e04381c: f945d280 ldr x0, [x20, #2976] 4847 e043820: b4000120 cbz x0, e043844 <psci_cpu_suspend_finish+0x60> 4848 e043824: f9401000 ldr x0, [x0, #32] 4849 e043828: b40000e0 cbz x0, e043844 <psci_cpu_suspend_finish+0x60> 4850 e04382c: aa1303e0 mov x0, x19 4851 e043830: 94000142 bl e043d38 <psci_find_max_off_lvl> 4852 e043834: f945d281 ldr x1, [x20, #2976] 4853 e043838: 2a0003e0 mov w0, w0 4854 e04383c: f9401021 ldr x1, [x1, #32] 4855 e043840: d63f0020 blr x1 4856 e043844: d53ed040 mrs x0, tpidr_el3 4857 e043848: 90000033 adrp x19, e047000 <__TEXT_END__> 4858 e04384c: 90000034 adrp x20, e047000 <__TEXT_END__> 4859 e043850: 91228273 add x19, x19, #0x8a0 4860 e043854: 91228294 add x20, x20, #0x8a0 4861 e043858: 52800041 mov w1, #0x2 // #2 4862 e04385c: b9001c01 str w1, [x0, #28] 4863 e043860: eb14027f cmp x19, x20 4864 e043864: 540000a3 b.cc e043878 <psci_cpu_suspend_finish+0x94> // b.lo, b.ul, b.last 4865 e043868: a94153f3 ldp x19, x20, [sp, #16] 4866 e04386c: 52800020 mov w0, #0x1 // #1 4867 e043870: a8c27bfd ldp x29, x30, [sp], #32 4868 e043874: 17fff7a8 b e041714 <cm_prepare_el3_exit> 4869 e043878: f8408661 ldr x1, [x19], #8 4870 e04387c: d2800000 mov x0, #0x0 // #0 4871 e043880: d63f0020 blr x1 4872 e043884: 17fffff7 b e043860 <psci_cpu_suspend_finish+0x7c> 4873 4874000000000e043888 <psci_cpu_suspend_start>: 4875 e043888: a9b97bfd stp x29, x30, [sp, #-112]! 4876 e04388c: 910003fd mov x29, sp 4877 e043890: a90153f3 stp x19, x20, [sp, #16] 4878 e043894: 2a0103f3 mov w19, w1 4879 e043898: aa0203f4 mov x20, x2 4880 e04389c: a9025bf5 stp x21, x22, [sp, #32] 4881 e0438a0: 2a0303f6 mov w22, w3 4882 e0438a4: a90363f7 stp x23, x24, [sp, #48] 4883 e0438a8: a9046bf9 stp x25, x26, [sp, #64] 4884 e0438ac: aa0003f9 mov x25, x0 4885 e0438b0: 97fff570 bl e040e70 <plat_my_core_pos> 4886 e0438b4: 910183e2 add x2, sp, #0x60 4887 e0438b8: 2a0003f8 mov w24, w0 4888 e0438bc: 2a1303e1 mov w1, w19 4889 e0438c0: b90063ff str wzr, [sp, #96] 4890 e0438c4: 94000131 bl e043d88 <psci_get_parent_pwr_domain_nodes> 4891 e0438c8: 910183e1 add x1, sp, #0x60 4892 e0438cc: 2a1303e0 mov w0, w19 4893 e0438d0: 97fffeac bl e043380 <psci_acquire_pwr_domain_locks> 4894 e0438d4: d538c100 mrs x0, isr_el1 4895 e0438d8: b5000740 cbnz x0, e0439c0 <psci_cpu_suspend_start+0x138> 4896 e0438dc: aa1403e1 mov x1, x20 4897 e0438e0: 2a1303e0 mov w0, w19 4898 e0438e4: 94000096 bl e043b3c <psci_do_state_coordination> 4899 e0438e8: 34000436 cbz w22, e04396c <psci_cpu_suspend_start+0xe4> 4900 e0438ec: aa1403e0 mov x0, x20 4901 e0438f0: 90000035 adrp x21, e047000 <__TEXT_END__> 4902 e0438f4: 9000003a adrp x26, e047000 <__TEXT_END__> 4903 e0438f8: 94000110 bl e043d38 <psci_find_max_off_lvl> 4904 e0438fc: 912282b5 add x21, x21, #0x8a0 4905 e043900: 2a0003f7 mov w23, w0 4906 e043904: 9122835a add x26, x26, #0x8a0 4907 e043908: eb1a02bf cmp x21, x26 4908 e04390c: 54000523 b.cc e0439b0 <psci_cpu_suspend_start+0x128> // b.lo, b.ul, b.last 4909 e043910: d53ed040 mrs x0, tpidr_el3 4910 e043914: b9001c13 str w19, [x0, #28] 4911 e043918: d53ed040 mrs x0, tpidr_el3 4912 e04391c: d2800081 mov x1, #0x4 // #4 4913 e043920: 91007000 add x0, x0, #0x1c 4914 e043924: 97fff4f4 bl e040cf4 <flush_dcache_range> 4915 e043928: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4916 e04392c: f945d000 ldr x0, [x0, #2976] 4917 e043930: b40000a0 cbz x0, e043944 <psci_cpu_suspend_start+0xbc> 4918 e043934: f9400801 ldr x1, [x0, #16] 4919 e043938: b4000061 cbz x1, e043944 <psci_cpu_suspend_start+0xbc> 4920 e04393c: 2a1703e0 mov w0, w23 4921 e043940: d63f0020 blr x1 4922 e043944: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4923 e043948: f945cc00 ldr x0, [x0, #2968] 4924 e04394c: f9400c01 ldr x1, [x0, #24] 4925 e043950: b4000061 cbz x1, e04395c <psci_cpu_suspend_start+0xd4> 4926 e043954: aa1403e0 mov x0, x20 4927 e043958: d63f0020 blr x1 4928 e04395c: aa1903e0 mov x0, x25 4929 e043960: 97fff761 bl e0416e4 <cm_init_my_context> 4930 e043964: 2a1703e0 mov w0, w23 4931 e043968: 94000074 bl e043b38 <psci_do_pwrdown_sequence> 4932 e04396c: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 4933 e043970: 52800015 mov w21, #0x0 // #0 4934 e043974: f945cc00 ldr x0, [x0, #2968] 4935 e043978: f9401001 ldr x1, [x0, #32] 4936 e04397c: aa1403e0 mov x0, x20 4937 e043980: d63f0020 blr x1 4938 e043984: 910183e1 add x1, sp, #0x60 4939 e043988: 2a1303e0 mov w0, w19 4940 e04398c: 940001dc bl e0440fc <psci_release_pwr_domain_locks> 4941 e043990: 35000495 cbnz w21, e043a20 <psci_cpu_suspend_start+0x198> 4942 e043994: f0000075 adrp x21, e052000 <opteed_sp_context+0xa00> 4943 e043998: 340001b6 cbz w22, e0439cc <psci_cpu_suspend_start+0x144> 4944 e04399c: f945cea0 ldr x0, [x21, #2968] 4945 e0439a0: f9402001 ldr x1, [x0, #64] 4946 e0439a4: b4000121 cbz x1, e0439c8 <psci_cpu_suspend_start+0x140> 4947 e0439a8: aa1403e0 mov x0, x20 4948 e0439ac: d63f0020 blr x1 4949 e0439b0: f84086a1 ldr x1, [x21], #8 4950 e0439b4: d2800000 mov x0, #0x0 // #0 4951 e0439b8: d63f0020 blr x1 4952 e0439bc: 17ffffd3 b e043908 <psci_cpu_suspend_start+0x80> 4953 e0439c0: 52800035 mov w21, #0x1 // #1 4954 e0439c4: 17fffff0 b e043984 <psci_cpu_suspend_start+0xfc> 4955 e0439c8: 97fff569 bl e040f6c <psci_power_down_wfi> 4956 e0439cc: d503207f wfi 4957 e0439d0: 9101a3e2 add x2, sp, #0x68 4958 e0439d4: 2a1303e1 mov w1, w19 4959 e0439d8: 2a1803e0 mov w0, w24 4960 e0439dc: b9006bff str wzr, [sp, #104] 4961 e0439e0: 940000ea bl e043d88 <psci_get_parent_pwr_domain_nodes> 4962 e0439e4: 9101a3e1 add x1, sp, #0x68 4963 e0439e8: 2a1303e0 mov w0, w19 4964 e0439ec: 97fffe65 bl e043380 <psci_acquire_pwr_domain_locks> 4965 e0439f0: 910163e1 add x1, sp, #0x58 4966 e0439f4: 2a1303e0 mov w0, w19 4967 e0439f8: 940000f6 bl e043dd0 <psci_get_target_local_pwr_states> 4968 e0439fc: f945cea0 ldr x0, [x21, #2968] 4969 e043a00: f9401c01 ldr x1, [x0, #56] 4970 e043a04: 910163e0 add x0, sp, #0x58 4971 e043a08: d63f0020 blr x1 4972 e043a0c: 2a1303e0 mov w0, w19 4973 e043a10: 940001d1 bl e044154 <psci_set_pwr_domains_to_run> 4974 e043a14: 9101a3e1 add x1, sp, #0x68 4975 e043a18: 2a1303e0 mov w0, w19 4976 e043a1c: 940001b8 bl e0440fc <psci_release_pwr_domain_locks> 4977 e043a20: a94153f3 ldp x19, x20, [sp, #16] 4978 e043a24: a9425bf5 ldp x21, x22, [sp, #32] 4979 e043a28: a94363f7 ldp x23, x24, [sp, #48] 4980 e043a2c: a9446bf9 ldp x25, x26, [sp, #64] 4981 e043a30: a8c77bfd ldp x29, x30, [sp], #112 4982 e043a34: d65f03c0 ret 4983 4984000000000e043a38 <psci_do_cpu_off>: 4985 e043a38: a9bd7bfd stp x29, x30, [sp, #-48]! 4986 e043a3c: 910003fd mov x29, sp 4987 e043a40: a90153f3 stp x19, x20, [sp, #16] 4988 e043a44: 2a0003f4 mov w20, w0 4989 e043a48: 97fff50a bl e040e70 <plat_my_core_pos> 4990 e043a4c: 9100a3e2 add x2, sp, #0x28 4991 e043a50: 52800041 mov w1, #0x2 // #2 4992 e043a54: 390083e1 strb w1, [sp, #32] 4993 e043a58: 390087e1 strb w1, [sp, #33] 4994 e043a5c: 2a1403e1 mov w1, w20 4995 e043a60: b9002bff str wzr, [sp, #40] 4996 e043a64: 940000c9 bl e043d88 <psci_get_parent_pwr_domain_nodes> 4997 e043a68: 2a1403e0 mov w0, w20 4998 e043a6c: 9100a3e1 add x1, sp, #0x28 4999 e043a70: 97fffe44 bl e043380 <psci_acquire_pwr_domain_locks> 5000 e043a74: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5001 e043a78: f945d000 ldr x0, [x0, #2976] 5002 e043a7c: b5000460 cbnz x0, e043b08 <psci_do_cpu_off+0xd0> 5003 e043a80: 910083e1 add x1, sp, #0x20 5004 e043a84: 2a1403e0 mov w0, w20 5005 e043a88: 9400002d bl e043b3c <psci_do_state_coordination> 5006 e043a8c: 52800013 mov w19, #0x0 // #0 5007 e043a90: 910083e0 add x0, sp, #0x20 5008 e043a94: 940000a9 bl e043d38 <psci_find_max_off_lvl> 5009 e043a98: 94000028 bl e043b38 <psci_do_pwrdown_sequence> 5010 e043a9c: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5011 e043aa0: f945cc00 ldr x0, [x0, #2968] 5012 e043aa4: f9400801 ldr x1, [x0, #16] 5013 e043aa8: 910083e0 add x0, sp, #0x20 5014 e043aac: d63f0020 blr x1 5015 e043ab0: 9100a3e1 add x1, sp, #0x28 5016 e043ab4: 2a1403e0 mov w0, w20 5017 e043ab8: 94000191 bl e0440fc <psci_release_pwr_domain_locks> 5018 e043abc: 35000373 cbnz w19, e043b28 <psci_do_cpu_off+0xf0> 5019 e043ac0: d53ed040 mrs x0, tpidr_el3 5020 e043ac4: d2800081 mov x1, #0x4 // #4 5021 e043ac8: 91006000 add x0, x0, #0x18 5022 e043acc: 97fff48a bl e040cf4 <flush_dcache_range> 5023 e043ad0: d53ed040 mrs x0, tpidr_el3 5024 e043ad4: 52800021 mov w1, #0x1 // #1 5025 e043ad8: b9001801 str w1, [x0, #24] 5026 e043adc: d5033b9f dsb ish 5027 e043ae0: d53ed040 mrs x0, tpidr_el3 5028 e043ae4: d2800081 mov x1, #0x4 // #4 5029 e043ae8: 91006000 add x0, x0, #0x18 5030 e043aec: 97fff4ad bl e040da0 <inv_dcache_range> 5031 e043af0: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5032 e043af4: f945cc00 ldr x0, [x0, #2968] 5033 e043af8: f9402001 ldr x1, [x0, #64] 5034 e043afc: b4000141 cbz x1, e043b24 <psci_do_cpu_off+0xec> 5035 e043b00: 910083e0 add x0, sp, #0x20 5036 e043b04: d63f0020 blr x1 5037 e043b08: f9400401 ldr x1, [x0, #8] 5038 e043b0c: b4fffba1 cbz x1, e043a80 <psci_do_cpu_off+0x48> 5039 e043b10: d2800000 mov x0, #0x0 // #0 5040 e043b14: d63f0020 blr x1 5041 e043b18: 2a0003f3 mov w19, w0 5042 e043b1c: 34fffb20 cbz w0, e043a80 <psci_do_cpu_off+0x48> 5043 e043b20: 17ffffe4 b e043ab0 <psci_do_cpu_off+0x78> 5044 e043b24: 97fff512 bl e040f6c <psci_power_down_wfi> 5045 e043b28: 2a1303e0 mov w0, w19 5046 e043b2c: a94153f3 ldp x19, x20, [sp, #16] 5047 e043b30: a8c37bfd ldp x29, x30, [sp], #48 5048 e043b34: d65f03c0 ret 5049 5050000000000e043b38 <psci_do_pwrdown_sequence>: 5051 e043b38: 17fff4f1 b e040efc <psci_do_pwrdown_cache_maintenance> 5052 5053000000000e043b3c <psci_do_state_coordination>: 5054 e043b3c: a9ba7bfd stp x29, x30, [sp, #-96]! 5055 e043b40: 910003fd mov x29, sp 5056 e043b44: a90153f3 stp x19, x20, [sp, #16] 5057 e043b48: aa0103f4 mov x20, x1 5058 e043b4c: a9025bf5 stp x21, x22, [sp, #32] 5059 e043b50: 2a0003f5 mov w21, w0 5060 e043b54: a90363f7 stp x23, x24, [sp, #48] 5061 e043b58: 52800038 mov w24, #0x1 // #1 5062 e043b5c: a9046bf9 stp x25, x26, [sp, #64] 5063 e043b60: f000007a adrp x26, e052000 <opteed_sp_context+0xa00> 5064 e043b64: 913b435a add x26, x26, #0xed0 5065 e043b68: a90573fb stp x27, x28, [sp, #80] 5066 e043b6c: 97fff4c1 bl e040e70 <plat_my_core_pos> 5067 e043b70: 2a0003fc mov w28, w0 5068 e043b74: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5069 e043b78: 912c6016 add x22, x0, #0xb18 5070 e043b7c: d37c7f80 ubfiz x0, x28, #4, #32 5071 e043b80: d00000bb adrp x27, e059000 <psci_locks> 5072 e043b84: 8b0002c0 add x0, x22, x0 5073 e043b88: aa1c03f9 mov x25, x28 5074 e043b8c: 9100837b add x27, x27, #0x20 5075 e043b90: b9400813 ldr w19, [x0, #8] 5076 e043b94: 6b15031f cmp w24, w21 5077 e043b98: 11000717 add w23, w24, #0x1 5078 e043b9c: 54000388 b.hi e043c0c <psci_do_state_coordination+0xd0> // b.pmore 5079 e043ba0: 7100071f cmp w24, #0x1 5080 e043ba4: 2a1303f3 mov w19, w19 5081 e043ba8: 54000221 b.ne e043bec <psci_do_state_coordination+0xb0> // b.any 5082 e043bac: b9400340 ldr w0, [x26] 5083 e043bb0: 6b00033f cmp w25, w0 5084 e043bb4: 540000a2 b.cs e043bc8 <psci_do_state_coordination+0x8c> // b.hs, b.nlast 5085 e043bb8: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5086 e043bbc: 913d7000 add x0, x0, #0xf5c 5087 e043bc0: 39400681 ldrb w1, [x20, #1] 5088 e043bc4: 383c6801 strb w1, [x0, x28] 5089 e043bc8: d37cee60 lsl x0, x19, #4 5090 e043bcc: b9400341 ldr w1, [x26] 5091 e043bd0: f0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 5092 e043bd4: 913d7042 add x2, x2, #0xf5c 5093 e043bd8: b8606b60 ldr w0, [x27, x0] 5094 e043bdc: 6b01001f cmp w0, w1 5095 e043be0: 8b204042 add x2, x2, w0, uxtw 5096 e043be4: 9a9f3041 csel x1, x2, xzr, cc // cc = lo, ul, last 5097 e043be8: 14000002 b e043bf0 <psci_do_state_coordination+0xb4> 5098 e043bec: d2800001 mov x1, #0x0 // #0 5099 e043bf0: 8b131373 add x19, x27, x19, lsl #4 5100 e043bf4: 2a1803e0 mov w0, w24 5101 e043bf8: b9400662 ldr w2, [x19, #4] 5102 e043bfc: 97fffd97 bl e043258 <plat_get_target_pwr_state> 5103 e043c00: 38384a80 strb w0, [x20, w24, uxtw] 5104 e043c04: 72001c1f tst w0, #0xff 5105 e043c08: 54000401 b.ne e043c88 <psci_do_state_coordination+0x14c> // b.any 5106 e043c0c: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5107 e043c10: 2a1703e1 mov w1, w23 5108 e043c14: b94ed002 ldr w2, [x0, #3792] 5109 e043c18: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5110 e043c1c: 913d7000 add x0, x0, #0xf5c 5111 e043c20: 6b15003f cmp w1, w21 5112 e043c24: 54000389 b.ls e043c94 <psci_do_state_coordination+0x158> // b.plast 5113 e043c28: 39400281 ldrb w1, [x20] 5114 e043c2c: d53ed040 mrs x0, tpidr_el3 5115 e043c30: 39008001 strb w1, [x0, #32] 5116 e043c34: d53ed040 mrs x0, tpidr_el3 5117 e043c38: 91008000 add x0, x0, #0x20 5118 e043c3c: d2800021 mov x1, #0x1 // #1 5119 e043c40: 97fff42d bl e040cf4 <flush_dcache_range> 5120 e043c44: 97fff48b bl e040e70 <plat_my_core_pos> 5121 e043c48: d37c7c00 ubfiz x0, x0, #4, #32 5122 e043c4c: 8b0002c0 add x0, x22, x0 5123 e043c50: d00000a2 adrp x2, e059000 <psci_locks> 5124 e043c54: 91008042 add x2, x2, #0x20 5125 e043c58: b9400801 ldr w1, [x0, #8] 5126 e043c5c: d2800000 mov x0, #0x0 // #0 5127 e043c60: 91000400 add x0, x0, #0x1 5128 e043c64: 6b0002bf cmp w21, w0 5129 e043c68: 54000282 b.cs e043cb8 <psci_do_state_coordination+0x17c> // b.hs, b.nlast 5130 e043c6c: a94153f3 ldp x19, x20, [sp, #16] 5131 e043c70: a9425bf5 ldp x21, x22, [sp, #32] 5132 e043c74: a94363f7 ldp x23, x24, [sp, #48] 5133 e043c78: a9446bf9 ldp x25, x26, [sp, #64] 5134 e043c7c: a94573fb ldp x27, x28, [sp, #80] 5135 e043c80: a8c67bfd ldp x29, x30, [sp], #96 5136 e043c84: d65f03c0 ret 5137 e043c88: b9400a73 ldr w19, [x19, #8] 5138 e043c8c: 2a1703f8 mov w24, w23 5139 e043c90: 17ffffc1 b e043b94 <psci_do_state_coordination+0x58> 5140 e043c94: 7100043f cmp w1, #0x1 5141 e043c98: 540000a1 b.ne e043cac <psci_do_state_coordination+0x170> // b.any 5142 e043c9c: 6b02033f cmp w25, w2 5143 e043ca0: 54000062 b.cs e043cac <psci_do_state_coordination+0x170> // b.hs, b.nlast 5144 e043ca4: 39400683 ldrb w3, [x20, #1] 5145 e043ca8: 383c6803 strb w3, [x0, x28] 5146 e043cac: 38214a9f strb wzr, [x20, w1, uxtw] 5147 e043cb0: 11000421 add w1, w1, #0x1 5148 e043cb4: 17ffffdb b e043c20 <psci_do_state_coordination+0xe4> 5149 e043cb8: d37c7c21 ubfiz x1, x1, #4, #32 5150 e043cbc: 38606a83 ldrb w3, [x20, x0] 5151 e043cc0: 8b010041 add x1, x2, x1 5152 e043cc4: 39003023 strb w3, [x1, #12] 5153 e043cc8: b9400821 ldr w1, [x1, #8] 5154 e043ccc: 17ffffe5 b e043c60 <psci_do_state_coordination+0x124> 5155 5156000000000e043cd0 <psci_features>: 5157 e043cd0: f0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5158 e043cd4: 52b00002 mov w2, #0x80000000 // #-2147483648 5159 e043cd8: b94ed421 ldr w1, [x1, #3796] 5160 e043cdc: 6b02001f cmp w0, w2 5161 e043ce0: 54000240 b.eq e043d28 <psci_features+0x58> // b.none 5162 e043ce4: 36f00080 tbz w0, #30, e043cf4 <psci_features+0x24> 5163 e043ce8: 528c1742 mov w2, #0x60ba // #24762 5164 e043cec: 72a002e2 movk w2, #0x17, lsl #16 5165 e043cf0: 0a020021 and w1, w1, w2 5166 e043cf4: d3587402 ubfx x2, x0, #24, #6 5167 e043cf8: 7100105f cmp w2, #0x4 5168 e043cfc: 540001a1 b.ne e043d30 <psci_features+0x60> // b.any 5169 e043d00: d3505c04 ubfx x4, x0, #16, #8 5170 e043d04: 531f7c02 lsr w2, w0, #31 5171 e043d08: 36f80140 tbz w0, #31, e043d30 <psci_features+0x60> 5172 e043d0c: 121b2803 and w3, w0, #0xffe0 5173 e043d10: 2a040063 orr w3, w3, w4 5174 e043d14: 350000e3 cbnz w3, e043d30 <psci_features+0x60> 5175 e043d18: 1ac02040 lsl w0, w2, w0 5176 e043d1c: 6a01001f tst w0, w1 5177 e043d20: 5a9f13e0 csetm w0, eq // eq = none 5178 e043d24: d65f03c0 ret 5179 e043d28: 52800000 mov w0, #0x0 // #0 5180 e043d2c: 17fffffe b e043d24 <psci_features+0x54> 5181 e043d30: 12800000 mov w0, #0xffffffff // #-1 5182 e043d34: 17fffffc b e043d24 <psci_features+0x54> 5183 5184000000000e043d38 <psci_find_max_off_lvl>: 5185 e043d38: 39400401 ldrb w1, [x0, #1] 5186 e043d3c: 7100083f cmp w1, #0x2 5187 e043d40: 540000e0 b.eq e043d5c <psci_find_max_off_lvl+0x24> // b.none 5188 e043d44: 39400001 ldrb w1, [x0] 5189 e043d48: 52800040 mov w0, #0x2 // #2 5190 e043d4c: 6b00003f cmp w1, w0 5191 e043d50: 54000041 b.ne e043d58 <psci_find_max_off_lvl+0x20> // b.any 5192 e043d54: 52800000 mov w0, #0x0 // #0 5193 e043d58: d65f03c0 ret 5194 e043d5c: 52800020 mov w0, #0x1 // #1 5195 e043d60: 17fffffe b e043d58 <psci_find_max_off_lvl+0x20> 5196 5197000000000e043d64 <psci_find_target_suspend_lvl>: 5198 e043d64: 39400401 ldrb w1, [x0, #1] 5199 e043d68: 350000c1 cbnz w1, e043d80 <psci_find_target_suspend_lvl+0x1c> 5200 e043d6c: 39400001 ldrb w1, [x0] 5201 e043d70: 52800040 mov w0, #0x2 // #2 5202 e043d74: 34000041 cbz w1, e043d7c <psci_find_target_suspend_lvl+0x18> 5203 e043d78: 52800000 mov w0, #0x0 // #0 5204 e043d7c: d65f03c0 ret 5205 e043d80: 52800020 mov w0, #0x1 // #1 5206 e043d84: 17fffffe b e043d7c <psci_find_target_suspend_lvl+0x18> 5207 5208000000000e043d88 <psci_get_parent_pwr_domain_nodes>: 5209 e043d88: d37c7c03 ubfiz x3, x0, #4, #32 5210 e043d8c: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5211 e043d90: 912c6000 add x0, x0, #0xb18 5212 e043d94: d00000a4 adrp x4, e059000 <psci_locks> 5213 e043d98: 8b030000 add x0, x0, x3 5214 e043d9c: d1001042 sub x2, x2, #0x4 5215 e043da0: 91008084 add x4, x4, #0x20 5216 e043da4: d2800003 mov x3, #0x0 // #0 5217 e043da8: b9400800 ldr w0, [x0, #8] 5218 e043dac: 91000463 add x3, x3, #0x1 5219 e043db0: 6b03003f cmp w1, w3 5220 e043db4: 54000042 b.cs e043dbc <psci_get_parent_pwr_domain_nodes+0x34> // b.hs, b.nlast 5221 e043db8: d65f03c0 ret 5222 e043dbc: b8237840 str w0, [x2, x3, lsl #2] 5223 e043dc0: d37c7c00 ubfiz x0, x0, #4, #32 5224 e043dc4: 8b000080 add x0, x4, x0 5225 e043dc8: b9400800 ldr w0, [x0, #8] 5226 e043dcc: 17fffff8 b e043dac <psci_get_parent_pwr_domain_nodes+0x24> 5227 5228000000000e043dd0 <psci_get_target_local_pwr_states>: 5229 e043dd0: a9be7bfd stp x29, x30, [sp, #-32]! 5230 e043dd4: 910003fd mov x29, sp 5231 e043dd8: a90153f3 stp x19, x20, [sp, #16] 5232 e043ddc: 2a0003f4 mov w20, w0 5233 e043de0: aa0103f3 mov x19, x1 5234 e043de4: d53ed040 mrs x0, tpidr_el3 5235 e043de8: 39408000 ldrb w0, [x0, #32] 5236 e043dec: 39000020 strb w0, [x1] 5237 e043df0: 97fff420 bl e040e70 <plat_my_core_pos> 5238 e043df4: d37c7c00 ubfiz x0, x0, #4, #32 5239 e043df8: f0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5240 e043dfc: 912c6021 add x1, x1, #0xb18 5241 e043e00: 8b000021 add x1, x1, x0 5242 e043e04: d00000a0 adrp x0, e059000 <psci_locks> 5243 e043e08: 91008000 add x0, x0, #0x20 5244 e043e0c: 52800023 mov w3, #0x1 // #1 5245 e043e10: b9400822 ldr w2, [x1, #8] 5246 e043e14: 6b14007f cmp w3, w20 5247 e043e18: 540000e9 b.ls e043e34 <psci_get_target_local_pwr_states+0x64> // b.plast 5248 e043e1c: 7100047f cmp w3, #0x1 5249 e043e20: 54000048 b.hi e043e28 <psci_get_target_local_pwr_states+0x58> // b.pmore 5250 e043e24: 38234a7f strb wzr, [x19, w3, uxtw] 5251 e043e28: a94153f3 ldp x19, x20, [sp, #16] 5252 e043e2c: a8c27bfd ldp x29, x30, [sp], #32 5253 e043e30: d65f03c0 ret 5254 e043e34: d37c7c42 ubfiz x2, x2, #4, #32 5255 e043e38: 8b020002 add x2, x0, x2 5256 e043e3c: 39403041 ldrb w1, [x2, #12] 5257 e043e40: 38234a61 strb w1, [x19, w3, uxtw] 5258 e043e44: 11000463 add w3, w3, #0x1 5259 e043e48: b9400842 ldr w2, [x2, #8] 5260 e043e4c: 17fffff2 b e043e14 <psci_get_target_local_pwr_states+0x44> 5261 5262000000000e043e50 <psci_init_req_local_pwr_states>: 5263 e043e50: f0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5264 e043e54: f0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5265 e043e58: 913d7021 add x1, x1, #0xf5c 5266 e043e5c: 52800043 mov w3, #0x2 // #2 5267 e043e60: b94ed002 ldr w2, [x0, #3792] 5268 e043e64: d2800000 mov x0, #0x0 // #0 5269 e043e68: 6b00005f cmp w2, w0 5270 e043e6c: 54000048 b.hi e043e74 <psci_init_req_local_pwr_states+0x24> // b.pmore 5271 e043e70: d65f03c0 ret 5272 e043e74: 38216803 strb w3, [x0, x1] 5273 e043e78: 91000400 add x0, x0, #0x1 5274 e043e7c: 17fffffb b e043e68 <psci_init_req_local_pwr_states+0x18> 5275 5276000000000e043e80 <psci_is_last_on_cpu>: 5277 e043e80: a9bd7bfd stp x29, x30, [sp, #-48]! 5278 e043e84: 910003fd mov x29, sp 5279 e043e88: a90153f3 stp x19, x20, [sp, #16] 5280 e043e8c: f0000074 adrp x20, e052000 <opteed_sp_context+0xa00> 5281 e043e90: 913b4294 add x20, x20, #0xed0 5282 e043e94: f90013f5 str x21, [sp, #32] 5283 e043e98: 97fff3f6 bl e040e70 <plat_my_core_pos> 5284 e043e9c: 2a0003f5 mov w21, w0 5285 e043ea0: 52800013 mov w19, #0x0 // #0 5286 e043ea4: b9400280 ldr w0, [x20] 5287 e043ea8: 6b13001f cmp w0, w19 5288 e043eac: 540000c8 b.hi e043ec4 <psci_is_last_on_cpu+0x44> // b.pmore 5289 e043eb0: 52800020 mov w0, #0x1 // #1 5290 e043eb4: a94153f3 ldp x19, x20, [sp, #16] 5291 e043eb8: f94013f5 ldr x21, [sp, #32] 5292 e043ebc: a8c37bfd ldp x29, x30, [sp], #48 5293 e043ec0: d65f03c0 ret 5294 e043ec4: 6b15027f cmp w19, w21 5295 e043ec8: 54000061 b.ne e043ed4 <psci_is_last_on_cpu+0x54> // b.any 5296 e043ecc: 11000673 add w19, w19, #0x1 5297 e043ed0: 17fffff5 b e043ea4 <psci_is_last_on_cpu+0x24> 5298 e043ed4: 2a1303e0 mov w0, w19 5299 e043ed8: 97fff10d bl e04030c <_cpu_data_by_index> 5300 e043edc: b9401800 ldr w0, [x0, #24] 5301 e043ee0: 7100041f cmp w0, #0x1 5302 e043ee4: 54ffff40 b.eq e043ecc <psci_is_last_on_cpu+0x4c> // b.none 5303 e043ee8: 52800000 mov w0, #0x0 // #0 5304 e043eec: 17fffff2 b e043eb4 <psci_is_last_on_cpu+0x34> 5305 5306000000000e043ef0 <psci_mem_chk_range>: 5307 e043ef0: b50000c1 cbnz x1, e043f08 <psci_mem_chk_range+0x18> 5308 e043ef4: 92800040 mov x0, #0xfffffffffffffffd // #-3 5309 e043ef8: d65f03c0 ret 5310 e043efc: 92800040 mov x0, #0xfffffffffffffffd // #-3 5311 e043f00: a8c17bfd ldp x29, x30, [sp], #16 5312 e043f04: d65f03c0 ret 5313 e043f08: cb0103e2 neg x2, x1 5314 e043f0c: eb00005f cmp x2, x0 5315 e043f10: 54ffff23 b.cc e043ef4 <psci_mem_chk_range+0x4> // b.lo, b.ul, b.last 5316 e043f14: a9bf7bfd stp x29, x30, [sp, #-16]! 5317 e043f18: f0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 5318 e043f1c: 910003fd mov x29, sp 5319 e043f20: f945cc42 ldr x2, [x2, #2968] 5320 e043f24: f9404442 ldr x2, [x2, #136] 5321 e043f28: d63f0040 blr x2 5322 e043f2c: 37fffe80 tbnz w0, #31, e043efc <psci_mem_chk_range+0xc> 5323 e043f30: d2800000 mov x0, #0x0 // #0 5324 e043f34: 17fffff3 b e043f00 <psci_mem_chk_range+0x10> 5325 5326000000000e043f38 <psci_mem_protect>: 5327 e043f38: a9bd7bfd stp x29, x30, [sp, #-48]! 5328 e043f3c: 910003fd mov x29, sp 5329 e043f40: a90153f3 stp x19, x20, [sp, #16] 5330 e043f44: f0000074 adrp x20, e052000 <opteed_sp_context+0xa00> 5331 e043f48: 2a0003f3 mov w19, w0 5332 e043f4c: f945ce80 ldr x0, [x20, #2968] 5333 e043f50: f9404801 ldr x1, [x0, #144] 5334 e043f54: 9100b3e0 add x0, sp, #0x2c 5335 e043f58: d63f0020 blr x1 5336 e043f5c: 36f800a0 tbz w0, #31, e043f70 <psci_mem_protect+0x38> 5337 e043f60: 92800000 mov x0, #0xffffffffffffffff // #-1 5338 e043f64: a94153f3 ldp x19, x20, [sp, #16] 5339 e043f68: a8c37bfd ldp x29, x30, [sp], #48 5340 e043f6c: d65f03c0 ret 5341 e043f70: f945ce80 ldr x0, [x20, #2968] 5342 e043f74: f9404c01 ldr x1, [x0, #152] 5343 e043f78: 2a1303e0 mov w0, w19 5344 e043f7c: d63f0020 blr x1 5345 e043f80: 37ffff00 tbnz w0, #31, e043f60 <psci_mem_protect+0x28> 5346 e043f84: b9402fe0 ldr w0, [sp, #44] 5347 e043f88: 7100001f cmp w0, #0x0 5348 e043f8c: 9a9f07e0 cset x0, ne // ne = any 5349 e043f90: 17fffff5 b e043f64 <psci_mem_protect+0x2c> 5350 5351000000000e043f94 <psci_migrate>: 5352 e043f94: a9bd7bfd stp x29, x30, [sp, #-48]! 5353 e043f98: 910003fd mov x29, sp 5354 e043f9c: f9000bf3 str x19, [sp, #16] 5355 e043fa0: aa0003f3 mov x19, x0 5356 e043fa4: 9100a3e0 add x0, sp, #0x28 5357 e043fa8: 940001b1 bl e04466c <psci_spd_migrate_info> 5358 e043fac: 340000e0 cbz w0, e043fc8 <psci_migrate+0x34> 5359 e043fb0: 7100041f cmp w0, #0x1 5360 e043fb4: 12800040 mov w0, #0xfffffffd // #-3 5361 e043fb8: 5a9f0000 csinv w0, w0, wzr, eq // eq = none 5362 e043fbc: f9400bf3 ldr x19, [sp, #16] 5363 e043fc0: a8c37bfd ldp x29, x30, [sp], #48 5364 e043fc4: d65f03c0 ret 5365 e043fc8: d53800a0 mrs x0, mpidr_el1 5366 e043fcc: f94017e1 ldr x1, [sp, #40] 5367 e043fd0: eb00003f cmp x1, x0 5368 e043fd4: 54000161 b.ne e044000 <psci_migrate+0x6c> // b.any 5369 e043fd8: aa1303e0 mov x0, x19 5370 e043fdc: 9400024c bl e04490c <psci_validate_mpidr> 5371 e043fe0: 35000140 cbnz w0, e044008 <psci_migrate+0x74> 5372 e043fe4: d53800a0 mrs x0, mpidr_el1 5373 e043fe8: f0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5374 e043fec: f945d021 ldr x1, [x1, #2976] 5375 e043ff0: f9401422 ldr x2, [x1, #40] 5376 e043ff4: aa1303e1 mov x1, x19 5377 e043ff8: d63f0040 blr x2 5378 e043ffc: 17fffff0 b e043fbc <psci_migrate+0x28> 5379 e044000: 128000c0 mov w0, #0xfffffff9 // #-7 5380 e044004: 17ffffee b e043fbc <psci_migrate+0x28> 5381 e044008: 12800020 mov w0, #0xfffffffe // #-2 5382 e04400c: 17ffffec b e043fbc <psci_migrate+0x28> 5383 5384000000000e044010 <psci_migrate_info_type>: 5385 e044010: a9be7bfd stp x29, x30, [sp, #-32]! 5386 e044014: 910003fd mov x29, sp 5387 e044018: 910063e0 add x0, sp, #0x18 5388 e04401c: 94000194 bl e04466c <psci_spd_migrate_info> 5389 e044020: a8c27bfd ldp x29, x30, [sp], #32 5390 e044024: d65f03c0 ret 5391 5392000000000e044028 <psci_migrate_info_up_cpu>: 5393 e044028: a9be7bfd stp x29, x30, [sp, #-32]! 5394 e04402c: 910003fd mov x29, sp 5395 e044030: 910063e0 add x0, sp, #0x18 5396 e044034: 9400018e bl e04466c <psci_spd_migrate_info> 5397 e044038: f9400fe1 ldr x1, [sp, #24] 5398 e04403c: 7100041f cmp w0, #0x1 5399 e044040: a8c27bfd ldp x29, x30, [sp], #32 5400 e044044: 92800020 mov x0, #0xfffffffffffffffe // #-2 5401 e044048: 9a809020 csel x0, x1, x0, ls // ls = plast 5402 e04404c: d65f03c0 ret 5403 5404000000000e044050 <psci_node_hw_state>: 5405 e044050: a9be7bfd stp x29, x30, [sp, #-32]! 5406 e044054: 910003fd mov x29, sp 5407 e044058: a90153f3 stp x19, x20, [sp, #16] 5408 e04405c: aa0003f4 mov x20, x0 5409 e044060: 2a0103f3 mov w19, w1 5410 e044064: 9400022a bl e04490c <psci_validate_mpidr> 5411 e044068: 35000180 cbnz w0, e044098 <psci_node_hw_state+0x48> 5412 e04406c: 7100067f cmp w19, #0x1 5413 e044070: 54000148 b.hi e044098 <psci_node_hw_state+0x48> // b.pmore 5414 e044074: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5415 e044078: 2a1303e1 mov w1, w19 5416 e04407c: f945cc00 ldr x0, [x0, #2968] 5417 e044080: f9404002 ldr x2, [x0, #128] 5418 e044084: aa1403e0 mov x0, x20 5419 e044088: a94153f3 ldp x19, x20, [sp, #16] 5420 e04408c: aa0203f0 mov x16, x2 5421 e044090: a8c27bfd ldp x29, x30, [sp], #32 5422 e044094: d61f0200 br x16 5423 e044098: 12800020 mov w0, #0xfffffffe // #-2 5424 e04409c: a94153f3 ldp x19, x20, [sp, #16] 5425 e0440a0: a8c27bfd ldp x29, x30, [sp], #32 5426 e0440a4: d65f03c0 ret 5427 5428000000000e0440a8 <psci_print_power_domain_map>: 5429 e0440a8: d65f03c0 ret 5430 5431000000000e0440ac <psci_query_sys_suspend_pwrstate>: 5432 e0440ac: d0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5433 e0440b0: f945cc21 ldr x1, [x1, #2968] 5434 e0440b4: f9403421 ldr x1, [x1, #104] 5435 e0440b8: aa0103f0 mov x16, x1 5436 e0440bc: d61f0200 br x16 5437 5438000000000e0440c0 <psci_register_spd_pm_hook>: 5439 e0440c0: d0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5440 e0440c4: f905d020 str x0, [x1, #2976] 5441 e0440c8: f9401401 ldr x1, [x0, #40] 5442 e0440cc: b40000a1 cbz x1, e0440e0 <psci_register_spd_pm_hook+0x20> 5443 e0440d0: d0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 5444 e0440d4: b94ed441 ldr w1, [x2, #3796] 5445 e0440d8: 321b0021 orr w1, w1, #0x20 5446 e0440dc: b90ed441 str w1, [x2, #3796] 5447 e0440e0: f9401800 ldr x0, [x0, #48] 5448 e0440e4: b40000a0 cbz x0, e0440f8 <psci_register_spd_pm_hook+0x38> 5449 e0440e8: d0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5450 e0440ec: b94ed420 ldr w0, [x1, #3796] 5451 e0440f0: 321a0400 orr w0, w0, #0xc0 5452 e0440f4: b90ed420 str w0, [x1, #3796] 5453 e0440f8: d65f03c0 ret 5454 5455000000000e0440fc <psci_release_pwr_domain_locks>: 5456 e0440fc: a9bd7bfd stp x29, x30, [sp, #-48]! 5457 e044100: 910003fd mov x29, sp 5458 e044104: a90153f3 stp x19, x20, [sp, #16] 5459 e044108: 2a0003f3 mov w19, w0 5460 e04410c: aa0103f4 mov x20, x1 5461 e044110: a9025bf5 stp x21, x22, [sp, #32] 5462 e044114: b00000b5 adrp x21, e059000 <psci_locks> 5463 e044118: b00000b6 adrp x22, e059000 <psci_locks> 5464 e04411c: 910002b5 add x21, x21, #0x0 5465 e044120: 910082d6 add x22, x22, #0x20 5466 e044124: 350000b3 cbnz w19, e044138 <psci_release_pwr_domain_locks+0x3c> 5467 e044128: a94153f3 ldp x19, x20, [sp, #16] 5468 e04412c: a9425bf5 ldp x21, x22, [sp, #32] 5469 e044130: a8c37bfd ldp x29, x30, [sp], #48 5470 e044134: d65f03c0 ret 5471 e044138: 51000673 sub w19, w19, #0x1 5472 e04413c: b8735a80 ldr w0, [x20, w19, uxtw #2] 5473 e044140: 8b0012c0 add x0, x22, x0, lsl #4 5474 e044144: 79401c00 ldrh w0, [x0, #14] 5475 e044148: 8b0012a0 add x0, x21, x0, lsl #4 5476 e04414c: 97fff476 bl e041324 <bakery_lock_release> 5477 e044150: 17fffff5 b e044124 <psci_release_pwr_domain_locks+0x28> 5478 5479000000000e044154 <psci_set_pwr_domains_to_run>: 5480 e044154: a9be7bfd stp x29, x30, [sp, #-32]! 5481 e044158: 910003fd mov x29, sp 5482 e04415c: f9000bf3 str x19, [sp, #16] 5483 e044160: 2a0003f3 mov w19, w0 5484 e044164: 97fff343 bl e040e70 <plat_my_core_pos> 5485 e044168: d37c7c02 ubfiz x2, x0, #4, #32 5486 e04416c: d0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5487 e044170: 912c6021 add x1, x1, #0xb18 5488 e044174: 8b020021 add x1, x1, x2 5489 e044178: d0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 5490 e04417c: b00000a3 adrp x3, e059000 <psci_locks> 5491 e044180: d0000064 adrp x4, e052000 <opteed_sp_context+0xa00> 5492 e044184: 2a0003e7 mov w7, w0 5493 e044188: 91008063 add x3, x3, #0x20 5494 e04418c: b9400821 ldr w1, [x1, #8] 5495 e044190: 913d7084 add x4, x4, #0xf5c 5496 e044194: b94ed046 ldr w6, [x2, #3792] 5497 e044198: 52800022 mov w2, #0x1 // #1 5498 e04419c: 6b13005f cmp w2, w19 5499 e0441a0: 54000169 b.ls e0441cc <psci_set_pwr_domains_to_run+0x78> // b.plast 5500 e0441a4: d53ed040 mrs x0, tpidr_el3 5501 e0441a8: b900181f str wzr, [x0, #24] 5502 e0441ac: d53ed040 mrs x0, tpidr_el3 5503 e0441b0: 3900801f strb wzr, [x0, #32] 5504 e0441b4: d53ed040 mrs x0, tpidr_el3 5505 e0441b8: f9400bf3 ldr x19, [sp, #16] 5506 e0441bc: 91006000 add x0, x0, #0x18 5507 e0441c0: a8c27bfd ldp x29, x30, [sp], #32 5508 e0441c4: d2800181 mov x1, #0xc // #12 5509 e0441c8: 17fff2cb b e040cf4 <flush_dcache_range> 5510 e0441cc: 2a0103e5 mov w5, w1 5511 e0441d0: d37c7c21 ubfiz x1, x1, #4, #32 5512 e0441d4: 8b010061 add x1, x3, x1 5513 e0441d8: 3900303f strb wzr, [x1, #12] 5514 e0441dc: 7100045f cmp w2, #0x1 5515 e0441e0: 54000081 b.ne e0441f0 <psci_set_pwr_domains_to_run+0x9c> // b.any 5516 e0441e4: 6b06001f cmp w0, w6 5517 e0441e8: 54000042 b.cs e0441f0 <psci_set_pwr_domains_to_run+0x9c> // b.hs, b.nlast 5518 e0441ec: 3827689f strb wzr, [x4, x7] 5519 e0441f0: 8b051061 add x1, x3, x5, lsl #4 5520 e0441f4: 11000442 add w2, w2, #0x1 5521 e0441f8: b9400821 ldr w1, [x1, #8] 5522 e0441fc: 17ffffe8 b e04419c <psci_set_pwr_domains_to_run+0x48> 5523 5524000000000e044200 <psci_setup>: 5525 e044200: a9b87bfd stp x29, x30, [sp, #-128]! 5526 e044204: 910003fd mov x29, sp 5527 e044208: a90153f3 stp x19, x20, [sp, #16] 5528 e04420c: 52800013 mov w19, #0x0 // #0 5529 e044210: a9025bf5 stp x21, x22, [sp, #32] 5530 e044214: aa0003f5 mov x21, x0 5531 e044218: 90000076 adrp x22, e050000 <__STACKS_START__+0x7f80> 5532 e04421c: a90363f7 stp x23, x24, [sp, #48] 5533 e044220: 910a02d6 add x22, x22, #0x280 5534 e044224: 52800037 mov w23, #0x1 // #1 5535 e044228: a9046bf9 stp x25, x26, [sp, #64] 5536 e04422c: d000007a adrp x26, e052000 <opteed_sp_context+0xa00> 5537 e044230: 912c635a add x26, x26, #0xb18 5538 e044234: a90573fb stp x27, x28, [sp, #80] 5539 e044238: 97fffc83 bl e043444 <psci_arch_setup> 5540 e04423c: 97fffbfd bl e043230 <plat_get_power_domain_tree_desc> 5541 e044240: 2a1703e3 mov w3, w23 5542 e044244: aa0003fb mov x27, x0 5543 e044248: 5280005c mov w28, #0x2 // #2 5544 e04424c: 52800019 mov w25, #0x0 // #0 5545 e044250: 2a1903f8 mov w24, w25 5546 e044254: 52800000 mov w0, #0x0 // #0 5547 e044258: 0b170339 add w25, w25, w23 5548 e04425c: 52800017 mov w23, #0x0 // #0 5549 e044260: 14000009 b e044284 <psci_setup+0x84> 5550 e044264: 38784b64 ldrb w4, [x27, w24, uxtw] 5551 e044268: 2a0003f3 mov w19, w0 5552 e04426c: 0b000085 add w5, w4, w0 5553 e044270: 6b05027f cmp w19, w5 5554 e044274: 54000d43 b.cc e04441c <psci_setup+0x21c> // b.lo, b.ul, b.last 5555 e044278: 0b0402f7 add w23, w23, w4 5556 e04427c: 11000718 add w24, w24, #0x1 5557 e044280: 2a1303e0 mov w0, w19 5558 e044284: 6b19031f cmp w24, w25 5559 e044288: 54fffee1 b.ne e044264 <psci_setup+0x64> // b.any 5560 e04428c: 52800003 mov w3, #0x0 // #0 5561 e044290: 7100079f cmp w28, #0x1 5562 e044294: 54001181 b.ne e0444c4 <psci_setup+0x2c4> // b.any 5563 e044298: d0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5564 e04429c: b00000b6 adrp x22, e059000 <psci_locks> 5565 e0442a0: 913b4034 add x20, x1, #0xed0 5566 e0442a4: 910082d6 add x22, x22, #0x20 5567 e0442a8: b90ed033 str w19, [x1, #3792] 5568 e0442ac: 52800017 mov w23, #0x0 // #0 5569 e0442b0: 52800013 mov w19, #0x0 // #0 5570 e0442b4: b9400280 ldr w0, [x20] 5571 e0442b8: 6b00027f cmp w19, w0 5572 e0442bc: 54001083 b.cc e0444cc <psci_setup+0x2cc> // b.lo, b.ul, b.last 5573 e0442c0: d53800b3 mrs x19, mpidr_el1 5574 e0442c4: 97fff2eb bl e040e70 <plat_my_core_pos> 5575 e0442c8: d37c7c00 ubfiz x0, x0, #4, #32 5576 e0442cc: d0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 5577 e0442d0: 912c6042 add x2, x2, #0xb18 5578 e0442d4: 92409e61 and x1, x19, #0xffffffffff 5579 e0442d8: d0000073 adrp x19, e052000 <opteed_sp_context+0xa00> 5580 e0442dc: 9260dc21 and x1, x1, #0xffffffff00ffffff 5581 e0442e0: 912e6274 add x20, x19, #0xb98 5582 e0442e4: f8206841 str x1, [x2, x0] 5583 e0442e8: 97fffeda bl e043e50 <psci_init_req_local_pwr_states> 5584 e0442ec: 52800020 mov w0, #0x1 // #1 5585 e0442f0: 97ffff99 bl e044154 <psci_set_pwr_domains_to_run> 5586 e0442f4: f94006a0 ldr x0, [x21, #8] 5587 e0442f8: aa1403e1 mov x1, x20 5588 e0442fc: 97fffc19 bl e043360 <plat_setup_psci_ops> 5589 e044300: aa1403e0 mov x0, x20 5590 e044304: d2800101 mov x1, #0x8 // #8 5591 e044308: 97fff27b bl e040cf4 <flush_dcache_range> 5592 e04430c: f945ce61 ldr x1, [x19, #2968] 5593 e044310: 52808223 mov w3, #0x411 // #1041 5594 e044314: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5595 e044318: f9400822 ldr x2, [x1, #16] 5596 e04431c: f100005f cmp x2, #0x0 5597 e044320: 528082a2 mov w2, #0x415 // #1045 5598 e044324: 1a831042 csel w2, w2, w3, ne // ne = any 5599 e044328: b90ed402 str w2, [x0, #3796] 5600 e04432c: f9400423 ldr x3, [x1, #8] 5601 e044330: b40000a3 cbz x3, e044344 <psci_setup+0x144> 5602 e044334: f9401423 ldr x3, [x1, #40] 5603 e044338: b4000063 cbz x3, e044344 <psci_setup+0x144> 5604 e04433c: 321d0042 orr w2, w2, #0x8 5605 e044340: b90ed402 str w2, [x0, #3796] 5606 e044344: f9401022 ldr x2, [x1, #32] 5607 e044348: b40001a2 cbz x2, e04437c <psci_setup+0x17c> 5608 e04434c: f9401c22 ldr x2, [x1, #56] 5609 e044350: b4000162 cbz x2, e04437c <psci_setup+0x17c> 5610 e044354: f9402c22 ldr x2, [x1, #88] 5611 e044358: b4000082 cbz x2, e044368 <psci_setup+0x168> 5612 e04435c: b94ed402 ldr w2, [x0, #3796] 5613 e044360: 321f0042 orr w2, w2, #0x2 5614 e044364: b90ed402 str w2, [x0, #3796] 5615 e044368: f9403422 ldr x2, [x1, #104] 5616 e04436c: b4000082 cbz x2, e04437c <psci_setup+0x17c> 5617 e044370: b94ed402 ldr w2, [x0, #3796] 5618 e044374: 32120042 orr w2, w2, #0x4000 5619 e044378: b90ed402 str w2, [x0, #3796] 5620 e04437c: f9402422 ldr x2, [x1, #72] 5621 e044380: b4000082 cbz x2, e044390 <psci_setup+0x190> 5622 e044384: b94ed402 ldr w2, [x0, #3796] 5623 e044388: 32180042 orr w2, w2, #0x100 5624 e04438c: b90ed402 str w2, [x0, #3796] 5625 e044390: f9402822 ldr x2, [x1, #80] 5626 e044394: b4000082 cbz x2, e0443a4 <psci_setup+0x1a4> 5627 e044398: b94ed402 ldr w2, [x0, #3796] 5628 e04439c: 32170042 orr w2, w2, #0x200 5629 e0443a0: b90ed402 str w2, [x0, #3796] 5630 e0443a4: f9404022 ldr x2, [x1, #128] 5631 e0443a8: b4000082 cbz x2, e0443b8 <psci_setup+0x1b8> 5632 e0443ac: b94ed402 ldr w2, [x0, #3796] 5633 e0443b0: 32130042 orr w2, w2, #0x2000 5634 e0443b4: b90ed402 str w2, [x0, #3796] 5635 e0443b8: f9404822 ldr x2, [x1, #144] 5636 e0443bc: b40000c2 cbz x2, e0443d4 <psci_setup+0x1d4> 5637 e0443c0: f9404c22 ldr x2, [x1, #152] 5638 e0443c4: b4000082 cbz x2, e0443d4 <psci_setup+0x1d4> 5639 e0443c8: b94ed402 ldr w2, [x0, #3796] 5640 e0443cc: 320d0042 orr w2, w2, #0x80000 5641 e0443d0: b90ed402 str w2, [x0, #3796] 5642 e0443d4: f9404422 ldr x2, [x1, #136] 5643 e0443d8: b4000082 cbz x2, e0443e8 <psci_setup+0x1e8> 5644 e0443dc: b94ed402 ldr w2, [x0, #3796] 5645 e0443e0: 320c0042 orr w2, w2, #0x100000 5646 e0443e4: b90ed402 str w2, [x0, #3796] 5647 e0443e8: f9405021 ldr x1, [x1, #160] 5648 e0443ec: b4000081 cbz x1, e0443fc <psci_setup+0x1fc> 5649 e0443f0: b94ed401 ldr w1, [x0, #3796] 5650 e0443f4: 320e0021 orr w1, w1, #0x40000 5651 e0443f8: b90ed401 str w1, [x0, #3796] 5652 e0443fc: 52800000 mov w0, #0x0 // #0 5653 e044400: a94153f3 ldp x19, x20, [sp, #16] 5654 e044404: a9425bf5 ldp x21, x22, [sp, #32] 5655 e044408: a94363f7 ldp x23, x24, [sp, #48] 5656 e04440c: a9446bf9 ldp x25, x26, [sp, #64] 5657 e044410: a94573fb ldp x27, x28, [sp, #80] 5658 e044414: a8c87bfd ldp x29, x30, [sp], #128 5659 e044418: d65f03c0 ret 5660 e04441c: 51000702 sub w2, w24, #0x1 5661 e044420: 12003e74 and w20, w19, #0xffff 5662 e044424: 340001c3 cbz w3, e04445c <psci_setup+0x25c> 5663 e044428: b00000a1 adrp x1, e059000 <psci_locks> 5664 e04442c: 91008021 add x1, x1, #0x20 5665 e044430: 8b34d034 add x20, x1, w20, sxtw #4 5666 e044434: 52800020 mov w0, #0x1 // #1 5667 e044438: 39003680 strb w0, [x20, #13] 5668 e04443c: d37c3e60 ubfiz x0, x19, #4, #16 5669 e044440: 8b010001 add x1, x0, x1 5670 e044444: 52800040 mov w0, #0x2 // #2 5671 e044448: 79001c33 strh w19, [x1, #14] 5672 e04444c: b9000a82 str w2, [x20, #8] 5673 e044450: 39003280 strb w0, [x20, #12] 5674 e044454: 11000673 add w19, w19, #0x1 5675 e044458: 17ffff86 b e044270 <psci_setup+0x70> 5676 e04445c: 8b34d341 add x1, x26, w20, sxtw #4 5677 e044460: 937c7e80 sbfiz x0, x20, #4, #32 5678 e044464: 290c8fe4 stp w4, w3, [sp, #100] 5679 e044468: b9006fe5 str w5, [sp, #108] 5680 e04446c: b9000822 str w2, [x1, #8] 5681 e044470: 92800001 mov x1, #0xffffffffffffffff // #-1 5682 e044474: f8206b41 str x1, [x26, x0] 5683 e044478: 2a1403e0 mov w0, w20 5684 e04447c: 97ffefa4 bl e04030c <_cpu_data_by_index> 5685 e044480: aa0003e1 mov x1, x0 5686 e044484: 91006000 add x0, x0, #0x18 5687 e044488: 52800022 mov w2, #0x1 // #1 5688 e04448c: b9001822 str w2, [x1, #24] 5689 e044490: 52800041 mov w1, #0x2 // #2 5690 e044494: b9000401 str w1, [x0, #4] 5691 e044498: 39002001 strb w1, [x0, #8] 5692 e04449c: d2800181 mov x1, #0xc // #12 5693 e0444a0: 97fff215 bl e040cf4 <flush_dcache_range> 5694 e0444a4: 52804e01 mov w1, #0x270 // #624 5695 e0444a8: 2a1403e0 mov w0, w20 5696 e0444ac: 52800022 mov w2, #0x1 // #1 5697 e0444b0: 9ba15a81 umaddl x1, w20, w1, x22 5698 e0444b4: 97fff4d0 bl e0417f4 <cm_set_context_by_index> 5699 e0444b8: 294c8fe4 ldp w4, w3, [sp, #100] 5700 e0444bc: b9406fe5 ldr w5, [sp, #108] 5701 e0444c0: 17ffffe5 b e044454 <psci_setup+0x254> 5702 e0444c4: 5280003c mov w28, #0x1 // #1 5703 e0444c8: 17ffff62 b e044250 <psci_setup+0x50> 5704 e0444cc: 2a1303e0 mov w0, w19 5705 e0444d0: 52800021 mov w1, #0x1 // #1 5706 e0444d4: 9101e3e2 add x2, sp, #0x78 5707 e0444d8: 97fffe2c bl e043d88 <psci_get_parent_pwr_domain_nodes> 5708 e0444dc: b9407be0 ldr w0, [sp, #120] 5709 e0444e0: 6b17001f cmp w0, w23 5710 e0444e4: 2a0003e1 mov w1, w0 5711 e0444e8: 54000060 b.eq e0444f4 <psci_setup+0x2f4> // b.none 5712 e0444ec: d37cec22 lsl x2, x1, #4 5713 e0444f0: b8226ad3 str w19, [x22, x2] 5714 e0444f4: 8b0112c1 add x1, x22, x1, lsl #4 5715 e0444f8: 11000673 add w19, w19, #0x1 5716 e0444fc: 2a0003f7 mov w23, w0 5717 e044500: b9400422 ldr w2, [x1, #4] 5718 e044504: 11000442 add w2, w2, #0x1 5719 e044508: b9000422 str w2, [x1, #4] 5720 e04450c: 17ffff6a b e0442b4 <psci_setup+0xb4> 5721 5722000000000e044510 <psci_smc_handler>: 5723 e044510: 36000a67 tbz w7, #0, e04465c <psci_smc_handler+0x14c> 5724 e044514: d0000065 adrp x5, e052000 <opteed_sp_context+0xa00> 5725 e044518: 2a0003e4 mov w4, w0 5726 e04451c: aa0103e0 mov x0, x1 5727 e044520: aa0203e1 mov x1, x2 5728 e044524: b94ed4a5 ldr w5, [x5, #3796] 5729 e044528: aa0303e2 mov x2, x3 5730 e04452c: 52800023 mov w3, #0x1 // #1 5731 e044530: 1ac42063 lsl w3, w3, w4 5732 e044534: 6a05007f tst w3, w5 5733 e044538: 54000920 b.eq e04465c <psci_smc_handler+0x14c> // b.none 5734 e04453c: a9bf7bfd stp x29, x30, [sp, #-16]! 5735 e044540: 910003fd mov x29, sp 5736 e044544: 37f00784 tbnz w4, #30, e044634 <psci_smc_handler+0x124> 5737 e044548: 52af8003 mov w3, #0x7c000000 // #2080374784 5738 e04454c: 0b030083 add w3, w4, w3 5739 e044550: 7100507f cmp w3, #0x14 5740 e044554: 54000628 b.hi e044618 <psci_smc_handler+0x108> // b.pmore 5741 e044558: f0000005 adrp x5, e047000 <__TEXT_END__> 5742 e04455c: 910940a5 add x5, x5, #0x250 5743 e044560: 386348a3 ldrb w3, [x5, w3, uxtw] 5744 e044564: 10000065 adr x5, e044570 <psci_smc_handler+0x60> 5745 e044568: 8b2388a3 add x3, x5, w3, sxtb #2 5746 e04456c: d61f0060 br x3 5747 e044570: 97fffbbc bl e043460 <psci_cpu_off> 5748 e044574: 93407c00 sxtw x0, w0 5749 e044578: 1400002d b e04462c <psci_smc_handler+0x11c> 5750 e04457c: 2a0203e2 mov w2, w2 5751 e044580: 2a0103e1 mov w1, w1 5752 e044584: 97fffc5e bl e0436fc <psci_cpu_suspend> 5753 e044588: 17fffffb b e044574 <psci_smc_handler+0x64> 5754 e04458c: 2a0203e2 mov w2, w2 5755 e044590: 2a0103e1 mov w1, w1 5756 e044594: 2a0003e0 mov w0, w0 5757 e044598: 97fffbb4 bl e043468 <psci_cpu_on> 5758 e04459c: 17fffff6 b e044574 <psci_smc_handler+0x64> 5759 e0445a0: 2a0003e0 mov w0, w0 5760 e0445a4: 97fffb92 bl e0433ec <psci_affinity_info> 5761 e0445a8: 17fffff3 b e044574 <psci_smc_handler+0x64> 5762 e0445ac: 2a0003e0 mov w0, w0 5763 e0445b0: 97fffe79 bl e043f94 <psci_migrate> 5764 e0445b4: 17fffff0 b e044574 <psci_smc_handler+0x64> 5765 e0445b8: 97fffe96 bl e044010 <psci_migrate_info_type> 5766 e0445bc: 17ffffee b e044574 <psci_smc_handler+0x64> 5767 e0445c0: a8c17bfd ldp x29, x30, [sp], #16 5768 e0445c4: 17fffe99 b e044028 <psci_migrate_info_up_cpu> 5769 e0445c8: 2a0003e0 mov w0, w0 5770 e0445cc: 97fffea1 bl e044050 <psci_node_hw_state> 5771 e0445d0: 17ffffe9 b e044574 <psci_smc_handler+0x64> 5772 e0445d4: 2a0103e1 mov w1, w1 5773 e0445d8: 2a0003e0 mov w0, w0 5774 e0445dc: 94000072 bl e0447a4 <psci_system_suspend> 5775 e0445e0: 17ffffe5 b e044574 <psci_smc_handler+0x64> 5776 e0445e4: 9400002b bl e044690 <psci_system_off> 5777 e0445e8: 94000038 bl e0446c8 <psci_system_reset> 5778 e0445ec: 97fffdb9 bl e043cd0 <psci_features> 5779 e0445f0: 17ffffe1 b e044574 <psci_smc_handler+0x64> 5780 e0445f4: a8c17bfd ldp x29, x30, [sp], #16 5781 e0445f8: 17fffe50 b e043f38 <psci_mem_protect> 5782 e0445fc: 2a0103e1 mov w1, w1 5783 e044600: 2a0003e0 mov w0, w0 5784 e044604: a8c17bfd ldp x29, x30, [sp], #16 5785 e044608: 17fffe3a b e043ef0 <psci_mem_chk_range> 5786 e04460c: 2a0103e1 mov w1, w1 5787 e044610: a8c17bfd ldp x29, x30, [sp], #16 5788 e044614: 1400003b b e044700 <psci_system_reset2> 5789 e044618: 2a0403e1 mov w1, w4 5790 e04461c: f0000000 adrp x0, e047000 <__TEXT_END__> 5791 e044620: 91117400 add x0, x0, #0x45d 5792 e044624: 940002cf bl e045160 <tf_log> 5793 e044628: 92800000 mov x0, #0xffffffffffffffff // #-1 5794 e04462c: a8c17bfd ldp x29, x30, [sp], #16 5795 e044630: d65f03c0 ret 5796 e044634: 12b88003 mov w3, #0x3bffffff // #1006632959 5797 e044638: 0b030083 add w3, w4, w3 5798 e04463c: 71004c7f cmp w3, #0x13 5799 e044640: 54fffec8 b.hi e044618 <psci_smc_handler+0x108> // b.pmore 5800 e044644: f0000005 adrp x5, e047000 <__TEXT_END__> 5801 e044648: 9109a0a5 add x5, x5, #0x268 5802 e04464c: 386348a3 ldrb w3, [x5, w3, uxtw] 5803 e044650: 10000065 adr x5, e04465c <psci_smc_handler+0x14c> 5804 e044654: 8b2388a3 add x3, x5, w3, sxtb #2 5805 e044658: d61f0060 br x3 5806 e04465c: 92800000 mov x0, #0xffffffffffffffff // #-1 5807 e044660: d65f03c0 ret 5808 e044664: 320083e0 mov w0, #0x10001 // #65537 5809 e044668: 17fffff1 b e04462c <psci_smc_handler+0x11c> 5810 5811000000000e04466c <psci_spd_migrate_info>: 5812 e04466c: d0000061 adrp x1, e052000 <opteed_sp_context+0xa00> 5813 e044670: f945d021 ldr x1, [x1, #2976] 5814 e044674: b40000a1 cbz x1, e044688 <psci_spd_migrate_info+0x1c> 5815 e044678: f9401821 ldr x1, [x1, #48] 5816 e04467c: b4000061 cbz x1, e044688 <psci_spd_migrate_info+0x1c> 5817 e044680: aa0103f0 mov x16, x1 5818 e044684: d61f0200 br x16 5819 e044688: 12800000 mov w0, #0xffffffff // #-1 5820 e04468c: d65f03c0 ret 5821 5822000000000e044690 <psci_system_off>: 5823 e044690: a9bf7bfd stp x29, x30, [sp, #-16]! 5824 e044694: 910003fd mov x29, sp 5825 e044698: 97fffe84 bl e0440a8 <psci_print_power_domain_map> 5826 e04469c: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5827 e0446a0: f945d000 ldr x0, [x0, #2976] 5828 e0446a4: b4000080 cbz x0, e0446b4 <psci_system_off+0x24> 5829 e0446a8: f9401c00 ldr x0, [x0, #56] 5830 e0446ac: b4000040 cbz x0, e0446b4 <psci_system_off+0x24> 5831 e0446b0: d63f0000 blr x0 5832 e0446b4: 97fff4f6 bl e041a8c <console_flush> 5833 e0446b8: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5834 e0446bc: f945cc00 ldr x0, [x0, #2968] 5835 e0446c0: f9402400 ldr x0, [x0, #72] 5836 e0446c4: d63f0000 blr x0 5837 5838000000000e0446c8 <psci_system_reset>: 5839 e0446c8: a9bf7bfd stp x29, x30, [sp, #-16]! 5840 e0446cc: 910003fd mov x29, sp 5841 e0446d0: 97fffe76 bl e0440a8 <psci_print_power_domain_map> 5842 e0446d4: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5843 e0446d8: f945d000 ldr x0, [x0, #2976] 5844 e0446dc: b4000080 cbz x0, e0446ec <psci_system_reset+0x24> 5845 e0446e0: f9402000 ldr x0, [x0, #64] 5846 e0446e4: b4000040 cbz x0, e0446ec <psci_system_reset+0x24> 5847 e0446e8: d63f0000 blr x0 5848 e0446ec: 97fff4e8 bl e041a8c <console_flush> 5849 e0446f0: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5850 e0446f4: f945cc00 ldr x0, [x0, #2968] 5851 e0446f8: f9402800 ldr x0, [x0, #80] 5852 e0446fc: d63f0000 blr x0 5853 5854000000000e044700 <psci_system_reset2>: 5855 e044700: a9bd7bfd stp x29, x30, [sp, #-48]! 5856 e044704: 910003fd mov x29, sp 5857 e044708: a90153f3 stp x19, x20, [sp, #16] 5858 e04470c: 2a0003f3 mov w19, w0 5859 e044710: aa0103f4 mov x20, x1 5860 e044714: f90013f5 str x21, [sp, #32] 5861 e044718: 531f7e75 lsr w21, w19, #31 5862 e04471c: 97fffe63 bl e0440a8 <psci_print_power_domain_map> 5863 e044720: 36f80233 tbz w19, #31, e044764 <psci_system_reset2+0x64> 5864 e044724: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5865 e044728: f945d000 ldr x0, [x0, #2976] 5866 e04472c: b5000300 cbnz x0, e04478c <psci_system_reset2+0x8c> 5867 e044730: 97fff4d7 bl e041a8c <console_flush> 5868 e044734: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5869 e044738: aa1403e2 mov x2, x20 5870 e04473c: 2a1303e1 mov w1, w19 5871 e044740: f945cc00 ldr x0, [x0, #2968] 5872 e044744: f9405003 ldr x3, [x0, #160] 5873 e044748: 2a1503e0 mov w0, w21 5874 e04474c: d63f0060 blr x3 5875 e044750: 93407c00 sxtw x0, w0 5876 e044754: a94153f3 ldp x19, x20, [sp, #16] 5877 e044758: f94013f5 ldr x21, [sp, #32] 5878 e04475c: a8c37bfd ldp x29, x30, [sp], #48 5879 e044760: d65f03c0 ret 5880 e044764: 350001d3 cbnz w19, e04479c <psci_system_reset2+0x9c> 5881 e044768: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5882 e04476c: f945cc00 ldr x0, [x0, #2968] 5883 e044770: f9404c01 ldr x1, [x0, #152] 5884 e044774: b4fffd81 cbz x1, e044724 <psci_system_reset2+0x24> 5885 e044778: 52800000 mov w0, #0x0 // #0 5886 e04477c: d63f0020 blr x1 5887 e044780: 36fffd20 tbz w0, #31, e044724 <psci_system_reset2+0x24> 5888 e044784: 92800000 mov x0, #0xffffffffffffffff // #-1 5889 e044788: 17fffff3 b e044754 <psci_system_reset2+0x54> 5890 e04478c: f9402000 ldr x0, [x0, #64] 5891 e044790: b4fffd00 cbz x0, e044730 <psci_system_reset2+0x30> 5892 e044794: d63f0000 blr x0 5893 e044798: 17ffffe6 b e044730 <psci_system_reset2+0x30> 5894 e04479c: 92800020 mov x0, #0xfffffffffffffffe // #-2 5895 e0447a0: 17ffffed b e044754 <psci_system_reset2+0x54> 5896 5897000000000e0447a4 <psci_system_suspend>: 5898 e0447a4: a9b87bfd stp x29, x30, [sp, #-128]! 5899 e0447a8: 910003fd mov x29, sp 5900 e0447ac: a90153f3 stp x19, x20, [sp, #16] 5901 e0447b0: aa0003f3 mov x19, x0 5902 e0447b4: aa0103f4 mov x20, x1 5903 e0447b8: 97fffdb2 bl e043e80 <psci_is_last_on_cpu> 5904 e0447bc: 350000c0 cbnz w0, e0447d4 <psci_system_suspend+0x30> 5905 e0447c0: 12800053 mov w19, #0xfffffffd // #-3 5906 e0447c4: 2a1303e0 mov w0, w19 5907 e0447c8: a94153f3 ldp x19, x20, [sp, #16] 5908 e0447cc: a8c87bfd ldp x29, x30, [sp], #128 5909 e0447d0: d65f03c0 ret 5910 e0447d4: aa1303e1 mov x1, x19 5911 e0447d8: aa1403e2 mov x2, x20 5912 e0447dc: 9100a3e0 add x0, sp, #0x28 5913 e0447e0: 9400000e bl e044818 <psci_validate_entry_point> 5914 e0447e4: 2a0003f3 mov w19, w0 5915 e0447e8: 35fffee0 cbnz w0, e0447c4 <psci_system_suspend+0x20> 5916 e0447ec: 910083e0 add x0, sp, #0x20 5917 e0447f0: 97fffe2f bl e0440ac <psci_query_sys_suspend_pwrstate> 5918 e0447f4: 910083e0 add x0, sp, #0x20 5919 e0447f8: 97fffd5b bl e043d64 <psci_find_target_suspend_lvl> 5920 e0447fc: 34fffe20 cbz w0, e0447c0 <psci_system_suspend+0x1c> 5921 e044800: 52800023 mov w3, #0x1 // #1 5922 e044804: 910083e2 add x2, sp, #0x20 5923 e044808: 2a0303e1 mov w1, w3 5924 e04480c: 9100a3e0 add x0, sp, #0x28 5925 e044810: 97fffc1e bl e043888 <psci_cpu_suspend_start> 5926 e044814: 17ffffec b e0447c4 <psci_system_suspend+0x20> 5927 5928000000000e044818 <psci_validate_entry_point>: 5929 e044818: a9bb7bfd stp x29, x30, [sp, #-80]! 5930 e04481c: 910003fd mov x29, sp 5931 e044820: a90153f3 stp x19, x20, [sp, #16] 5932 e044824: aa0003f4 mov x20, x0 5933 e044828: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 5934 e04482c: aa0103f3 mov x19, x1 5935 e044830: a9025bf5 stp x21, x22, [sp, #32] 5936 e044834: f945cc00 ldr x0, [x0, #2968] 5937 e044838: a90363f7 stp x23, x24, [sp, #48] 5938 e04483c: aa0203f8 mov x24, x2 5939 e044840: f9403001 ldr x1, [x0, #96] 5940 e044844: f90023f9 str x25, [sp, #64] 5941 e044848: b5000361 cbnz x1, e0448b4 <psci_validate_entry_point+0x9c> 5942 e04484c: d53e1117 mrs x23, scr_el3 5943 e044850: d5381000 mrs x0, sctlr_el1 5944 e044854: 927802f9 and x25, x23, #0x100 5945 e044858: 37400437 tbnz w23, #8, e0448dc <psci_validate_entry_point+0xc4> 5946 e04485c: f2670000 ands x0, x0, #0x2000000 5947 e044860: 52802021 mov w1, #0x101 // #257 5948 e044864: 72a00b01 movk w1, #0x58, lsl #16 5949 e044868: d2800075 mov x21, #0x3 // #3 5950 e04486c: 9a9f16a0 csinc x0, x21, xzr, ne // ne = any 5951 e044870: 29000281 stp w1, w0, [x20] 5952 e044874: f9000693 str x19, [x20, #8] 5953 e044878: 1a9f07f6 cset w22, ne // ne = any 5954 e04487c: 91006280 add x0, x20, #0x18 5955 e044880: d2800801 mov x1, #0x40 // #64 5956 e044884: 97fff23d bl e041178 <zeromem> 5957 e044888: f9000e98 str x24, [x20, #24] 5958 e04488c: 365002d7 tbz w23, #10, e0448e4 <psci_validate_entry_point+0xcc> 5959 e044890: 37000193 tbnz w19, #0, e0448c0 <psci_validate_entry_point+0xa8> 5960 e044894: f100033f cmp x25, #0x0 5961 e044898: 52807821 mov w1, #0x3c1 // #961 5962 e04489c: 1a9f07e0 cset w0, ne // ne = any 5963 e0448a0: 11000400 add w0, w0, #0x1 5964 e0448a4: 2a000820 orr w0, w1, w0, lsl #2 5965 e0448a8: b9001280 str w0, [x20, #16] 5966 e0448ac: 52800000 mov w0, #0x0 // #0 5967 e0448b0: 14000005 b e0448c4 <psci_validate_entry_point+0xac> 5968 e0448b4: aa1303e0 mov x0, x19 5969 e0448b8: d63f0020 blr x1 5970 e0448bc: 34fffc80 cbz w0, e04484c <psci_validate_entry_point+0x34> 5971 e0448c0: 12800100 mov w0, #0xfffffff7 // #-9 5972 e0448c4: a94153f3 ldp x19, x20, [sp, #16] 5973 e0448c8: a9425bf5 ldp x21, x22, [sp, #32] 5974 e0448cc: a94363f7 ldp x23, x24, [sp, #48] 5975 e0448d0: f94023f9 ldr x25, [sp, #64] 5976 e0448d4: a8c57bfd ldp x29, x30, [sp], #80 5977 e0448d8: d65f03c0 ret 5978 e0448dc: d53c1000 mrs x0, sctlr_el2 5979 e0448e0: 17ffffdf b e04485c <psci_validate_entry_point+0x44> 5980 e0448e4: 52800140 mov w0, #0xa // #10 5981 e0448e8: f100033f cmp x25, #0x0 5982 e0448ec: 1a8002b5 csel w21, w21, w0, eq // eq = none 5983 e0448f0: 531b0273 ubfiz w19, w19, #5, #1 5984 e0448f4: 52803a00 mov w0, #0x1d0 // #464 5985 e0448f8: 2a150273 orr w19, w19, w21 5986 e0448fc: 2a162416 orr w22, w0, w22, lsl #9 5987 e044900: 2a160273 orr w19, w19, w22 5988 e044904: b9001293 str w19, [x20, #16] 5989 e044908: 17ffffe9 b e0448ac <psci_validate_entry_point+0x94> 5990 5991000000000e04490c <psci_validate_mpidr>: 5992 e04490c: a9bf7bfd stp x29, x30, [sp, #-16]! 5993 e044910: 910003fd mov x29, sp 5994 e044914: 97fffa18 bl e043174 <plat_core_pos_by_mpidr> 5995 e044918: 7100001f cmp w0, #0x0 5996 e04491c: a8c17bfd ldp x29, x30, [sp], #16 5997 e044920: 12800020 mov w0, #0xfffffffe // #-2 5998 e044924: 1a9fb000 csel w0, w0, wzr, lt // lt = tstop 5999 e044928: d65f03c0 ret 6000 6001000000000e04492c <psci_validate_power_state>: 6002 e04492c: 52bf9fc2 mov w2, #0xfcfe0000 // #-50462720 6003 e044930: 6a02001f tst w0, w2 6004 e044934: 540000c1 b.ne e04494c <psci_validate_power_state+0x20> // b.any 6005 e044938: d0000062 adrp x2, e052000 <opteed_sp_context+0xa00> 6006 e04493c: f945cc42 ldr x2, [x2, #2968] 6007 e044940: f9402c42 ldr x2, [x2, #88] 6008 e044944: aa0203f0 mov x16, x2 6009 e044948: d61f0200 br x16 6010 e04494c: 12800020 mov w0, #0xfffffffe // #-2 6011 e044950: d65f03c0 ret 6012 6013000000000e044954 <psci_warmboot_entrypoint>: 6014 e044954: a9bd7bfd stp x29, x30, [sp, #-48]! 6015 e044958: 910003fd mov x29, sp 6016 e04495c: a90153f3 stp x19, x20, [sp, #16] 6017 e044960: 97fff144 bl e040e70 <plat_my_core_pos> 6018 e044964: 790043ff strh wzr, [sp, #32] 6019 e044968: b9002bff str wzr, [sp, #40] 6020 e04496c: d53ed041 mrs x1, tpidr_el3 6021 e044970: b9401821 ldr w1, [x1, #24] 6022 e044974: 7100043f cmp w1, #0x1 6023 e044978: 540000c1 b.ne e044990 <psci_warmboot_entrypoint+0x3c> // b.any 6024 e04497c: f0000000 adrp x0, e047000 <__TEXT_END__> 6025 e044980: 91102000 add x0, x0, #0x408 6026 e044984: 940001f7 bl e045160 <tf_log> 6027 e044988: 97fff441 bl e041a8c <console_flush> 6028 e04498c: 97ffeffe bl e040984 <do_panic> 6029 e044990: 2a0003f4 mov w20, w0 6030 e044994: d53ed041 mrs x1, tpidr_el3 6031 e044998: b9401c33 ldr w19, [x1, #28] 6032 e04499c: 9100a3e2 add x2, sp, #0x28 6033 e0449a0: 71000a7f cmp w19, #0x2 6034 e0449a4: 1a9f1673 csinc w19, w19, wzr, ne // ne = any 6035 e0449a8: 2a1303e1 mov w1, w19 6036 e0449ac: 97fffcf7 bl e043d88 <psci_get_parent_pwr_domain_nodes> 6037 e0449b0: 9100a3e1 add x1, sp, #0x28 6038 e0449b4: 2a1303e0 mov w0, w19 6039 e0449b8: 97fffa72 bl e043380 <psci_acquire_pwr_domain_locks> 6040 e0449bc: 910083e1 add x1, sp, #0x20 6041 e0449c0: 2a1303e0 mov w0, w19 6042 e0449c4: 97fffd03 bl e043dd0 <psci_get_target_local_pwr_states> 6043 e0449c8: d53ed040 mrs x0, tpidr_el3 6044 e0449cc: b9401800 ldr w0, [x0, #24] 6045 e0449d0: 910083e1 add x1, sp, #0x20 6046 e0449d4: 7100081f cmp w0, #0x2 6047 e0449d8: 2a1403e0 mov w0, w20 6048 e0449dc: 54000141 b.ne e044a04 <psci_warmboot_entrypoint+0xb0> // b.any 6049 e0449e0: 97fffab9 bl e0434c4 <psci_cpu_on_finish> 6050 e0449e4: 2a1303e0 mov w0, w19 6051 e0449e8: 97fffddb bl e044154 <psci_set_pwr_domains_to_run> 6052 e0449ec: 9100a3e1 add x1, sp, #0x28 6053 e0449f0: 2a1303e0 mov w0, w19 6054 e0449f4: 97fffdc2 bl e0440fc <psci_release_pwr_domain_locks> 6055 e0449f8: a94153f3 ldp x19, x20, [sp, #16] 6056 e0449fc: a8c37bfd ldp x29, x30, [sp], #48 6057 e044a00: d65f03c0 ret 6058 e044a04: 97fffb78 bl e0437e4 <psci_cpu_suspend_finish> 6059 e044a08: 17fffff7 b e0449e4 <psci_warmboot_entrypoint+0x90> 6060 6061000000000e044a0c <putchar>: 6062 e044a0c: a9be7bfd stp x29, x30, [sp, #-32]! 6063 e044a10: 910003fd mov x29, sp 6064 e044a14: f9000bf3 str x19, [sp, #16] 6065 e044a18: 2a0003f3 mov w19, w0 6066 e044a1c: 12001c00 and w0, w0, #0xff 6067 e044a20: 97fff43b bl e041b0c <console_putc> 6068 e044a24: 7100001f cmp w0, #0x0 6069 e044a28: 5a9fa260 csinv w0, w19, wzr, ge // ge = tcont 6070 e044a2c: f9400bf3 ldr x19, [sp, #16] 6071 e044a30: a8c27bfd ldp x29, x30, [sp], #32 6072 e044a34: d65f03c0 ret 6073 6074000000000e044a38 <qemu_configure_mmu_el3>: 6075 e044a38: a9bc7bfd stp x29, x30, [sp, #-64]! 6076 e044a3c: 910003fd mov x29, sp 6077 e044a40: a90153f3 stp x19, x20, [sp, #16] 6078 e044a44: aa0403f4 mov x20, x4 6079 e044a48: aa0603f3 mov x19, x6 6080 e044a4c: a9025bf5 stp x21, x22, [sp, #32] 6081 e044a50: aa0703f6 mov x22, x7 6082 e044a54: aa0203f5 mov x21, x2 6083 e044a58: aa0103e2 mov x2, x1 6084 e044a5c: aa0003e1 mov x1, x0 6085 e044a60: a90363f7 stp x23, x24, [sp, #48] 6086 e044a64: aa0503f7 mov x23, x5 6087 e044a68: aa0303f8 mov x24, x3 6088 e044a6c: 52800143 mov w3, #0xa // #10 6089 e044a70: 97fff72e bl e042728 <mmap_add_region> 6090 e044a74: cb150302 sub x2, x24, x21 6091 e044a78: aa1503e1 mov x1, x21 6092 e044a7c: aa1503e0 mov x0, x21 6093 e044a80: 52800043 mov w3, #0x2 // #2 6094 e044a84: 97fff729 bl e042728 <mmap_add_region> 6095 e044a88: cb1402e2 sub x2, x23, x20 6096 e044a8c: aa1403e1 mov x1, x20 6097 e044a90: aa1403e0 mov x0, x20 6098 e044a94: 52800843 mov w3, #0x42 // #66 6099 e044a98: 97fff724 bl e042728 <mmap_add_region> 6100 e044a9c: cb1302c2 sub x2, x22, x19 6101 e044aa0: aa1303e1 mov x1, x19 6102 e044aa4: 52800103 mov w3, #0x8 // #8 6103 e044aa8: aa1303e0 mov x0, x19 6104 e044aac: 97fff71f bl e042728 <mmap_add_region> 6105 e044ab0: f0000000 adrp x0, e047000 <__TEXT_END__> 6106 e044ab4: 91062000 add x0, x0, #0x188 6107 e044ab8: 97fff709 bl e0426dc <mmap_add> 6108 e044abc: 97fff683 bl e0424c8 <init_xlat_tables> 6109 e044ac0: a94153f3 ldp x19, x20, [sp, #16] 6110 e044ac4: 52800000 mov w0, #0x0 // #0 6111 e044ac8: a9425bf5 ldp x21, x22, [sp, #32] 6112 e044acc: a94363f7 ldp x23, x24, [sp, #48] 6113 e044ad0: a8c47bfd ldp x29, x30, [sp], #64 6114 e044ad4: 17fff44b b e041c00 <enable_mmu_el3> 6115 6116000000000e044ad8 <qemu_console_init>: 6117 e044ad8: a9be7bfd stp x29, x30, [sp, #-32]! 6118 e044adc: 52984002 mov w2, #0xc200 // #49664 6119 e044ae0: 72a00022 movk w2, #0x1, lsl #16 6120 e044ae4: 910003fd mov x29, sp 6121 e044ae8: f9000bf3 str x19, [sp, #16] 6122 e044aec: d0000073 adrp x19, e052000 <opteed_sp_context+0xa00> 6123 e044af0: 9132a273 add x19, x19, #0xca8 6124 e044af4: 52800021 mov w1, #0x1 // #1 6125 e044af8: aa1303e3 mov x3, x19 6126 e044afc: d2a12000 mov x0, #0x9000000 // #150994944 6127 e044b00: 97ffee93 bl e04054c <console_pl011_register> 6128 e044b04: aa1303e0 mov x0, x19 6129 e044b08: 52800061 mov w1, #0x3 // #3 6130 e044b0c: f9400bf3 ldr x19, [sp, #16] 6131 e044b10: a8c27bfd ldp x29, x30, [sp], #32 6132 e044b14: 17fff432 b e041bdc <console_set_scope> 6133 6134000000000e044b18 <qemu_cpu_standby>: 6135 e044b18: d5033f9f dsb sy 6136 e044b1c: d503207f wfi 6137 e044b20: d65f03c0 ret 6138 6139000000000e044b24 <qemu_mpidr_to_core_pos>: 6140 e044b24: 17fff994 b e043174 <plat_core_pos_by_mpidr> 6141 6142000000000e044b28 <qemu_pwr_domain_off>: 6143 e044b28: 14000013 b e044b74 <qemu_pwr_gic_off> 6144 6145000000000e044b2c <qemu_pwr_domain_on>: 6146 e044b2c: a9bf7bfd stp x29, x30, [sp, #-16]! 6147 e044b30: 910003fd mov x29, sp 6148 e044b34: 97fff990 bl e043174 <plat_core_pos_by_mpidr> 6149 e044b38: d2a1c001 mov x1, #0xe000000 // #234881024 6150 e044b3c: 8b204c20 add x0, x1, w0, uxtw #3 6151 e044b40: d2800021 mov x1, #0x1 // #1 6152 e044b44: f9000401 str x1, [x0, #8] 6153 e044b48: d503209f sev 6154 e044b4c: 52800000 mov w0, #0x0 // #0 6155 e044b50: a8c17bfd ldp x29, x30, [sp], #16 6156 e044b54: d65f03c0 ret 6157 6158000000000e044b58 <qemu_pwr_domain_on_finish>: 6159 e044b58: 1400000e b e044b90 <qemu_pwr_gic_on_finish> 6160 6161000000000e044b5c <qemu_pwr_domain_pwr_down_wfi>: 6162 e044b5c: a9bf7bfd stp x29, x30, [sp, #-16]! 6163 e044b60: 910003fd mov x29, sp 6164 e044b64: 97ffef4a bl e04088c <disable_mmu_el3> 6165 e044b68: 97fff0cb bl e040e94 <plat_secondary_cold_boot_setup> 6166 6167000000000e044b6c <qemu_pwr_domain_suspend>: 6168 e044b6c: d65f03c0 ret 6169 6170000000000e044b70 <qemu_pwr_domain_suspend_finish>: 6171 e044b70: d65f03c0 ret 6172 6173000000000e044b74 <qemu_pwr_gic_off>: 6174 e044b74: a9bf7bfd stp x29, x30, [sp, #-16]! 6175 e044b78: 910003fd mov x29, sp 6176 e044b7c: 97fff0bd bl e040e70 <plat_my_core_pos> 6177 e044b80: 97fff4ce bl e041eb8 <gicv3_cpuif_disable> 6178 e044b84: 97fff0bb bl e040e70 <plat_my_core_pos> 6179 e044b88: a8c17bfd ldp x29, x30, [sp], #16 6180 e044b8c: 17fff5ad b e042240 <gicv3_rdistif_off> 6181 6182000000000e044b90 <qemu_pwr_gic_on_finish>: 6183 e044b90: a9bf7bfd stp x29, x30, [sp, #-16]! 6184 e044b94: 910003fd mov x29, sp 6185 e044b98: 97fff0b6 bl e040e70 <plat_my_core_pos> 6186 e044b9c: 97fff577 bl e042178 <gicv3_rdistif_init> 6187 e044ba0: 97fff0b4 bl e040e70 <plat_my_core_pos> 6188 e044ba4: a8c17bfd ldp x29, x30, [sp], #16 6189 e044ba8: 17fff4d4 b e041ef8 <gicv3_cpuif_enable> 6190 6191000000000e044bac <qemu_system_off>: 6192 e044bac: a9bf7bfd stp x29, x30, [sp, #-16]! 6193 e044bb0: f0000000 adrp x0, e047000 <__TEXT_END__> 6194 e044bb4: 91128400 add x0, x0, #0x4a1 6195 e044bb8: 910003fd mov x29, sp 6196 e044bbc: 94000169 bl e045160 <tf_log> 6197 e044bc0: 52800001 mov w1, #0x0 // #0 6198 e044bc4: 52800000 mov w0, #0x0 // #0 6199 e044bc8: 97fff636 bl e0424a0 <gpio_set_direction> 6200 e044bcc: 52800001 mov w1, #0x0 // #0 6201 e044bd0: 52800000 mov w0, #0x0 // #0 6202 e044bd4: 97fff638 bl e0424b4 <gpio_set_value> 6203 e044bd8: 52800021 mov w1, #0x1 // #1 6204 e044bdc: 52800000 mov w0, #0x0 // #0 6205 e044be0: 97fff635 bl e0424b4 <gpio_set_value> 6206 e044be4: 97fff3aa bl e041a8c <console_flush> 6207 e044be8: 97ffef67 bl e040984 <do_panic> 6208 6209000000000e044bec <qemu_system_reset>: 6210 e044bec: a9bf7bfd stp x29, x30, [sp, #-16]! 6211 e044bf0: f0000000 adrp x0, e047000 <__TEXT_END__> 6212 e044bf4: 91120400 add x0, x0, #0x481 6213 e044bf8: 910003fd mov x29, sp 6214 e044bfc: 94000159 bl e045160 <tf_log> 6215 e044c00: 52800001 mov w1, #0x0 // #0 6216 e044c04: 52800020 mov w0, #0x1 // #1 6217 e044c08: 97fff626 bl e0424a0 <gpio_set_direction> 6218 e044c0c: 52800001 mov w1, #0x0 // #0 6219 e044c10: 52800020 mov w0, #0x1 // #1 6220 e044c14: 97fff628 bl e0424b4 <gpio_set_value> 6221 e044c18: 52800021 mov w1, #0x1 // #1 6222 e044c1c: 2a0103e0 mov w0, w1 6223 e044c20: 97fff625 bl e0424b4 <gpio_set_value> 6224 e044c24: 97fff39a bl e041a8c <console_flush> 6225 e044c28: 97ffef57 bl e040984 <do_panic> 6226 6227000000000e044c2c <qemu_validate_ns_entrypoint>: 6228 e044c2c: b26287e1 mov x1, #0xffffffffc0000000 // #-1073741824 6229 e044c30: 8b010000 add x0, x0, x1 6230 e044c34: 12a80001 mov w1, #0xbfffffff // #-1073741825 6231 e044c38: eb01001f cmp x0, x1 6232 e044c3c: 12800100 mov w0, #0xfffffff7 // #-9 6233 e044c40: 1a9f8000 csel w0, w0, wzr, hi // hi = pmore 6234 e044c44: d65f03c0 ret 6235 6236000000000e044c48 <qemu_validate_power_state>: 6237 e044c48: f0000002 adrp x2, e047000 <__TEXT_END__> 6238 e044c4c: 910a7042 add x2, x2, #0x29c 6239 e044c50: b9400043 ldr w3, [x2] 6240 e044c54: 35000063 cbnz w3, e044c60 <qemu_validate_power_state+0x18> 6241 e044c58: 12800020 mov w0, #0xfffffffe // #-2 6242 e044c5c: d65f03c0 ret 6243 e044c60: 91001042 add x2, x2, #0x4 6244 e044c64: 6b00007f cmp w3, w0 6245 e044c68: 54ffff41 b.ne e044c50 <qemu_validate_power_state+0x8> // b.any 6246 e044c6c: 12003c00 and w0, w0, #0xffff 6247 e044c70: 14000004 b e044c80 <qemu_validate_power_state+0x38> 6248 e044c74: 12000c02 and w2, w0, #0xf 6249 e044c78: 53047c00 lsr w0, w0, #4 6250 e044c7c: 38001422 strb w2, [x1], #1 6251 e044c80: 35ffffa0 cbnz w0, e044c74 <qemu_validate_power_state+0x2c> 6252 e044c84: 17fffff6 b e044c5c <qemu_validate_power_state+0x14> 6253 6254000000000e044c88 <register_interrupt_type_handler>: 6255 e044c88: a9bd7bfd stp x29, x30, [sp, #-48]! 6256 e044c8c: 910003fd mov x29, sp 6257 e044c90: a90153f3 stp x19, x20, [sp, #16] 6258 e044c94: f90013f5 str x21, [sp, #32] 6259 e044c98: aa0103f5 mov x21, x1 6260 e044c9c: b4000221 cbz x1, e044ce0 <register_interrupt_type_handler+0x58> 6261 e044ca0: 2a0203e1 mov w1, w2 6262 e044ca4: 721e745f tst w2, #0xfffffffc 6263 e044ca8: 540001c1 b.ne e044ce0 <register_interrupt_type_handler+0x58> // b.any 6264 e044cac: 2a0003f3 mov w19, w0 6265 e044cb0: d0000074 adrp x20, e052000 <opteed_sp_context+0xa00> 6266 e044cb4: 912a2294 add x20, x20, #0xa88 6267 e044cb8: d37b7e73 ubfiz x19, x19, #5, #32 6268 e044cbc: f8736a82 ldr x2, [x20, x19] 6269 e044cc0: b5000142 cbnz x2, e044ce8 <register_interrupt_type_handler+0x60> 6270 e044cc4: 94000057 bl e044e20 <set_routing_model> 6271 e044cc8: 35000040 cbnz w0, e044cd0 <register_interrupt_type_handler+0x48> 6272 e044ccc: f8336a95 str x21, [x20, x19] 6273 e044cd0: a94153f3 ldp x19, x20, [sp, #16] 6274 e044cd4: f94013f5 ldr x21, [sp, #32] 6275 e044cd8: a8c37bfd ldp x29, x30, [sp], #48 6276 e044cdc: d65f03c0 ret 6277 e044ce0: 128002a0 mov w0, #0xffffffea // #-22 6278 e044ce4: 17fffffb b e044cd0 <register_interrupt_type_handler+0x48> 6279 e044ce8: 12800480 mov w0, #0xffffffdb // #-37 6280 e044cec: 17fffff9 b e044cd0 <register_interrupt_type_handler+0x48> 6281 6282000000000e044cf0 <runtime_svc_init>: 6283 e044cf0: a9bb7bfd stp x29, x30, [sp, #-80]! 6284 e044cf4: 910003fd mov x29, sp 6285 e044cf8: a90153f3 stp x19, x20, [sp, #16] 6286 e044cfc: f0000013 adrp x19, e047000 <__TEXT_END__> 6287 e044d00: 911d4273 add x19, x19, #0x750 6288 e044d04: a9025bf5 stp x21, x22, [sp, #32] 6289 e044d08: f0000016 adrp x22, e047000 <__TEXT_END__> 6290 e044d0c: 911b42d6 add x22, x22, #0x6d0 6291 e044d10: cb160273 sub x19, x19, x22 6292 e044d14: a90363f7 stp x23, x24, [sp, #48] 6293 e044d18: f90023f9 str x25, [sp, #64] 6294 e044d1c: f1007e7f cmp x19, #0x1f 6295 e044d20: 540001a9 b.ls e044d54 <runtime_svc_init+0x64> // b.plast 6296 e044d24: f0000018 adrp x24, e047000 <__TEXT_END__> 6297 e044d28: d345fe73 lsr x19, x19, #5 6298 e044d2c: 910ef718 add x24, x24, #0x3bd 6299 e044d30: 52800015 mov w21, #0x0 // #0 6300 e044d34: d0000077 adrp x23, e052000 <opteed_sp_context+0xa00> 6301 e044d38: 913b72f7 add x23, x23, #0xedc 6302 e044d3c: aa1703e0 mov x0, x23 6303 e044d40: d2801002 mov x2, #0x80 // #128 6304 e044d44: 12800001 mov w1, #0xffffffff // #-1 6305 e044d48: 97fff647 bl e042664 <memset> 6306 e044d4c: eb35027f cmp x19, w21, uxtb 6307 e044d50: 540000e8 b.hi e044d6c <runtime_svc_init+0x7c> // b.pmore 6308 e044d54: a94153f3 ldp x19, x20, [sp, #16] 6309 e044d58: a9425bf5 ldp x21, x22, [sp, #32] 6310 e044d5c: a94363f7 ldp x23, x24, [sp, #48] 6311 e044d60: f94023f9 ldr x25, [sp, #64] 6312 e044d64: a8c57bfd ldp x29, x30, [sp], #80 6313 e044d68: d65f03c0 ret 6314 e044d6c: d37b1eb9 ubfiz x25, x21, #5, #8 6315 e044d70: 8b1902d4 add x20, x22, x25 6316 e044d74: 38796ac1 ldrb w1, [x22, x25] 6317 e044d78: 39400680 ldrb w0, [x20, #1] 6318 e044d7c: 6b00003f cmp w1, w0 6319 e044d80: 54000148 b.hi e044da8 <runtime_svc_init+0xb8> // b.pmore 6320 e044d84: 7100fc1f cmp w0, #0x3f 6321 e044d88: 54000108 b.hi e044da8 <runtime_svc_init+0xb8> // b.pmore 6322 e044d8c: 39400a80 ldrb w0, [x20, #2] 6323 e044d90: 7100041f cmp w0, #0x1 6324 e044d94: 540000a8 b.hi e044da8 <runtime_svc_init+0xb8> // b.pmore 6325 e044d98: f9400a80 ldr x0, [x20, #16] 6326 e044d9c: b5000120 cbnz x0, e044dc0 <runtime_svc_init+0xd0> 6327 e044da0: f9400e80 ldr x0, [x20, #24] 6328 e044da4: b50001e0 cbnz x0, e044de0 <runtime_svc_init+0xf0> 6329 e044da8: aa1403e1 mov x1, x20 6330 e044dac: f0000000 adrp x0, e047000 <__TEXT_END__> 6331 e044db0: 910e5400 add x0, x0, #0x395 6332 e044db4: 940000eb bl e045160 <tf_log> 6333 e044db8: 97fff335 bl e041a8c <console_flush> 6334 e044dbc: 97ffeef2 bl e040984 <do_panic> 6335 e044dc0: d63f0000 blr x0 6336 e044dc4: 340000e0 cbz w0, e044de0 <runtime_svc_init+0xf0> 6337 e044dc8: f9400681 ldr x1, [x20, #8] 6338 e044dcc: aa1803e0 mov x0, x24 6339 e044dd0: 940000e4 bl e045160 <tf_log> 6340 e044dd4: 110006b5 add w21, w21, #0x1 6341 e044dd8: 12001eb5 and w21, w21, #0xff 6342 e044ddc: 17ffffdc b e044d4c <runtime_svc_init+0x5c> 6343 e044de0: 39400a81 ldrb w1, [x20, #2] 6344 e044de4: 38796ac2 ldrb w2, [x22, x25] 6345 e044de8: 531a0023 ubfiz w3, w1, #6, #1 6346 e044dec: 39400681 ldrb w1, [x20, #1] 6347 e044df0: 12001442 and w2, w2, #0x3f 6348 e044df4: 2a030040 orr w0, w2, w3 6349 e044df8: 12001421 and w1, w1, #0x3f 6350 e044dfc: 2a0003e2 mov w2, w0 6351 e044e00: 2a030021 orr w1, w1, w3 6352 e044e04: 8b0002e0 add x0, x23, x0 6353 e044e08: 6b01005f cmp w2, w1 6354 e044e0c: 54fffe48 b.hi e044dd4 <runtime_svc_init+0xe4> // b.pmore 6355 e044e10: 11000442 add w2, w2, #0x1 6356 e044e14: 38001415 strb w21, [x0], #1 6357 e044e18: 12001c42 and w2, w2, #0xff 6358 e044e1c: 17fffffb b e044e08 <runtime_svc_init+0x118> 6359 6360000000000e044e20 <set_routing_model>: 6361 e044e20: a9be7bfd stp x29, x30, [sp, #-32]! 6362 e044e24: 910003fd mov x29, sp 6363 e044e28: a90153f3 stp x19, x20, [sp, #16] 6364 e044e2c: 2a0103f4 mov w20, w1 6365 e044e30: 2a0003f3 mov w19, w0 6366 e044e34: 721e7801 ands w1, w0, #0xfffffffd 6367 e044e38: 54000060 b.eq e044e44 <set_routing_model+0x24> // b.none 6368 e044e3c: 7100041f cmp w0, #0x1 6369 e044e40: 54000321 b.ne e044ea4 <set_routing_model+0x84> // b.any 6370 e044e44: 12000680 and w0, w20, #0x3 6371 e044e48: 350002b3 cbnz w19, e044e9c <set_routing_model+0x7c> 6372 e044e4c: 51000800 sub w0, w0, #0x2 6373 e044e50: 7100041f cmp w0, #0x1 6374 e044e54: 54000288 b.hi e044ea4 <set_routing_model+0x84> // b.pmore 6375 e044e58: d37b7e61 ubfiz x1, x19, #5, #32 6376 e044e5c: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 6377 e044e60: 912a2000 add x0, x0, #0xa88 6378 e044e64: 52800002 mov w2, #0x0 // #0 6379 e044e68: 8b010000 add x0, x0, x1 6380 e044e6c: 2a1403e1 mov w1, w20 6381 e044e70: b9001814 str w20, [x0, #24] 6382 e044e74: 2a1303e0 mov w0, w19 6383 e044e78: 94000010 bl e044eb8 <set_scr_el3_from_rm> 6384 e044e7c: 2a1303e0 mov w0, w19 6385 e044e80: 2a1403e1 mov w1, w20 6386 e044e84: 52800022 mov w2, #0x1 // #1 6387 e044e88: 9400000c bl e044eb8 <set_scr_el3_from_rm> 6388 e044e8c: 52800000 mov w0, #0x0 // #0 6389 e044e90: a94153f3 ldp x19, x20, [sp, #16] 6390 e044e94: a8c27bfd ldp x29, x30, [sp], #32 6391 e044e98: d65f03c0 ret 6392 e044e9c: 35000081 cbnz w1, e044eac <set_routing_model+0x8c> 6393 e044ea0: 360ffdd4 tbz w20, #1, e044e58 <set_routing_model+0x38> 6394 e044ea4: 128002a0 mov w0, #0xffffffea // #-22 6395 e044ea8: 17fffffa b e044e90 <set_routing_model+0x70> 6396 e044eac: 7100067f cmp w19, #0x1 6397 e044eb0: 54fffce0 b.eq e044e4c <set_routing_model+0x2c> // b.none 6398 e044eb4: 17fffffc b e044ea4 <set_routing_model+0x84> 6399 6400000000000e044eb8 <set_scr_el3_from_rm>: 6401 e044eb8: a9bd7bfd stp x29, x30, [sp, #-48]! 6402 e044ebc: 1ac22421 lsr w1, w1, w2 6403 e044ec0: 910003fd mov x29, sp 6404 e044ec4: a90153f3 stp x19, x20, [sp, #16] 6405 e044ec8: 2a0003f3 mov w19, w0 6406 e044ecc: 2a0203f4 mov w20, w2 6407 e044ed0: d37e7e73 ubfiz x19, x19, #2, #32 6408 e044ed4: a9025bf5 stp x21, x22, [sp, #32] 6409 e044ed8: 8b344273 add x19, x19, w20, uxtw 6410 e044edc: 12000035 and w21, w1, #0x1 6411 e044ee0: 2a0203e1 mov w1, w2 6412 e044ee4: 97fff8f4 bl e0432b4 <plat_interrupt_type_to_line> 6413 e044ee8: 2a0003f6 mov w22, w0 6414 e044eec: d0000060 adrp x0, e052000 <opteed_sp_context+0xa00> 6415 e044ef0: 912a2000 add x0, x0, #0xa88 6416 e044ef4: 8b130c13 add x19, x0, x19, lsl #3 6417 e044ef8: 2a1503e0 mov w0, w21 6418 e044efc: 9ad62000 lsl x0, x0, x22 6419 e044f00: f9000660 str x0, [x19, #8] 6420 e044f04: 2a1403e0 mov w0, w20 6421 e044f08: 97fff1da bl e041670 <cm_get_context> 6422 e044f0c: b4000100 cbz x0, e044f2c <set_scr_el3_from_rm+0x74> 6423 e044f10: 2a1503e2 mov w2, w21 6424 e044f14: 2a1603e1 mov w1, w22 6425 e044f18: 2a1403e0 mov w0, w20 6426 e044f1c: a94153f3 ldp x19, x20, [sp, #16] 6427 e044f20: a9425bf5 ldp x21, x22, [sp, #32] 6428 e044f24: a8c37bfd ldp x29, x30, [sp], #48 6429 e044f28: 17fff2c9 b e041a4c <cm_write_scr_el3_bit> 6430 e044f2c: a94153f3 ldp x19, x20, [sp, #16] 6431 e044f30: a9425bf5 ldp x21, x22, [sp, #32] 6432 e044f34: a8c37bfd ldp x29, x30, [sp], #48 6433 e044f38: d65f03c0 ret 6434 6435000000000e044f3c <setup_mmu_cfg>: 6436 e044f3c: 91000484 add x4, x4, #0x1 6437 e044f40: a9bf7bfd stp x29, x30, [sp, #-16]! 6438 e044f44: dac00087 rbit x7, x4 6439 e044f48: 910003fd mov x29, sp 6440 e044f4c: dac010e7 clz x7, x7 6441 e044f50: aa0003e6 mov x6, x0 6442 e044f54: 52800804 mov w4, #0x40 // #64 6443 e044f58: aa0303e0 mov x0, x3 6444 e044f5c: 4b070084 sub w4, w4, w7 6445 e044f60: 37080061 tbnz w1, #1, e044f6c <setup_mmu_cfg+0x30> 6446 e044f64: 5286a001 mov w1, #0x3500 // #13568 6447 e044f68: 2a010084 orr w4, w4, w1 6448 e044f6c: 93407c81 sxtw x1, w4 6449 e044f70: 94000069 bl e045114 <tcr_physical_addr_size_bits> 6450 e044f74: aa008023 orr x3, x1, x0, lsl #32 6451 e044f78: aa004021 orr x1, x1, x0, lsl #16 6452 e044f7c: b2690063 orr x3, x3, #0x800000 6453 e044f80: 710004bf cmp w5, #0x1 6454 e044f84: d2b01000 mov x0, #0x80800000 // #2155872256 6455 e044f88: aa000021 orr x1, x1, x0 6456 e044f8c: 9a831021 csel x1, x1, x3, ne // ne = any 6457 e044f90: d5380740 mrs x0, id_aa64mmfr2_el1 6458 e044f94: f2400c1f tst x0, #0xf 6459 e044f98: 54000040 b.eq e044fa0 <setup_mmu_cfg+0x64> // b.none 6460 e044f9c: b2400042 orr x2, x2, #0x1 6461 e044fa0: d2809fe0 mov x0, #0x4ff // #1279 6462 e044fa4: a8c17bfd ldp x29, x30, [sp], #16 6463 e044fa8: f2a00880 movk x0, #0x44, lsl #16 6464 e044fac: a90004c0 stp x0, x1, [x6] 6465 e044fb0: f90008c2 str x2, [x6, #16] 6466 e044fb4: d65f03c0 ret 6467 6468000000000e044fb8 <spe_drain_buffers_hook>: 6469 e044fb8: a9bf7bfd stp x29, x30, [sp, #-16]! 6470 e044fbc: 910003fd mov x29, sp 6471 e044fc0: 9400001b bl e04502c <spe_supported> 6472 e044fc4: 72001c1f tst w0, #0xff 6473 e044fc8: 540000c0 b.eq e044fe0 <spe_drain_buffers_hook+0x28> // b.none 6474 e044fcc: d503223f psb csync 6475 e044fd0: d503379f dsb nsh 6476 e044fd4: d2800000 mov x0, #0x0 // #0 6477 e044fd8: a8c17bfd ldp x29, x30, [sp], #16 6478 e044fdc: d65f03c0 ret 6479 e044fe0: 92800000 mov x0, #0xffffffffffffffff // #-1 6480 e044fe4: 17fffffd b e044fd8 <spe_drain_buffers_hook+0x20> 6481 6482000000000e044fe8 <spe_enable>: 6483 e044fe8: a9bf7bfd stp x29, x30, [sp, #-16]! 6484 e044fec: 12001c01 and w1, w0, #0xff 6485 e044ff0: 910003fd mov x29, sp 6486 e044ff4: 9400000e bl e04502c <spe_supported> 6487 e044ff8: 72001c1f tst w0, #0xff 6488 e044ffc: 54000140 b.eq e045024 <spe_enable+0x3c> // b.none 6489 e045000: 340000c1 cbz w1, e045018 <spe_enable+0x30> 6490 e045004: d53c1120 mrs x0, mdcr_el2 6491 e045008: 92407c00 and x0, x0, #0xffffffff 6492 e04500c: 9271f800 and x0, x0, #0xffffffffffffbfff 6493 e045010: b2740400 orr x0, x0, #0x3000 6494 e045014: d51c1120 msr mdcr_el2, x0 6495 e045018: d53e1320 mrs x0, mdcr_el3 6496 e04501c: b2740400 orr x0, x0, #0x3000 6497 e045020: d51e1320 msr mdcr_el3, x0 6498 e045024: a8c17bfd ldp x29, x30, [sp], #16 6499 e045028: d65f03c0 ret 6500 6501000000000e04502c <spe_supported>: 6502 e04502c: d5380500 mrs x0, id_aa64dfr0_el1 6503 e045030: f2600c1f tst x0, #0xf00000000 6504 e045034: 1a9f07e0 cset w0, ne // ne = any 6505 e045038: d65f03c0 ret 6506 6507000000000e04503c <std_svc_setup>: 6508 e04503c: a9bf7bfd stp x29, x30, [sp, #-16]! 6509 e045040: 529ffc00 mov w0, #0xffe0 // #65504 6510 e045044: 910003fd mov x29, sp 6511 e045048: 97fff300 bl e041c48 <get_arm_std_svc_args> 6512 e04504c: 97fffc6d bl e044200 <psci_setup> 6513 e045050: 7100001f cmp w0, #0x0 6514 e045054: 1a9f07e0 cset w0, ne // ne = any 6515 e045058: a8c17bfd ldp x29, x30, [sp], #16 6516 e04505c: d65f03c0 ret 6517 6518000000000e045060 <std_svc_smc_handler>: 6519 e045060: a9be7bfd stp x29, x30, [sp, #-32]! 6520 e045064: 910003fd mov x29, sp 6521 e045068: f9000bf3 str x19, [sp, #16] 6522 e04506c: aa0603f3 mov x19, x6 6523 e045070: 37f000a0 tbnz w0, #30, e045084 <std_svc_smc_handler+0x24> 6524 e045074: 92407c21 and x1, x1, #0xffffffff 6525 e045078: 92407c42 and x2, x2, #0xffffffff 6526 e04507c: 92407c63 and x3, x3, #0xffffffff 6527 e045080: 92407c84 and x4, x4, #0xffffffff 6528 e045084: 721b281f tst w0, #0xffe0 6529 e045088: 54000101 b.ne e0450a8 <std_svc_smc_handler+0x48> // b.any 6530 e04508c: aa1303e6 mov x6, x19 6531 e045090: 97fffd20 bl e044510 <psci_smc_handler> 6532 e045094: f9000260 str x0, [x19] 6533 e045098: aa1303e0 mov x0, x19 6534 e04509c: f9400bf3 ldr x19, [sp, #16] 6535 e0450a0: a8c27bfd ldp x29, x30, [sp], #32 6536 e0450a4: d65f03c0 ret 6537 e0450a8: 529fe021 mov w1, #0xff01 // #65281 6538 e0450ac: 72b08001 movk w1, #0x8400, lsl #16 6539 e0450b0: 6b01001f cmp w0, w1 6540 e0450b4: 54000120 b.eq e0450d8 <std_svc_smc_handler+0x78> // b.none 6541 e0450b8: 11000821 add w1, w1, #0x2 6542 e0450bc: 6b01001f cmp w0, w1 6543 e0450c0: 54000240 b.eq e045108 <std_svc_smc_handler+0xa8> // b.none 6544 e0450c4: 51000c21 sub w1, w1, #0x3 6545 e0450c8: 6b01001f cmp w0, w1 6546 e0450cc: d2800240 mov x0, #0x12 // #18 6547 e0450d0: da9f0000 csinv x0, x0, xzr, eq // eq = none 6548 e0450d4: 17fffff0 b e045094 <std_svc_smc_handler+0x34> 6549 e0450d8: d2882ac0 mov x0, #0x4156 // #16726 6550 e0450dc: f2bc5ec0 movk x0, #0xe2f6, lsl #16 6551 e0450e0: f9000e60 str x0, [x19, #24] 6552 e0450e4: d285b5c0 mov x0, #0x2dae // #11694 6553 e0450e8: f2bf7800 movk x0, #0xfbc0, lsl #16 6554 e0450ec: f9000a60 str x0, [x19, #16] 6555 e0450f0: d29f0c60 mov x0, #0xf863 // #63587 6556 e0450f4: f2a8fd00 movk x0, #0x47e8, lsl #16 6557 e0450f8: f9000660 str x0, [x19, #8] 6558 e0450fc: d2920b60 mov x0, #0x905b // #36955 6559 e045100: f2a211a0 movk x0, #0x108d, lsl #16 6560 e045104: 17ffffe4 b e045094 <std_svc_smc_handler+0x34> 6561 e045108: d2800020 mov x0, #0x1 // #1 6562 e04510c: a900027f stp xzr, x0, [x19] 6563 e045110: 17ffffe2 b e045098 <std_svc_smc_handler+0x38> 6564 6565000000000e045114 <tcr_physical_addr_size_bits>: 6566 e045114: f2540c1f tst x0, #0xf00000000000 6567 e045118: 54000141 b.ne e045140 <tcr_physical_addr_size_bits+0x2c> // b.any 6568 e04511c: f256041f tst x0, #0xc0000000000 6569 e045120: 54000141 b.ne e045148 <tcr_physical_addr_size_bits+0x34> // b.any 6570 e045124: f258041f tst x0, #0x30000000000 6571 e045128: 54000141 b.ne e045150 <tcr_physical_addr_size_bits+0x3c> // b.any 6572 e04512c: f25c0c1f tst x0, #0xf000000000 6573 e045130: 54000141 b.ne e045158 <tcr_physical_addr_size_bits+0x44> // b.any 6574 e045134: f2600c1f tst x0, #0xf00000000 6575 e045138: 9a9f07e0 cset x0, ne // ne = any 6576 e04513c: d65f03c0 ret 6577 e045140: d28000a0 mov x0, #0x5 // #5 6578 e045144: 17fffffe b e04513c <tcr_physical_addr_size_bits+0x28> 6579 e045148: d2800080 mov x0, #0x4 // #4 6580 e04514c: 17fffffc b e04513c <tcr_physical_addr_size_bits+0x28> 6581 e045150: d2800060 mov x0, #0x3 // #3 6582 e045154: 17fffffa b e04513c <tcr_physical_addr_size_bits+0x28> 6583 e045158: d2800040 mov x0, #0x2 // #2 6584 e04515c: 17fffff8 b e04513c <tcr_physical_addr_size_bits+0x28> 6585 6586000000000e045160 <tf_log>: 6587 e045160: a9b67bfd stp x29, x30, [sp, #-160]! 6588 e045164: 910003fd mov x29, sp 6589 e045168: a90153f3 stp x19, x20, [sp, #16] 6590 e04516c: aa0003f4 mov x20, x0 6591 e045170: a9068be1 stp x1, x2, [sp, #104] 6592 e045174: f0000001 adrp x1, e048000 <tf_xlat_ctx> 6593 e045178: a90793e3 stp x3, x4, [sp, #120] 6594 e04517c: b9406421 ldr w1, [x1, #100] 6595 e045180: a9089be5 stp x5, x6, [sp, #136] 6596 e045184: f9004fe7 str x7, [sp, #152] 6597 e045188: 39400000 ldrb w0, [x0] 6598 e04518c: 6b00003f cmp w1, w0 6599 e045190: 54000263 b.cc e0451dc <tf_log+0x7c> // b.lo, b.ul, b.last 6600 e045194: 97fff85c bl e043304 <plat_log_get_prefix> 6601 e045198: aa0003f3 mov x19, x0 6602 e04519c: 39400260 ldrb w0, [x19] 6603 e0451a0: 35000240 cbnz w0, e0451e8 <tf_log+0x88> 6604 e0451a4: 910283e0 add x0, sp, #0xa0 6605 e0451a8: a90403e0 stp x0, x0, [sp, #64] 6606 e0451ac: 910183e0 add x0, sp, #0x60 6607 e0451b0: f9002be0 str x0, [sp, #80] 6608 e0451b4: 128006e0 mov w0, #0xffffffc8 // #-56 6609 e0451b8: b9005be0 str w0, [sp, #88] 6610 e0451bc: b9005fff str wzr, [sp, #92] 6611 e0451c0: a94407e0 ldp x0, x1, [sp, #64] 6612 e0451c4: a90207e0 stp x0, x1, [sp, #32] 6613 e0451c8: a94507e0 ldp x0, x1, [sp, #80] 6614 e0451cc: a90307e0 stp x0, x1, [sp, #48] 6615 e0451d0: 910083e1 add x1, sp, #0x20 6616 e0451d4: 91000680 add x0, x20, #0x1 6617 e0451d8: 94000043 bl e0452e4 <vprintf> 6618 e0451dc: a94153f3 ldp x19, x20, [sp, #16] 6619 e0451e0: a8ca7bfd ldp x29, x30, [sp], #160 6620 e0451e4: d65f03c0 ret 6621 e0451e8: 91000673 add x19, x19, #0x1 6622 e0451ec: 97fffe08 bl e044a0c <putchar> 6623 e0451f0: 17ffffeb b e04519c <tf_log+0x3c> 6624 6625000000000e0451f4 <tf_log_newline>: 6626 e0451f4: f0000001 adrp x1, e048000 <tf_xlat_ctx> 6627 e0451f8: 39400000 ldrb w0, [x0] 6628 e0451fc: b9406421 ldr w1, [x1, #100] 6629 e045200: 6b00003f cmp w1, w0 6630 e045204: 54000063 b.cc e045210 <tf_log_newline+0x1c> // b.lo, b.ul, b.last 6631 e045208: 52800140 mov w0, #0xa // #10 6632 e04520c: 17fffe00 b e044a0c <putchar> 6633 e045210: d65f03c0 ret 6634 6635000000000e045214 <unsigned_num_print>: 6636 e045214: a9ba7bfd stp x29, x30, [sp, #-96]! 6637 e045218: 2a0103e1 mov w1, w1 6638 e04521c: 910003fd mov x29, sp 6639 e045220: a9025bf5 stp x21, x22, [sp, #32] 6640 e045224: 910123f5 add x21, sp, #0x48 6641 e045228: f9001bf7 str x23, [sp, #48] 6642 e04522c: 12001c57 and w23, w2, #0xff 6643 e045230: a90153f3 stp x19, x20, [sp, #16] 6644 e045234: 2a0303f3 mov w19, w3 6645 e045238: d2800003 mov x3, #0x0 // #0 6646 e04523c: 9ac10807 udiv x7, x0, x1 6647 e045240: 11000474 add w20, w3, #0x1 6648 e045244: 9b0180e6 msub x6, x7, x1, x0 6649 e045248: 12001cc4 and w4, w6, #0xff 6650 e04524c: f10024df cmp x6, #0x9 6651 e045250: 1100c085 add w5, w4, #0x30 6652 e045254: 11015c84 add w4, w4, #0x57 6653 e045258: 12001ca5 and w5, w5, #0xff 6654 e04525c: 12001c84 and w4, w4, #0xff 6655 e045260: 1a858084 csel w4, w4, w5, hi // hi = pmore 6656 e045264: 38356864 strb w4, [x3, x21] 6657 e045268: 91000463 add x3, x3, #0x1 6658 e04526c: eb00003f cmp x1, x0 6659 e045270: 540001c9 b.ls e0452a8 <unsigned_num_print+0x94> // b.plast 6660 e045274: 7100027f cmp w19, #0x0 6661 e045278: 540002cc b.gt e0452d0 <unsigned_num_print+0xbc> 6662 e04527c: 52800013 mov w19, #0x0 // #0 6663 e045280: 93407e96 sxtw x22, w20 6664 e045284: d10006d6 sub x22, x22, #0x1 6665 e045288: 310006df cmn w22, #0x1 6666 e04528c: 54000261 b.ne e0452d8 <unsigned_num_print+0xc4> // b.any 6667 e045290: 0b140260 add w0, w19, w20 6668 e045294: a94153f3 ldp x19, x20, [sp, #16] 6669 e045298: a9425bf5 ldp x21, x22, [sp, #32] 6670 e04529c: f9401bf7 ldr x23, [sp, #48] 6671 e0452a0: a8c67bfd ldp x29, x30, [sp], #96 6672 e0452a4: d65f03c0 ret 6673 e0452a8: aa0703e0 mov x0, x7 6674 e0452ac: 17ffffe4 b e04523c <unsigned_num_print+0x28> 6675 e0452b0: 510006d6 sub w22, w22, #0x1 6676 e0452b4: 2a1703e0 mov w0, w23 6677 e0452b8: 97fffdd5 bl e044a0c <putchar> 6678 e0452bc: 6b1402df cmp w22, w20 6679 e0452c0: 54ffff8c b.gt e0452b0 <unsigned_num_print+0x9c> 6680 e0452c4: 6b140260 subs w0, w19, w20 6681 e0452c8: 1a9fa013 csel w19, w0, wzr, ge // ge = tcont 6682 e0452cc: 17ffffed b e045280 <unsigned_num_print+0x6c> 6683 e0452d0: 2a1303f6 mov w22, w19 6684 e0452d4: 17fffffa b e0452bc <unsigned_num_print+0xa8> 6685 e0452d8: 38766aa0 ldrb w0, [x21, x22] 6686 e0452dc: 97fffdcc bl e044a0c <putchar> 6687 e0452e0: 17ffffe9 b e045284 <unsigned_num_print+0x70> 6688 6689000000000e0452e4 <vprintf>: 6690 e0452e4: a9b97bfd stp x29, x30, [sp, #-112]! 6691 e0452e8: 910003fd mov x29, sp 6692 e0452ec: a90153f3 stp x19, x20, [sp, #16] 6693 e0452f0: b9401834 ldr w20, [x1, #24] 6694 e0452f4: a90363f7 stp x23, x24, [sp, #48] 6695 e0452f8: a9405c33 ldp x19, x23, [x1] 6696 e0452fc: a9025bf5 stp x21, x22, [sp, #32] 6697 e045300: aa0003f6 mov x22, x0 6698 e045304: a9046bf9 stp x25, x26, [sp, #64] 6699 e045308: d000001a adrp x26, e047000 <__TEXT_END__> 6700 e04530c: 910ae35a add x26, x26, #0x2b8 6701 e045310: 52800015 mov w21, #0x0 // #0 6702 e045314: 52800019 mov w25, #0x0 // #0 6703 e045318: a90573fb stp x27, x28, [sp, #80] 6704 e04531c: 394002c0 ldrb w0, [x22] 6705 e045320: 35000120 cbnz w0, e045344 <vprintf+0x60> 6706 e045324: 2a1503e0 mov w0, w21 6707 e045328: a94153f3 ldp x19, x20, [sp, #16] 6708 e04532c: a9425bf5 ldp x21, x22, [sp, #32] 6709 e045330: a94363f7 ldp x23, x24, [sp, #48] 6710 e045334: a9446bf9 ldp x25, x26, [sp, #64] 6711 e045338: a94573fb ldp x27, x28, [sp, #80] 6712 e04533c: a8c77bfd ldp x29, x30, [sp], #112 6713 e045340: d65f03c0 ret 6714 e045344: 910006d6 add x22, x22, #0x1 6715 e045348: 7100941f cmp w0, #0x25 6716 e04534c: 54001c61 b.ne e0456d8 <vprintf+0x3f4> // b.any 6717 e045350: 52800018 mov w24, #0x0 // #0 6718 e045354: 52800001 mov w1, #0x0 // #0 6719 e045358: 14000002 b e045360 <vprintf+0x7c> 6720 e04535c: 52800619 mov w25, #0x30 // #48 6721 e045360: 394002c0 ldrb w0, [x22] 6722 e045364: 7101e81f cmp w0, #0x7a 6723 e045368: 540000e8 b.hi e045384 <vprintf+0xa0> // b.pmore 6724 e04536c: 71018c1f cmp w0, #0x63 6725 e045370: 540000e8 b.hi e04538c <vprintf+0xa8> // b.pmore 6726 e045374: 7100941f cmp w0, #0x25 6727 e045378: 54000180 b.eq e0453a8 <vprintf+0xc4> // b.none 6728 e04537c: 7100c01f cmp w0, #0x30 6729 e045380: 54001960 b.eq e0456ac <vprintf+0x3c8> // b.none 6730 e045384: 12800015 mov w21, #0xffffffff // #-1 6731 e045388: 17ffffe7 b e045324 <vprintf+0x40> 6732 e04538c: 51019000 sub w0, w0, #0x64 6733 e045390: 7100581f cmp w0, #0x16 6734 e045394: 54ffff88 b.hi e045384 <vprintf+0xa0> // b.pmore 6735 e045398: 78605b40 ldrh w0, [x26, w0, uxtw #1] 6736 e04539c: 10000062 adr x2, e0453a8 <vprintf+0xc4> 6737 e0453a0: 8b20a840 add x0, x2, w0, sxth #2 6738 e0453a4: d61f0000 br x0 6739 e0453a8: 97fffd99 bl e044a0c <putchar> 6740 e0453ac: 910006d6 add x22, x22, #0x1 6741 e0453b0: 17ffffdb b e04531c <vprintf+0x38> 6742 e0453b4: 7100043f cmp w1, #0x1 6743 e0453b8: 5400022d b.le e0453fc <vprintf+0x118> 6744 e0453bc: 37f802f4 tbnz w20, #31, e045418 <vprintf+0x134> 6745 e0453c0: 91003e60 add x0, x19, #0xf 6746 e0453c4: 2a1403e1 mov w1, w20 6747 e0453c8: 927df000 and x0, x0, #0xfffffffffffffff8 6748 e0453cc: f940027c ldr x28, [x19] 6749 e0453d0: 2a0103f4 mov w20, w1 6750 e0453d4: aa0003f3 mov x19, x0 6751 e0453d8: b6f8045c tbz x28, #63, e045460 <vprintf+0x17c> 6752 e0453dc: 528005a0 mov w0, #0x2d // #45 6753 e0453e0: 97fffd8b bl e044a0c <putchar> 6754 e0453e4: cb1c03e0 neg x0, x28 6755 e0453e8: 51000718 sub w24, w24, #0x1 6756 e0453ec: 2a1803e3 mov w3, w24 6757 e0453f0: 2a1903e2 mov w2, w25 6758 e0453f4: 52800141 mov w1, #0xa // #10 6759 e0453f8: 14000068 b e045598 <vprintf+0x2b4> 6760 e0453fc: 54fffe00 b.eq e0453bc <vprintf+0xd8> // b.none 6761 e045400: 37f801f4 tbnz w20, #31, e04543c <vprintf+0x158> 6762 e045404: 91002e60 add x0, x19, #0xb 6763 e045408: 2a1403e1 mov w1, w20 6764 e04540c: 927df000 and x0, x0, #0xfffffffffffffff8 6765 e045410: b980027c ldrsw x28, [x19] 6766 e045414: 17ffffef b e0453d0 <vprintf+0xec> 6767 e045418: 11002281 add w1, w20, #0x8 6768 e04541c: 7100003f cmp w1, #0x0 6769 e045420: 5400008d b.le e045430 <vprintf+0x14c> 6770 e045424: 91003e60 add x0, x19, #0xf 6771 e045428: 927df000 and x0, x0, #0xfffffffffffffff8 6772 e04542c: 17ffffe8 b e0453cc <vprintf+0xe8> 6773 e045430: aa1303e0 mov x0, x19 6774 e045434: 8b34c2f3 add x19, x23, w20, sxtw 6775 e045438: 17ffffe5 b e0453cc <vprintf+0xe8> 6776 e04543c: 11002281 add w1, w20, #0x8 6777 e045440: 7100003f cmp w1, #0x0 6778 e045444: 5400008d b.le e045454 <vprintf+0x170> 6779 e045448: 91002e60 add x0, x19, #0xb 6780 e04544c: 927df000 and x0, x0, #0xfffffffffffffff8 6781 e045450: 17fffff0 b e045410 <vprintf+0x12c> 6782 e045454: aa1303e0 mov x0, x19 6783 e045458: 8b34c2f3 add x19, x23, w20, sxtw 6784 e04545c: 17ffffed b e045410 <vprintf+0x12c> 6785 e045460: aa1c03e0 mov x0, x28 6786 e045464: 17ffffe2 b e0453ec <vprintf+0x108> 6787 e045468: 37f801f4 tbnz w20, #31, e0454a4 <vprintf+0x1c0> 6788 e04546c: 91003e78 add x24, x19, #0xf 6789 e045470: 2a1403fc mov w28, w20 6790 e045474: 927df318 and x24, x24, #0xfffffffffffffff8 6791 e045478: f9400274 ldr x20, [x19] 6792 e04547c: d2800013 mov x19, #0x0 // #0 6793 e045480: d1000694 sub x20, x20, #0x1 6794 e045484: 2a1303e1 mov w1, w19 6795 e045488: 91000673 add x19, x19, #0x1 6796 e04548c: 38736a80 ldrb w0, [x20, x19] 6797 e045490: 350001c0 cbnz w0, e0454c8 <vprintf+0x1e4> 6798 e045494: 0b0102b5 add w21, w21, w1 6799 e045498: 2a1c03f4 mov w20, w28 6800 e04549c: aa1803f3 mov x19, x24 6801 e0454a0: 17ffffc3 b e0453ac <vprintf+0xc8> 6802 e0454a4: 1100229c add w28, w20, #0x8 6803 e0454a8: 7100039f cmp w28, #0x0 6804 e0454ac: 5400008d b.le e0454bc <vprintf+0x1d8> 6805 e0454b0: 91003e78 add x24, x19, #0xf 6806 e0454b4: 927df318 and x24, x24, #0xfffffffffffffff8 6807 e0454b8: 17fffff0 b e045478 <vprintf+0x194> 6808 e0454bc: aa1303f8 mov x24, x19 6809 e0454c0: 8b34c2f3 add x19, x23, w20, sxtw 6810 e0454c4: 17ffffed b e045478 <vprintf+0x194> 6811 e0454c8: 97fffd51 bl e044a0c <putchar> 6812 e0454cc: 17ffffee b e045484 <vprintf+0x1a0> 6813 e0454d0: 37f801f4 tbnz w20, #31, e04550c <vprintf+0x228> 6814 e0454d4: 91003e7c add x28, x19, #0xf 6815 e0454d8: 2a1403fb mov w27, w20 6816 e0454dc: 927df39c and x28, x28, #0xfffffffffffffff8 6817 e0454e0: f9400265 ldr x5, [x19] 6818 e0454e4: b50003a5 cbnz x5, e045558 <vprintf+0x274> 6819 e0454e8: 2a1803e3 mov w3, w24 6820 e0454ec: 2a1903e2 mov w2, w25 6821 e0454f0: aa0503e0 mov x0, x5 6822 e0454f4: 52800201 mov w1, #0x10 // #16 6823 e0454f8: 2a1b03f4 mov w20, w27 6824 e0454fc: 97ffff46 bl e045214 <unsigned_num_print> 6825 e045500: aa1c03f3 mov x19, x28 6826 e045504: 0b0002b5 add w21, w21, w0 6827 e045508: 17ffffa9 b e0453ac <vprintf+0xc8> 6828 e04550c: 1100229b add w27, w20, #0x8 6829 e045510: 7100037f cmp w27, #0x0 6830 e045514: 5400008d b.le e045524 <vprintf+0x240> 6831 e045518: 91003e7c add x28, x19, #0xf 6832 e04551c: 927df39c and x28, x28, #0xfffffffffffffff8 6833 e045520: 17fffff0 b e0454e0 <vprintf+0x1fc> 6834 e045524: aa1303fc mov x28, x19 6835 e045528: 8b34c2f3 add x19, x23, w20, sxtw 6836 e04552c: 17ffffed b e0454e0 <vprintf+0x1fc> 6837 e045530: f90037e5 str x5, [sp, #104] 6838 e045534: 97fffd36 bl e044a0c <putchar> 6839 e045538: f94037e5 ldr x5, [sp, #104] 6840 e04553c: 2a1303e1 mov w1, w19 6841 e045540: 91000673 add x19, x19, #0x1 6842 e045544: 38746a60 ldrb w0, [x19, x20] 6843 e045548: 35ffff40 cbnz w0, e045530 <vprintf+0x24c> 6844 e04554c: 0b0102b5 add w21, w21, w1 6845 e045550: 51000b18 sub w24, w24, #0x2 6846 e045554: 17ffffe5 b e0454e8 <vprintf+0x204> 6847 e045558: d0000014 adrp x20, e047000 <__TEXT_END__> 6848 e04555c: d2800013 mov x19, #0x0 // #0 6849 e045560: 911b3294 add x20, x20, #0x6cc 6850 e045564: 17fffff6 b e04553c <vprintf+0x258> 6851 e045568: 7100043f cmp w1, #0x1 6852 e04556c: 540001cd b.le e0455a4 <vprintf+0x2c0> 6853 e045570: 37f80294 tbnz w20, #31, e0455c0 <vprintf+0x2dc> 6854 e045574: 91003e61 add x1, x19, #0xf 6855 e045578: 2a1403e2 mov w2, w20 6856 e04557c: 927df021 and x1, x1, #0xfffffffffffffff8 6857 e045580: f9400260 ldr x0, [x19] 6858 e045584: 2a0203f4 mov w20, w2 6859 e045588: 2a1803e3 mov w3, w24 6860 e04558c: 2a1903e2 mov w2, w25 6861 e045590: aa0103f3 mov x19, x1 6862 e045594: 52800201 mov w1, #0x10 // #16 6863 e045598: 97ffff1f bl e045214 <unsigned_num_print> 6864 e04559c: 0b0002b5 add w21, w21, w0 6865 e0455a0: 17ffff83 b e0453ac <vprintf+0xc8> 6866 e0455a4: 54fffe60 b.eq e045570 <vprintf+0x28c> // b.none 6867 e0455a8: 37f801f4 tbnz w20, #31, e0455e4 <vprintf+0x300> 6868 e0455ac: 91002e61 add x1, x19, #0xb 6869 e0455b0: 2a1403e2 mov w2, w20 6870 e0455b4: 927df021 and x1, x1, #0xfffffffffffffff8 6871 e0455b8: b9400260 ldr w0, [x19] 6872 e0455bc: 17fffff2 b e045584 <vprintf+0x2a0> 6873 e0455c0: 11002282 add w2, w20, #0x8 6874 e0455c4: 7100005f cmp w2, #0x0 6875 e0455c8: 5400008d b.le e0455d8 <vprintf+0x2f4> 6876 e0455cc: 91003e61 add x1, x19, #0xf 6877 e0455d0: 927df021 and x1, x1, #0xfffffffffffffff8 6878 e0455d4: 17ffffeb b e045580 <vprintf+0x29c> 6879 e0455d8: aa1303e1 mov x1, x19 6880 e0455dc: 8b34c2f3 add x19, x23, w20, sxtw 6881 e0455e0: 17ffffe8 b e045580 <vprintf+0x29c> 6882 e0455e4: 11002282 add w2, w20, #0x8 6883 e0455e8: 7100005f cmp w2, #0x0 6884 e0455ec: 5400008d b.le e0455fc <vprintf+0x318> 6885 e0455f0: 91002e61 add x1, x19, #0xb 6886 e0455f4: 927df021 and x1, x1, #0xfffffffffffffff8 6887 e0455f8: 17fffff0 b e0455b8 <vprintf+0x2d4> 6888 e0455fc: aa1303e1 mov x1, x19 6889 e045600: 8b34c2f3 add x19, x23, w20, sxtw 6890 e045604: 17ffffed b e0455b8 <vprintf+0x2d4> 6891 e045608: 910006d6 add x22, x22, #0x1 6892 e04560c: 52800041 mov w1, #0x2 // #2 6893 e045610: 17ffff54 b e045360 <vprintf+0x7c> 6894 e045614: 11000421 add w1, w1, #0x1 6895 e045618: 910006d6 add x22, x22, #0x1 6896 e04561c: 17ffff51 b e045360 <vprintf+0x7c> 6897 e045620: 7100043f cmp w1, #0x1 6898 e045624: 5400012d b.le e045648 <vprintf+0x364> 6899 e045628: 37f801f4 tbnz w20, #31, e045664 <vprintf+0x380> 6900 e04562c: 91003e61 add x1, x19, #0xf 6901 e045630: 2a1403e2 mov w2, w20 6902 e045634: 927df021 and x1, x1, #0xfffffffffffffff8 6903 e045638: f9400260 ldr x0, [x19] 6904 e04563c: 2a0203f4 mov w20, w2 6905 e045640: aa0103f3 mov x19, x1 6906 e045644: 17ffff6a b e0453ec <vprintf+0x108> 6907 e045648: 54ffff00 b.eq e045628 <vprintf+0x344> // b.none 6908 e04564c: 37f801f4 tbnz w20, #31, e045688 <vprintf+0x3a4> 6909 e045650: 91002e61 add x1, x19, #0xb 6910 e045654: 2a1403e2 mov w2, w20 6911 e045658: 927df021 and x1, x1, #0xfffffffffffffff8 6912 e04565c: b9400260 ldr w0, [x19] 6913 e045660: 17fffff7 b e04563c <vprintf+0x358> 6914 e045664: 11002282 add w2, w20, #0x8 6915 e045668: 7100005f cmp w2, #0x0 6916 e04566c: 5400008d b.le e04567c <vprintf+0x398> 6917 e045670: 91003e61 add x1, x19, #0xf 6918 e045674: 927df021 and x1, x1, #0xfffffffffffffff8 6919 e045678: 17fffff0 b e045638 <vprintf+0x354> 6920 e04567c: aa1303e1 mov x1, x19 6921 e045680: 8b34c2f3 add x19, x23, w20, sxtw 6922 e045684: 17ffffed b e045638 <vprintf+0x354> 6923 e045688: 11002282 add w2, w20, #0x8 6924 e04568c: 7100005f cmp w2, #0x0 6925 e045690: 5400008d b.le e0456a0 <vprintf+0x3bc> 6926 e045694: 91002e61 add x1, x19, #0xb 6927 e045698: 927df021 and x1, x1, #0xfffffffffffffff8 6928 e04569c: 17fffff0 b e04565c <vprintf+0x378> 6929 e0456a0: aa1303e1 mov x1, x19 6930 e0456a4: 8b34c2f3 add x19, x23, w20, sxtw 6931 e0456a8: 17ffffed b e04565c <vprintf+0x378> 6932 e0456ac: 910006d6 add x22, x22, #0x1 6933 e0456b0: 52800018 mov w24, #0x0 // #0 6934 e0456b4: 394002c0 ldrb w0, [x22] 6935 e0456b8: 5100c000 sub w0, w0, #0x30 6936 e0456bc: 12001c02 and w2, w0, #0xff 6937 e0456c0: 7100245f cmp w2, #0x9 6938 e0456c4: 54ffe4c8 b.hi e04535c <vprintf+0x78> // b.pmore 6939 e0456c8: 52800142 mov w2, #0xa // #10 6940 e0456cc: 910006d6 add x22, x22, #0x1 6941 e0456d0: 1b020318 madd w24, w24, w2, w0 6942 e0456d4: 17fffff8 b e0456b4 <vprintf+0x3d0> 6943 e0456d8: 110006b5 add w21, w21, #0x1 6944 e0456dc: 97fffccc bl e044a0c <putchar> 6945 e0456e0: 17ffff0f b e04531c <vprintf+0x38> 6946 6947000000000e0456e4 <xlat_arch_current_el>: 6948 e0456e4: d5384240 mrs x0, currentel 6949 e0456e8: 53020c00 ubfx w0, w0, #2, #2 6950 e0456ec: d65f03c0 ret 6951 6952000000000e0456f0 <xlat_arch_get_pas>: 6953 e0456f0: 121c0400 and w0, w0, #0x30 6954 e0456f4: 7100401f cmp w0, #0x10 6955 e0456f8: 1a9f17e0 cset w0, eq // eq = none 6956 e0456fc: 531b6800 lsl w0, w0, #5 6957 e045700: d65f03c0 ret 6958 6959000000000e045704 <xlat_arch_regime_get_xn_desc>: 6960 e045704: 7100041f cmp w0, #0x1 6961 e045708: d2e00c01 mov x1, #0x60000000000000 // #27021597764222976 6962 e04570c: d2e00800 mov x0, #0x40000000000000 // #18014398509481984 6963 e045710: 9a800020 csel x0, x1, x0, eq // eq = none 6964 e045714: d65f03c0 ret 6965 6966000000000e045718 <xlat_clean_dcache_range>: 6967 e045718: a9be7bfd stp x29, x30, [sp, #-32]! 6968 e04571c: 910003fd mov x29, sp 6969 e045720: a90153f3 stp x19, x20, [sp, #16] 6970 e045724: aa0003f3 mov x19, x0 6971 e045728: aa0103f4 mov x20, x1 6972 e04572c: 97fff3b6 bl e042604 <is_dcache_enabled> 6973 e045730: 72001c1f tst w0, #0xff 6974 e045734: 540000c0 b.eq e04574c <xlat_clean_dcache_range+0x34> // b.none 6975 e045738: aa1403e1 mov x1, x20 6976 e04573c: aa1303e0 mov x0, x19 6977 e045740: a94153f3 ldp x19, x20, [sp, #16] 6978 e045744: a8c27bfd ldp x29, x30, [sp], #32 6979 e045748: 17ffeb43 b e040454 <clean_dcache_range> 6980 e04574c: a94153f3 ldp x19, x20, [sp, #16] 6981 e045750: a8c27bfd ldp x29, x30, [sp], #32 6982 e045754: d65f03c0 ret 6983 6984000000000e045758 <xlat_desc>: 6985 e045758: a9bd7bfd stp x29, x30, [sp, #-48]! 6986 e04575c: 71000c7f cmp w3, #0x3 6987 e045760: 910003fd mov x29, sp 6988 e045764: a90153f3 stp x19, x20, [sp, #16] 6989 e045768: 2a0103f4 mov w20, w1 6990 e04576c: d2800073 mov x19, #0x3 // #3 6991 e045770: 9a9f0673 csinc x19, x19, xzr, eq // eq = none 6992 e045774: a9025bf5 stp x21, x22, [sp, #32] 6993 e045778: aa020275 orr x21, x19, x2 6994 e04577c: aa0003f6 mov x22, x0 6995 e045780: 2a0103e0 mov w0, w1 6996 e045784: 97ffffdb bl e0456f0 <xlat_arch_get_pas> 6997 e045788: 2a0003e0 mov w0, w0 6998 e04578c: f27d029f tst x20, #0x8 6999 e045790: 9a9f17f3 cset x19, eq // eq = none 7000 e045794: aa131c13 orr x19, x0, x19, lsl #7 7001 e045798: b9405ac0 ldr w0, [x22, #88] 7002 e04579c: aa150273 orr x19, x19, x21 7003 e0457a0: 7100041f cmp w0, #0x1 7004 e0457a4: 54000221 b.ne e0457e8 <xlat_desc+0x90> // b.any 7005 e0457a8: b2760262 orr x2, x19, #0x400 7006 e0457ac: f279029f tst x20, #0x80 7007 e0457b0: d2808801 mov x1, #0x440 // #1088 7008 e0457b4: aa010273 orr x19, x19, x1 7009 e0457b8: 9a821273 csel x19, x19, x2, ne // ne = any 7010 e0457bc: 72000a95 ands w21, w20, #0x7 7011 e0457c0: 540001a1 b.ne e0457f4 <xlat_desc+0x9c> // b.any 7012 e0457c4: 97ffffd0 bl e045704 <xlat_arch_regime_get_xn_desc> 7013 e0457c8: aa000273 orr x19, x19, x0 7014 e0457cc: d2804082 mov x2, #0x204 // #516 7015 e0457d0: aa020273 orr x19, x19, x2 7016 e0457d4: aa1303e0 mov x0, x19 7017 e0457d8: a94153f3 ldp x19, x20, [sp, #16] 7018 e0457dc: a9425bf5 ldp x21, x22, [sp, #32] 7019 e0457e0: a8c37bfd ldp x29, x30, [sp], #48 7020 e0457e4: d65f03c0 ret 7021 e0457e8: d2808802 mov x2, #0x440 // #1088 7022 e0457ec: aa020273 orr x19, x19, x2 7023 e0457f0: 17fffff3 b e0457bc <xlat_desc+0x64> 7024 e0457f4: 52800901 mov w1, #0x48 // #72 7025 e0457f8: 6a01029f tst w20, w1 7026 e0457fc: 54000060 b.eq e045808 <xlat_desc+0xb0> // b.none 7027 e045800: 97ffffc1 bl e045704 <xlat_arch_regime_get_xn_desc> 7028 e045804: aa000273 orr x19, x19, x0 7029 e045808: 71000abf cmp w21, #0x2 7030 e04580c: 54000121 b.ne e045830 <xlat_desc+0xd8> // b.any 7031 e045810: 12180694 and w20, w20, #0x300 7032 e045814: 710c029f cmp w20, #0x300 7033 e045818: 54fffde0 b.eq e0457d4 <xlat_desc+0x7c> // b.none 7034 e04581c: b2770260 orr x0, x19, #0x200 7035 e045820: 7108029f cmp w20, #0x200 7036 e045824: b2780673 orr x19, x19, #0x300 7037 e045828: 9a801273 csel x19, x19, x0, ne // ne = any 7038 e04582c: 17ffffea b e0457d4 <xlat_desc+0x7c> 7039 e045830: d2804100 mov x0, #0x208 // #520 7040 e045834: aa000273 orr x19, x19, x0 7041 e045838: 17ffffe7 b e0457d4 <xlat_desc+0x7c> 7042 7043000000000e04583c <xlat_mmap_print>: 7044 e04583c: d65f03c0 ret 7045 7046000000000e045840 <xlat_tables_map_region>: 7047 e045840: a9b77bfd stp x29, x30, [sp, #-144]! 7048 e045844: 910003fd mov x29, sp 7049 e045848: a9025bf5 stp x21, x22, [sp, #32] 7050 e04584c: 92800016 mov x22, #0xffffffffffffffff // #-1 7051 e045850: a90573fb stp x27, x28, [sp, #80] 7052 e045854: aa0003fb mov x27, x0 7053 e045858: 2a0503fc mov w28, w5 7054 e04585c: a940d420 ldp x0, x21, [x1, #8] 7055 e045860: a90153f3 stp x19, x20, [sp, #16] 7056 e045864: 12800114 mov w20, #0xfffffff7 // #-9 7057 e045868: a90363f7 stp x23, x24, [sp, #48] 7058 e04586c: d2800037 mov x23, #0x1 // #1 7059 e045870: 1b147cb4 mul w20, w5, w20 7060 e045874: a9046bf9 stp x25, x26, [sp, #64] 7061 e045878: aa0103fa mov x26, x1 7062 e04587c: 11009e94 add w20, w20, #0x27 7063 e045880: 8b150015 add x21, x0, x21 7064 e045884: eb02001f cmp x0, x2 7065 e045888: d10006a1 sub x1, x21, #0x1 7066 e04588c: f9003be1 str x1, [sp, #112] 7067 e045890: 9ad422e1 lsl x1, x23, x20 7068 e045894: cb0103f3 neg x19, x1 7069 e045898: 8a000273 and x19, x19, x0 7070 e04589c: 110004b7 add w23, w5, #0x1 7071 e0458a0: 9a828273 csel x19, x19, x2, hi // hi = pmore 7072 e0458a4: 9ad422d6 lsl x22, x22, x20 7073 e0458a8: cb020266 sub x6, x19, x2 7074 e0458ac: aa1303f8 mov x24, x19 7075 e0458b0: aa3603e0 mvn x0, x22 7076 e0458b4: f90037e1 str x1, [sp, #104] 7077 e0458b8: 9ad424c6 lsr x6, x6, x20 7078 e0458bc: f9003fe0 str x0, [sp, #120] 7079 e0458c0: 8b264c75 add x21, x3, w6, uxtw #3 7080 e0458c4: b90083e6 str w6, [sp, #128] 7081 e0458c8: b90087e4 str w4, [sp, #132] 7082 e0458cc: 295007e0 ldp w0, w1, [sp, #128] 7083 e0458d0: 6b01001f cmp w0, w1 7084 e0458d4: 540003c2 b.cs e04594c <xlat_tables_map_region+0x10c> // b.hs, b.nlast 7085 e0458d8: a9408744 ldp x4, x1, [x26, #8] 7086 e0458dc: f94037e2 ldr x2, [sp, #104] 7087 e0458e0: f94002a3 ldr x3, [x21] 7088 e0458e4: 8b020279 add x25, x19, x2 7089 e0458e8: 8b010081 add x1, x4, x1 7090 e0458ec: eb18009f cmp x4, x24 7091 e0458f0: 12000460 and w0, w3, #0x3 7092 e0458f4: d1000421 sub x1, x1, #0x1 7093 e0458f8: d1000736 sub x22, x25, #0x1 7094 e0458fc: 540007e8 b.hi e0459f8 <xlat_tables_map_region+0x1b8> // b.pmore 7095 e045900: eb0102df cmp x22, x1 7096 e045904: 540007a8 b.hi e0459f8 <xlat_tables_map_region+0x1b8> // b.pmore 7097 e045908: f9400342 ldr x2, [x26] 7098 e04590c: cb040042 sub x2, x2, x4 7099 e045910: 8b130042 add x2, x2, x19 7100 e045914: 71000f9f cmp w28, #0x3 7101 e045918: 540001e1 b.ne e045954 <xlat_tables_map_region+0x114> // b.any 7102 e04591c: 71000c1f cmp w0, #0x3 7103 e045920: 54000941 b.ne e045a48 <xlat_tables_map_region+0x208> // b.any 7104 e045924: b94083e0 ldr w0, [sp, #128] 7105 e045928: 910022b5 add x21, x21, #0x8 7106 e04592c: aa1903f3 mov x19, x25 7107 e045930: 11000400 add w0, w0, #0x1 7108 e045934: b90083e0 str w0, [sp, #128] 7109 e045938: f94037e0 ldr x0, [sp, #104] 7110 e04593c: 8b000318 add x24, x24, x0 7111 e045940: f9403be0 ldr x0, [sp, #112] 7112 e045944: eb19001f cmp x0, x25 7113 e045948: 54fffc28 b.hi e0458cc <xlat_tables_map_region+0x8c> // b.pmore 7114 e04594c: d1000673 sub x19, x19, #0x1 7115 e045950: 14000022 b e0459d8 <xlat_tables_map_region+0x198> 7116 e045954: 71000c1f cmp w0, #0x3 7117 e045958: 540005a0 b.eq e045a0c <xlat_tables_map_region+0x1cc> // b.none 7118 e04595c: 35fffe40 cbnz w0, e045924 <xlat_tables_map_region+0xe4> 7119 e045960: f9403fe0 ldr x0, [sp, #120] 7120 e045964: ea00005f tst x2, x0 7121 e045968: 540000a1 b.ne e04597c <xlat_tables_map_region+0x13c> // b.any 7122 e04596c: 3400009c cbz w28, e04597c <xlat_tables_map_region+0x13c> 7123 e045970: f9401340 ldr x0, [x26, #32] 7124 e045974: 9ad42400 lsr x0, x0, x20 7125 e045978: b5000680 cbnz x0, e045a48 <xlat_tables_map_region+0x208> 7126 e04597c: b9402f60 ldr w0, [x27, #44] 7127 e045980: f9401363 ldr x3, [x27, #32] 7128 e045984: 11000401 add w1, w0, #0x1 7129 e045988: b9002f61 str w1, [x27, #44] 7130 e04598c: 93747c00 sbfiz x0, x0, #12, #32 7131 e045990: ab000063 adds x3, x3, x0 7132 e045994: 54000220 b.eq e0459d8 <xlat_tables_map_region+0x198> // b.none 7133 e045998: b2400460 orr x0, x3, #0x3 7134 e04599c: f90002a0 str x0, [x21] 7135 e0459a0: aa1303e2 mov x2, x19 7136 e0459a4: 2a1703e5 mov w5, w23 7137 e0459a8: aa1a03e1 mov x1, x26 7138 e0459ac: 52804004 mov w4, #0x200 // #512 7139 e0459b0: aa1b03e0 mov x0, x27 7140 e0459b4: f90047e3 str x3, [sp, #136] 7141 e0459b8: 97ffffa2 bl e045840 <xlat_tables_map_region> 7142 e0459bc: aa0003f3 mov x19, x0 7143 e0459c0: f94047e3 ldr x3, [sp, #136] 7144 e0459c4: d2820001 mov x1, #0x1000 // #4096 7145 e0459c8: aa0303e0 mov x0, x3 7146 e0459cc: 97ffff53 bl e045718 <xlat_clean_dcache_range> 7147 e0459d0: eb1302df cmp x22, x19 7148 e0459d4: 54fffa80 b.eq e045924 <xlat_tables_map_region+0xe4> // b.none 7149 e0459d8: aa1303e0 mov x0, x19 7150 e0459dc: a94153f3 ldp x19, x20, [sp, #16] 7151 e0459e0: a9425bf5 ldp x21, x22, [sp, #32] 7152 e0459e4: a94363f7 ldp x23, x24, [sp, #48] 7153 e0459e8: a9446bf9 ldp x25, x26, [sp, #64] 7154 e0459ec: a94573fb ldp x27, x28, [sp, #80] 7155 e0459f0: a8c97bfd ldp x29, x30, [sp], #144 7156 e0459f4: d65f03c0 ret 7157 e0459f8: eb16009f cmp x4, x22 7158 e0459fc: 54000069 b.ls e045a08 <xlat_tables_map_region+0x1c8> // b.plast 7159 e045a00: eb01031f cmp x24, x1 7160 e045a04: 54fff908 b.hi e045924 <xlat_tables_map_region+0xe4> // b.pmore 7161 e045a08: 34fffba0 cbz w0, e04597c <xlat_tables_map_region+0x13c> 7162 e045a0c: 92748c63 and x3, x3, #0xfffffffff000 7163 e045a10: aa1303e2 mov x2, x19 7164 e045a14: 2a1703e5 mov w5, w23 7165 e045a18: aa1a03e1 mov x1, x26 7166 e045a1c: 52804004 mov w4, #0x200 // #512 7167 e045a20: aa1b03e0 mov x0, x27 7168 e045a24: f90047e3 str x3, [sp, #136] 7169 e045a28: 97ffff86 bl e045840 <xlat_tables_map_region> 7170 e045a2c: f94047e3 ldr x3, [sp, #136] 7171 e045a30: aa0003f3 mov x19, x0 7172 e045a34: d2820001 mov x1, #0x1000 // #4096 7173 e045a38: aa0303e0 mov x0, x3 7174 e045a3c: 97ffff37 bl e045718 <xlat_clean_dcache_range> 7175 e045a40: eb16027f cmp x19, x22 7176 e045a44: 17ffffe4 b e0459d4 <xlat_tables_map_region+0x194> 7177 e045a48: b9401b41 ldr w1, [x26, #24] 7178 e045a4c: 2a1c03e3 mov w3, w28 7179 e045a50: aa1b03e0 mov x0, x27 7180 e045a54: 97ffff41 bl e045758 <xlat_desc> 7181 e045a58: f90002a0 str x0, [x21] 7182 e045a5c: 17ffffb2 b e045924 <xlat_tables_map_region+0xe4> 7183 7184000000000e045a60 <xlat_tables_print>: 7185 e045a60: d65f03c0 ret 7186 ... 7187 7188000000000e046000 <sync_exception_sp_el0>: 7189 e046000: 17ffebed b e040fb4 <report_unhandled_exception> 7190 ... 7191 7192000000000e046080 <irq_sp_el0>: 7193 e046080: 17ffebcd b e040fb4 <report_unhandled_exception> 7194 ... 7195 7196000000000e046100 <fiq_sp_el0>: 7197 e046100: 17ffebad b e040fb4 <report_unhandled_exception> 7198 ... 7199 7200000000000e046180 <serror_sp_el0>: 7201 e046180: 97ffeb3b bl e040e6c <plat_handle_el3_ea> 7202 ... 7203 7204000000000e046200 <sync_exception_sp_elx>: 7205 e046200: 17ffeb6d b e040fb4 <report_unhandled_exception> 7206 ... 7207 7208000000000e046280 <irq_sp_elx>: 7209 e046280: 17ffeb4d b e040fb4 <report_unhandled_exception> 7210 ... 7211 7212000000000e046300 <fiq_sp_elx>: 7213 e046300: 17ffeb2d b e040fb4 <report_unhandled_exception> 7214 ... 7215 7216000000000e046380 <serror_sp_elx>: 7217 e046380: f9007bfe str x30, [sp, #240] 7218 e046384: f9409bfe ldr x30, [sp, #304] 7219 e046388: b500005e cbnz x30, e046390 <exp_from_EL3> 7220 e04638c: 17ffea36 b e040c64 <handle_lower_el_async_ea> 7221 7222000000000e046390 <exp_from_EL3>: 7223 e046390: 97ffeab7 bl e040e6c <plat_handle_el3_ea> 7224 ... 7225 7226000000000e046400 <sync_exception_aarch64>: 7227 e046400: d5033f9f dsb sy 7228 e046404: d50344ff msr daifclr, #0x4 7229 e046408: d5033fdf isb 7230 e04640c: f9007bfe str x30, [sp, #240] 7231 e046410: d280003e mov x30, #0x1 // #1 7232 e046414: f9009bfe str x30, [sp, #304] 7233 e046418: d5033fbf dmb sy 7234 e04641c: d53e521e mrs x30, esr_el3 7235 e046420: d35a7fde ubfx x30, x30, #26, #6 7236 e046424: f1004fdf cmp x30, #0x13 7237 e046428: 54fd64e0 b.eq e0410c4 <smc_handler> // b.none 7238 e04642c: f1005fdf cmp x30, #0x17 7239 e046430: 54fd64c0 b.eq e0410c8 <smc_handler64> // b.none 7240 e046434: f9407bfe ldr x30, [sp, #240] 7241 e046438: 17ffea11 b e040c7c <enter_lower_el_sync_ea> 7242 ... 7243 7244000000000e046480 <irq_aarch64>: 7245 e046480: d5033f9f dsb sy 7246 e046484: d50344ff msr daifclr, #0x4 7247 e046488: d5033fdf isb 7248 e04648c: f9007bfe str x30, [sp, #240] 7249 e046490: d280003e mov x30, #0x1 // #1 7250 e046494: f9009bfe str x30, [sp, #304] 7251 e046498: d5033fbf dmb sy 7252 e04649c: 97ffeaeb bl e041048 <save_gp_pmcr_pauth_regs> 7253 e0464a0: d53e4000 mrs x0, spsr_el3 7254 e0464a4: d53e4021 mrs x1, elr_el3 7255 e0464a8: a91187e0 stp x0, x1, [sp, #280] 7256 e0464ac: f9408be2 ldr x2, [sp, #272] 7257 e0464b0: 910003f4 mov x20, sp 7258 e0464b4: d50040bf msr spsel, #0x0 7259 e0464b8: 9100005f mov sp, x2 7260 e0464bc: 97fff371 bl e043280 <plat_ic_get_pending_interrupt_type> 7261 e0464c0: f1000c1f cmp x0, #0x3 7262 e0464c4: 54000140 b.eq e0464ec <interrupt_exit_irq_aarch64> // b.none 7263 e0464c8: 97ffede3 bl e041c54 <get_interrupt_type_handler> 7264 e0464cc: b4000100 cbz x0, e0464ec <interrupt_exit_irq_aarch64> 7265 e0464d0: aa0003f5 mov x21, x0 7266 e0464d4: b2407fe0 mov x0, #0xffffffff // #4294967295 7267 e0464d8: d53e1102 mrs x2, scr_el3 7268 e0464dc: d3400041 ubfx x1, x2, #0, #1 7269 e0464e0: aa1403e2 mov x2, x20 7270 e0464e4: aa1f03e3 mov x3, xzr 7271 e0464e8: d63f02a0 blr x21 7272 7273000000000e0464ec <interrupt_exit_irq_aarch64>: 7274 e0464ec: 17ffe9b2 b e040bb4 <el3_exit> 7275 ... 7276 7277000000000e046500 <fiq_aarch64>: 7278 e046500: d5033f9f dsb sy 7279 e046504: d50344ff msr daifclr, #0x4 7280 e046508: d5033fdf isb 7281 e04650c: f9007bfe str x30, [sp, #240] 7282 e046510: d280003e mov x30, #0x1 // #1 7283 e046514: f9009bfe str x30, [sp, #304] 7284 e046518: d5033fbf dmb sy 7285 e04651c: 97ffeacb bl e041048 <save_gp_pmcr_pauth_regs> 7286 e046520: d53e4000 mrs x0, spsr_el3 7287 e046524: d53e4021 mrs x1, elr_el3 7288 e046528: a91187e0 stp x0, x1, [sp, #280] 7289 e04652c: f9408be2 ldr x2, [sp, #272] 7290 e046530: 910003f4 mov x20, sp 7291 e046534: d50040bf msr spsel, #0x0 7292 e046538: 9100005f mov sp, x2 7293 e04653c: 97fff351 bl e043280 <plat_ic_get_pending_interrupt_type> 7294 e046540: f1000c1f cmp x0, #0x3 7295 e046544: 54000140 b.eq e04656c <interrupt_exit_fiq_aarch64> // b.none 7296 e046548: 97ffedc3 bl e041c54 <get_interrupt_type_handler> 7297 e04654c: b4000100 cbz x0, e04656c <interrupt_exit_fiq_aarch64> 7298 e046550: aa0003f5 mov x21, x0 7299 e046554: b2407fe0 mov x0, #0xffffffff // #4294967295 7300 e046558: d53e1102 mrs x2, scr_el3 7301 e04655c: d3400041 ubfx x1, x2, #0, #1 7302 e046560: aa1403e2 mov x2, x20 7303 e046564: aa1f03e3 mov x3, xzr 7304 e046568: d63f02a0 blr x21 7305 7306000000000e04656c <interrupt_exit_fiq_aarch64>: 7307 e04656c: 17ffe992 b e040bb4 <el3_exit> 7308 ... 7309 7310000000000e046580 <serror_aarch64>: 7311 e046580: d5033f9f dsb sy 7312 e046584: d50344ff msr daifclr, #0x4 7313 e046588: d5033fdf isb 7314 e04658c: f9007bfe str x30, [sp, #240] 7315 e046590: d280003e mov x30, #0x1 // #1 7316 e046594: f9009bfe str x30, [sp, #304] 7317 e046598: d5033fbf dmb sy 7318 e04659c: 17ffe9b2 b e040c64 <handle_lower_el_async_ea> 7319 ... 7320 7321000000000e046600 <sync_exception_aarch32>: 7322 e046600: d5033f9f dsb sy 7323 e046604: d50344ff msr daifclr, #0x4 7324 e046608: d5033fdf isb 7325 e04660c: f9007bfe str x30, [sp, #240] 7326 e046610: d280003e mov x30, #0x1 // #1 7327 e046614: f9009bfe str x30, [sp, #304] 7328 e046618: d5033fbf dmb sy 7329 e04661c: d53e521e mrs x30, esr_el3 7330 e046620: d35a7fde ubfx x30, x30, #26, #6 7331 e046624: f1004fdf cmp x30, #0x13 7332 e046628: 54fd54e0 b.eq e0410c4 <smc_handler> // b.none 7333 e04662c: f1005fdf cmp x30, #0x17 7334 e046630: 54fd54c0 b.eq e0410c8 <smc_handler64> // b.none 7335 e046634: f9407bfe ldr x30, [sp, #240] 7336 e046638: 17ffe991 b e040c7c <enter_lower_el_sync_ea> 7337 ... 7338 7339000000000e046680 <irq_aarch32>: 7340 e046680: d5033f9f dsb sy 7341 e046684: d50344ff msr daifclr, #0x4 7342 e046688: d5033fdf isb 7343 e04668c: f9007bfe str x30, [sp, #240] 7344 e046690: d280003e mov x30, #0x1 // #1 7345 e046694: f9009bfe str x30, [sp, #304] 7346 e046698: d5033fbf dmb sy 7347 e04669c: 97ffea6b bl e041048 <save_gp_pmcr_pauth_regs> 7348 e0466a0: d53e4000 mrs x0, spsr_el3 7349 e0466a4: d53e4021 mrs x1, elr_el3 7350 e0466a8: a91187e0 stp x0, x1, [sp, #280] 7351 e0466ac: f9408be2 ldr x2, [sp, #272] 7352 e0466b0: 910003f4 mov x20, sp 7353 e0466b4: d50040bf msr spsel, #0x0 7354 e0466b8: 9100005f mov sp, x2 7355 e0466bc: 97fff2f1 bl e043280 <plat_ic_get_pending_interrupt_type> 7356 e0466c0: f1000c1f cmp x0, #0x3 7357 e0466c4: 54000140 b.eq e0466ec <interrupt_exit_irq_aarch32> // b.none 7358 e0466c8: 97ffed63 bl e041c54 <get_interrupt_type_handler> 7359 e0466cc: b4000100 cbz x0, e0466ec <interrupt_exit_irq_aarch32> 7360 e0466d0: aa0003f5 mov x21, x0 7361 e0466d4: b2407fe0 mov x0, #0xffffffff // #4294967295 7362 e0466d8: d53e1102 mrs x2, scr_el3 7363 e0466dc: d3400041 ubfx x1, x2, #0, #1 7364 e0466e0: aa1403e2 mov x2, x20 7365 e0466e4: aa1f03e3 mov x3, xzr 7366 e0466e8: d63f02a0 blr x21 7367 7368000000000e0466ec <interrupt_exit_irq_aarch32>: 7369 e0466ec: 17ffe932 b e040bb4 <el3_exit> 7370 ... 7371 7372000000000e046700 <fiq_aarch32>: 7373 e046700: d5033f9f dsb sy 7374 e046704: d50344ff msr daifclr, #0x4 7375 e046708: d5033fdf isb 7376 e04670c: f9007bfe str x30, [sp, #240] 7377 e046710: d280003e mov x30, #0x1 // #1 7378 e046714: f9009bfe str x30, [sp, #304] 7379 e046718: d5033fbf dmb sy 7380 e04671c: 97ffea4b bl e041048 <save_gp_pmcr_pauth_regs> 7381 e046720: d53e4000 mrs x0, spsr_el3 7382 e046724: d53e4021 mrs x1, elr_el3 7383 e046728: a91187e0 stp x0, x1, [sp, #280] 7384 e04672c: f9408be2 ldr x2, [sp, #272] 7385 e046730: 910003f4 mov x20, sp 7386 e046734: d50040bf msr spsel, #0x0 7387 e046738: 9100005f mov sp, x2 7388 e04673c: 97fff2d1 bl e043280 <plat_ic_get_pending_interrupt_type> 7389 e046740: f1000c1f cmp x0, #0x3 7390 e046744: 54000140 b.eq e04676c <interrupt_exit_fiq_aarch32> // b.none 7391 e046748: 97ffed43 bl e041c54 <get_interrupt_type_handler> 7392 e04674c: b4000100 cbz x0, e04676c <interrupt_exit_fiq_aarch32> 7393 e046750: aa0003f5 mov x21, x0 7394 e046754: b2407fe0 mov x0, #0xffffffff // #4294967295 7395 e046758: d53e1102 mrs x2, scr_el3 7396 e04675c: d3400041 ubfx x1, x2, #0, #1 7397 e046760: aa1403e2 mov x2, x20 7398 e046764: aa1f03e3 mov x3, xzr 7399 e046768: d63f02a0 blr x21 7400 7401000000000e04676c <interrupt_exit_fiq_aarch32>: 7402 e04676c: 17ffe912 b e040bb4 <el3_exit> 7403 ... 7404 7405000000000e046780 <serror_aarch32>: 7406 e046780: d5033f9f dsb sy 7407 e046784: d50344ff msr daifclr, #0x4 7408 e046788: d5033fdf isb 7409 e04678c: f9007bfe str x30, [sp, #240] 7410 e046790: d280003e mov x30, #0x1 // #1 7411 e046794: f9009bfe str x30, [sp, #304] 7412 e046798: d5033fbf dmb sy 7413 e04679c: 17ffe932 b e040c64 <handle_lower_el_async_ea> 7414 ... 7415 7416000000000e046800 <mmu_sync_exception_sp_el0>: 7417 e046800: 17fffe00 b e046000 <sync_exception_sp_el0> 7418 ... 7419 7420000000000e046880 <mmu_irq_sp_el0>: 7421 e046880: 17fffe00 b e046080 <irq_sp_el0> 7422 ... 7423 7424000000000e046900 <mmu_fiq_sp_el0>: 7425 e046900: 17fffe00 b e046100 <fiq_sp_el0> 7426 ... 7427 7428000000000e046980 <mmu_serror_sp_el0>: 7429 e046980: 17fffe00 b e046180 <serror_sp_el0> 7430 ... 7431 7432000000000e046a00 <mmu_sync_exception_sp_elx>: 7433 e046a00: 17fffe00 b e046200 <sync_exception_sp_elx> 7434 ... 7435 7436000000000e046a80 <mmu_irq_sp_elx>: 7437 e046a80: 17fffe00 b e046280 <irq_sp_elx> 7438 ... 7439 7440000000000e046b00 <mmu_fiq_sp_elx>: 7441 e046b00: 17fffe00 b e046300 <fiq_sp_elx> 7442 ... 7443 7444000000000e046b80 <mmu_serror_sp_elx>: 7445 e046b80: 17fffe00 b e046380 <serror_sp_elx> 7446 ... 7447 7448000000000e046c00 <mmu_sync_exception_aarch64>: 7449 e046c00: a90007e0 stp x0, x1, [sp] 7450 e046c04: d53e1001 mrs x1, sctlr_el3 7451 e046c08: 927ff821 and x1, x1, #0xfffffffffffffffe 7452 e046c0c: d51e1001 msr sctlr_el3, x1 7453 e046c10: d5033fdf isb 7454 e046c14: b2400021 orr x1, x1, #0x1 7455 e046c18: d51e1001 msr sctlr_el3, x1 7456 e046c1c: 320183e1 mov w1, #0x80008000 // #-2147450880 7457 e046c20: 6b01001f cmp w0, w1 7458 e046c24: d53e5200 mrs x0, esr_el3 7459 e046c28: 52abc001 mov w1, #0x5e000000 // #1577058304 7460 e046c2c: 7a410000 ccmp w0, w1, #0x0, eq // eq = none 7461 e046c30: 54000081 b.ne e046c40 <mmu_sync_exception_aarch64+0x40> // b.any 7462 e046c34: d69f03e0 eret 7463 e046c38: d503379f dsb nsh 7464 e046c3c: d5033fdf isb 7465 e046c40: d5033fdf isb 7466 e046c44: a94007e0 ldp x0, x1, [sp] 7467 e046c48: 17fffdee b e046400 <sync_exception_aarch64> 7468 ... 7469 7470000000000e046c80 <mmu_irq_aarch64>: 7471 e046c80: a90007e0 stp x0, x1, [sp] 7472 e046c84: d53e1001 mrs x1, sctlr_el3 7473 e046c88: 927ff821 and x1, x1, #0xfffffffffffffffe 7474 e046c8c: d51e1001 msr sctlr_el3, x1 7475 e046c90: d5033fdf isb 7476 e046c94: b2400021 orr x1, x1, #0x1 7477 e046c98: d51e1001 msr sctlr_el3, x1 7478 e046c9c: d5033fdf isb 7479 e046ca0: a94007e0 ldp x0, x1, [sp] 7480 e046ca4: 17fffdf7 b e046480 <irq_aarch64> 7481 ... 7482 7483000000000e046d00 <mmu_fiq_aarch64>: 7484 e046d00: a90007e0 stp x0, x1, [sp] 7485 e046d04: d53e1001 mrs x1, sctlr_el3 7486 e046d08: 927ff821 and x1, x1, #0xfffffffffffffffe 7487 e046d0c: d51e1001 msr sctlr_el3, x1 7488 e046d10: d5033fdf isb 7489 e046d14: b2400021 orr x1, x1, #0x1 7490 e046d18: d51e1001 msr sctlr_el3, x1 7491 e046d1c: d5033fdf isb 7492 e046d20: a94007e0 ldp x0, x1, [sp] 7493 e046d24: 17fffdf7 b e046500 <fiq_aarch64> 7494 ... 7495 7496000000000e046d80 <mmu_serror_aarch64>: 7497 e046d80: a90007e0 stp x0, x1, [sp] 7498 e046d84: d53e1001 mrs x1, sctlr_el3 7499 e046d88: 927ff821 and x1, x1, #0xfffffffffffffffe 7500 e046d8c: d51e1001 msr sctlr_el3, x1 7501 e046d90: d5033fdf isb 7502 e046d94: b2400021 orr x1, x1, #0x1 7503 e046d98: d51e1001 msr sctlr_el3, x1 7504 e046d9c: d5033fdf isb 7505 e046da0: a94007e0 ldp x0, x1, [sp] 7506 e046da4: 17fffdf7 b e046580 <serror_aarch64> 7507 ... 7508 7509000000000e046e00 <mmu_sync_exception_aarch32>: 7510 e046e00: a90007e0 stp x0, x1, [sp] 7511 e046e04: d53e1001 mrs x1, sctlr_el3 7512 e046e08: 927ff821 and x1, x1, #0xfffffffffffffffe 7513 e046e0c: d51e1001 msr sctlr_el3, x1 7514 e046e10: d5033fdf isb 7515 e046e14: b2400021 orr x1, x1, #0x1 7516 e046e18: d51e1001 msr sctlr_el3, x1 7517 e046e1c: 320183e1 mov w1, #0x80008000 // #-2147450880 7518 e046e20: 6b01001f cmp w0, w1 7519 e046e24: d53e5200 mrs x0, esr_el3 7520 e046e28: 52a9c001 mov w1, #0x4e000000 // #1308622848 7521 e046e2c: 7a410000 ccmp w0, w1, #0x0, eq // eq = none 7522 e046e30: 54000081 b.ne e046e40 <mmu_sync_exception_aarch32+0x40> // b.any 7523 e046e34: d69f03e0 eret 7524 e046e38: d503379f dsb nsh 7525 e046e3c: d5033fdf isb 7526 e046e40: d5033fdf isb 7527 e046e44: a94007e0 ldp x0, x1, [sp] 7528 e046e48: 17fffdee b e046600 <sync_exception_aarch32> 7529 ... 7530 7531000000000e046e80 <mmu_irq_aarch32>: 7532 e046e80: a90007e0 stp x0, x1, [sp] 7533 e046e84: d53e1001 mrs x1, sctlr_el3 7534 e046e88: 927ff821 and x1, x1, #0xfffffffffffffffe 7535 e046e8c: d51e1001 msr sctlr_el3, x1 7536 e046e90: d5033fdf isb 7537 e046e94: b2400021 orr x1, x1, #0x1 7538 e046e98: d51e1001 msr sctlr_el3, x1 7539 e046e9c: d5033fdf isb 7540 e046ea0: a94007e0 ldp x0, x1, [sp] 7541 e046ea4: 17fffdf7 b e046680 <irq_aarch32> 7542 ... 7543 7544000000000e046f00 <mmu_fiq_aarch32>: 7545 e046f00: a90007e0 stp x0, x1, [sp] 7546 e046f04: d53e1001 mrs x1, sctlr_el3 7547 e046f08: 927ff821 and x1, x1, #0xfffffffffffffffe 7548 e046f0c: d51e1001 msr sctlr_el3, x1 7549 e046f10: d5033fdf isb 7550 e046f14: b2400021 orr x1, x1, #0x1 7551 e046f18: d51e1001 msr sctlr_el3, x1 7552 e046f1c: d5033fdf isb 7553 e046f20: a94007e0 ldp x0, x1, [sp] 7554 e046f24: 17fffdf7 b e046700 <fiq_aarch32> 7555 ... 7556 7557000000000e046f80 <mmu_serror_aarch32>: 7558 e046f80: a90007e0 stp x0, x1, [sp] 7559 e046f84: d53e1001 mrs x1, sctlr_el3 7560 e046f88: 927ff821 and x1, x1, #0xfffffffffffffffe 7561 e046f8c: d51e1001 msr sctlr_el3, x1 7562 e046f90: d5033fdf isb 7563 e046f94: b2400021 orr x1, x1, #0x1 7564 e046f98: d51e1001 msr sctlr_el3, x1 7565 e046f9c: d5033fdf isb 7566 e046fa0: a94007e0 ldp x0, x1, [sp] 7567 e046fa4: 17fffdf7 b e046780 <serror_aarch32> 7568 ... 7569