1 /*
2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <lib/xlat_tables/xlat_tables_v2.h>
8
9 #include <platform_def.h>
10
11 /* Table of regions to map using the MMU. */
12 const mmap_region_t plat_mmap[] = {
13 /* for TF text, RO, RW */
14 MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
15 MT_DEVICE | MT_RW | MT_SECURE),
16 MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
17 MT_DEVICE | MT_RW | MT_SECURE),
18 MAP_REGION_FLAT(MTK_MCDI_SRAM_BASE, MTK_MCDI_SRAM_MAP_SIZE,
19 MT_DEVICE | MT_RW | MT_SECURE),
20 MAP_REGION_FLAT(DP_SEC_BASE, DP_SEC_SIZE,
21 MT_DEVICE | MT_RW | MT_SECURE),
22 MAP_REGION_FLAT(eDP_SEC_BASE, eDP_SEC_SIZE,
23 MT_DEVICE | MT_RW | MT_SECURE),
24 { 0 }
25 };
26
27 /*******************************************************************************
28 * Macro generating the code for the function setting up the pagetables as per
29 * the platform memory map & initialize the mmu, for the given exception level
30 ******************************************************************************/
plat_configure_mmu_el3(uintptr_t total_base,uintptr_t total_size,uintptr_t ro_start,uintptr_t ro_limit)31 void plat_configure_mmu_el3(uintptr_t total_base,
32 uintptr_t total_size,
33 uintptr_t ro_start,
34 uintptr_t ro_limit)
35 {
36 mmap_add_region(total_base, total_base, total_size,
37 MT_RW_DATA | MT_SECURE);
38 mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
39 MT_CODE | MT_SECURE);
40 mmap_add(plat_mmap);
41 init_xlat_tables();
42 enable_mmu_el3(0);
43 }
44
plat_get_syscnt_freq2(void)45 unsigned int plat_get_syscnt_freq2(void)
46 {
47 return SYS_COUNTER_FREQ_IN_TICKS;
48 }
49