1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2016 Stefan Roese <sr@denx.de>
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <fdtdec.h>
9 #include <init.h>
10 #include <asm/cache.h>
11 #include <asm/global_data.h>
12 #include <asm/ptrace.h>
13 #include <linux/libfdt.h>
14 #include <linux/sizes.h>
15 #include <pci.h>
16 #include <asm/io.h>
17 #include <asm/system.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/soc.h>
20 #include <asm/armv8/mmu.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 /*
25  * Not all memory is mapped in the MMU. So we need to restrict the
26  * memory size so that U-Boot does not try to access it. Also, the
27  * internal registers are located at 0xf000.0000 - 0xffff.ffff.
28  * Currently only 2GiB are mapped for system memory. This is what
29  * we pass to the U-Boot subsystem here.
30  */
31 #define USABLE_RAM_SIZE		0x80000000
32 
board_get_usable_ram_top(ulong total_size)33 ulong board_get_usable_ram_top(ulong total_size)
34 {
35 	if (gd->ram_size > USABLE_RAM_SIZE)
36 		return USABLE_RAM_SIZE;
37 
38 	return gd->ram_size;
39 }
40 
41 /*
42  * On ARMv8, MBus is not configured in U-Boot. To enable compilation
43  * of the already implemented drivers, lets add a dummy version of
44  * this function so that linking does not fail.
45  */
mvebu_mbus_dram_info(void)46 const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
47 {
48 	return NULL;
49 }
50 
dram_init_banksize(void)51 __weak int dram_init_banksize(void)
52 {
53 	if (CONFIG_IS_ENABLED(ARMADA_8K))
54 		return a8k_dram_init_banksize();
55 	else if (CONFIG_IS_ENABLED(ARMADA_3700))
56 		return a3700_dram_init_banksize();
57 	else
58 		return fdtdec_setup_memory_banksize();
59 }
60 
dram_init(void)61 __weak int dram_init(void)
62 {
63 	if (CONFIG_IS_ENABLED(ARMADA_8K)) {
64 		gd->ram_size = a8k_dram_scan_ap_sz();
65 		if (gd->ram_size != 0)
66 			return 0;
67 	}
68 
69 	if (CONFIG_IS_ENABLED(ARMADA_3700))
70 		return a3700_dram_init();
71 
72 	if (fdtdec_setup_mem_size_base() != 0)
73 		return -EINVAL;
74 
75 	return 0;
76 }
77 
arch_cpu_init(void)78 int arch_cpu_init(void)
79 {
80 	/* Nothing to do (yet) */
81 	return 0;
82 }
83 
arch_early_init_r(void)84 int arch_early_init_r(void)
85 {
86 	struct udevice *dev;
87 	int ret;
88 	int i;
89 
90 	/*
91 	 * Loop over all MISC uclass drivers to call the comphy code
92 	 * and init all CP110 devices enabled in the DT
93 	 */
94 	i = 0;
95 	while (1) {
96 		/* Call the comphy code via the MISC uclass driver */
97 		ret = uclass_get_device(UCLASS_MISC, i++, &dev);
98 
99 		/* We're done, once no further CP110 device is found */
100 		if (ret)
101 			break;
102 	}
103 
104 	/* Cause the SATA device to do its early init */
105 	uclass_first_device(UCLASS_AHCI, &dev);
106 
107 #ifdef CONFIG_DM_PCI
108 	/* Trigger PCIe devices detection */
109 	pci_init();
110 #endif
111 
112 	return 0;
113 }
114