1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * boot-common.c
4 *
5 * Common bootmode functions for omap based boards
6 *
7 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
8 */
9
10 #include <common.h>
11 #include <ahci.h>
12 #include <log.h>
13 #include <spl.h>
14 #include <asm/global_data.h>
15 #include <asm/omap_common.h>
16 #include <asm/arch/omap.h>
17 #include <asm/arch/mmc_host_def.h>
18 #include <asm/arch/sys_proto.h>
19 #include <watchdog.h>
20 #include <scsi.h>
21 #include <i2c.h>
22
23 DECLARE_GLOBAL_DATA_PTR;
24
omap_sys_boot_device(void)25 __weak u32 omap_sys_boot_device(void)
26 {
27 return BOOT_DEVICE_NONE;
28 }
29
save_omap_boot_params(void)30 void save_omap_boot_params(void)
31 {
32 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
33 struct omap_boot_parameters *omap_boot_params;
34 int sys_boot_device = 0;
35 u32 boot_device;
36 u32 boot_mode;
37
38 if ((boot_params < NON_SECURE_SRAM_START) ||
39 (boot_params > NON_SECURE_SRAM_END))
40 return;
41
42 omap_boot_params = (struct omap_boot_parameters *)boot_params;
43
44 boot_device = omap_boot_params->boot_device;
45 boot_mode = MMCSD_MODE_UNDEFINED;
46
47 /* Boot device */
48
49 #ifdef BOOT_DEVICE_NAND_I2C
50 /*
51 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
52 * Otherwise the SPL boot IF can't handle this device correctly.
53 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
54 * Draco leads to this boot-device passed to SPL from the BootROM.
55 */
56 if (boot_device == BOOT_DEVICE_NAND_I2C)
57 boot_device = BOOT_DEVICE_NAND;
58 #endif
59 #ifdef BOOT_DEVICE_QSPI_4
60 /*
61 * We get different values for QSPI_1 and QSPI_4 being used, but
62 * don't actually care about this difference. Rather than
63 * mangle the later code, if we're coming in as QSPI_4 just
64 * change to the QSPI_1 value.
65 */
66 if (boot_device == BOOT_DEVICE_QSPI_4)
67 boot_device = BOOT_DEVICE_SPI;
68 #endif
69 #ifdef CONFIG_TI816X
70 /*
71 * On PG2.0 and later TI816x the values we get when booting are not the
72 * same as on PG1.0, which is what the defines are based on. Update
73 * them as needed.
74 */
75 if (get_cpu_rev() != 1) {
76 if (boot_device == 0x05) {
77 omap_boot_params->boot_device = BOOT_DEVICE_NAND;
78 boot_device = BOOT_DEVICE_NAND;
79 }
80 if (boot_device == 0x08) {
81 omap_boot_params->boot_device = BOOT_DEVICE_MMC1;
82 boot_device = BOOT_DEVICE_MMC1;
83 }
84 }
85 #endif
86 /*
87 * When booting from peripheral booting, the boot device is not usable
88 * as-is (unless there is support for it), so the boot device is instead
89 * figured out using the SYS_BOOT pins.
90 */
91 switch (boot_device) {
92 #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
93 case BOOT_DEVICE_UART:
94 sys_boot_device = 1;
95 break;
96 #endif
97 #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_STORAGE)
98 case BOOT_DEVICE_USB:
99 sys_boot_device = 1;
100 break;
101 #endif
102 #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USB_ETHER)
103 case BOOT_DEVICE_USBETH:
104 sys_boot_device = 1;
105 break;
106 #endif
107 #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
108 case BOOT_DEVICE_CPGMAC:
109 sys_boot_device = 1;
110 break;
111 #endif
112 #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
113 case BOOT_DEVICE_DFU:
114 sys_boot_device = 1;
115 break;
116 #endif
117 }
118
119 if (sys_boot_device) {
120 boot_device = omap_sys_boot_device();
121
122 /* MMC raw mode will fallback to FS mode. */
123 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
124 (boot_device <= MMC_BOOT_DEVICES_END))
125 boot_mode = MMCSD_MODE_RAW;
126 }
127
128 gd->arch.omap_boot_device = boot_device;
129
130 /* Boot mode */
131
132 #ifdef CONFIG_OMAP34XX
133 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
134 (boot_device <= MMC_BOOT_DEVICES_END)) {
135 switch (boot_device) {
136 case BOOT_DEVICE_MMC1:
137 boot_mode = MMCSD_MODE_FS;
138 break;
139 case BOOT_DEVICE_MMC2:
140 boot_mode = MMCSD_MODE_RAW;
141 break;
142 }
143 }
144 #else
145 /*
146 * If the boot device was dynamically changed and doesn't match what
147 * the bootrom initially booted, we cannot use the boot device
148 * descriptor to figure out the boot mode.
149 */
150 if ((boot_device == omap_boot_params->boot_device) &&
151 (boot_device >= MMC_BOOT_DEVICES_START) &&
152 (boot_device <= MMC_BOOT_DEVICES_END)) {
153 boot_params = omap_boot_params->boot_device_descriptor;
154 if ((boot_params < NON_SECURE_SRAM_START) ||
155 (boot_params > NON_SECURE_SRAM_END))
156 return;
157
158 boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
159 if ((boot_params < NON_SECURE_SRAM_START) ||
160 (boot_params > NON_SECURE_SRAM_END))
161 return;
162
163 boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
164
165 if (boot_mode != MMCSD_MODE_FS &&
166 boot_mode != MMCSD_MODE_RAW)
167 #ifdef CONFIG_SUPPORT_EMMC_BOOT
168 boot_mode = MMCSD_MODE_EMMCBOOT;
169 #else
170 boot_mode = MMCSD_MODE_UNDEFINED;
171 #endif
172 }
173 #endif
174
175 gd->arch.omap_boot_mode = boot_mode;
176
177 #if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
178 !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
179
180 /* CH flags */
181
182 gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
183 #endif
184 }
185
186 #ifdef CONFIG_SPL_BUILD
spl_boot_device(void)187 u32 spl_boot_device(void)
188 {
189 return gd->arch.omap_boot_device;
190 }
191
spl_mmc_boot_mode(const u32 boot_device)192 u32 spl_mmc_boot_mode(const u32 boot_device)
193 {
194 return gd->arch.omap_boot_mode;
195 }
196
spl_board_init(void)197 void spl_board_init(void)
198 {
199 /* Prepare console output */
200 preloader_console_init();
201
202 #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
203 gpmc_init();
204 #endif
205 #if defined(CONFIG_SPL_I2C_SUPPORT) && !CONFIG_IS_ENABLED(DM_I2C)
206 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
207 #endif
208 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
209 arch_misc_init();
210 #endif
211 #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
212 hw_watchdog_init();
213 #endif
214 #ifdef CONFIG_AM33XX
215 am33xx_spl_board_init();
216 #endif
217 }
218
jump_to_image_no_args(struct spl_image_info * spl_image)219 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
220 {
221 typedef void __noreturn (*image_entry_noargs_t)(u32 *);
222 image_entry_noargs_t image_entry =
223 (image_entry_noargs_t) spl_image->entry_point;
224
225 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
226
227 debug("image entry point: 0x%lX\n", spl_image->entry_point);
228 /* Pass the saved boot_params from rom code */
229 image_entry((u32 *)boot_params);
230 }
231 #endif
232
233 #ifdef CONFIG_SCSI_AHCI_PLAT
arch_preboot_os(void)234 void arch_preboot_os(void)
235 {
236 ahci_reset((void __iomem *)DWC_AHSATA_BASE);
237 }
238 #endif
239