1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
4 *
5 * Sunxi PMIC bus access helpers
6 *
7 * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
8 * axp223 uses the rsb bus, these functions abstract this.
9 */
10
11 #include <common.h>
12 #include <asm/arch/p2wi.h>
13 #include <asm/arch/rsb.h>
14 #include <i2c.h>
15 #include <asm/arch/pmic_bus.h>
16
17 #define AXP152_I2C_ADDR 0x30
18
19 #define AXP209_I2C_ADDR 0x34
20
21 #define AXP305_I2C_ADDR 0x36
22
23 #define AXP221_CHIP_ADDR 0x68
24 #define AXP221_CTRL_ADDR 0x3e
25 #define AXP221_INIT_DATA 0x3e
26
27 /* AXP818 device and runtime addresses are same as AXP223 */
28 #define AXP223_DEVICE_ADDR 0x3a3
29 #define AXP223_RUNTIME_ADDR 0x2d
30
pmic_bus_init(void)31 int pmic_bus_init(void)
32 {
33 /* This cannot be 0 because it is used in SPL before BSS is ready */
34 static int needs_init = 1;
35 __maybe_unused int ret;
36
37 if (!needs_init)
38 return 0;
39
40 #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
41 # ifdef CONFIG_MACH_SUN6I
42 p2wi_init();
43 ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
44 AXP221_INIT_DATA);
45 # elif defined CONFIG_MACH_SUN8I_R40
46 /* Nothing. R40 uses the AXP221s in I2C mode */
47 ret = 0;
48 # else
49 ret = rsb_init();
50 if (ret)
51 return ret;
52
53 ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR);
54 # endif
55 if (ret)
56 return ret;
57 #endif
58
59 needs_init = 0;
60 return 0;
61 }
62
pmic_bus_read(u8 reg,u8 * data)63 int pmic_bus_read(u8 reg, u8 *data)
64 {
65 #ifdef CONFIG_AXP152_POWER
66 return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1);
67 #elif defined CONFIG_AXP209_POWER
68 return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
69 #elif defined CONFIG_AXP305_POWER
70 return i2c_read(AXP305_I2C_ADDR, reg, 1, data, 1);
71 #elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
72 # ifdef CONFIG_MACH_SUN6I
73 return p2wi_read(reg, data);
74 # elif defined CONFIG_MACH_SUN8I_R40
75 return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
76 # else
77 return rsb_read(AXP223_RUNTIME_ADDR, reg, data);
78 # endif
79 #endif
80 }
81
pmic_bus_write(u8 reg,u8 data)82 int pmic_bus_write(u8 reg, u8 data)
83 {
84 #ifdef CONFIG_AXP152_POWER
85 return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1);
86 #elif defined CONFIG_AXP209_POWER
87 return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
88 #elif defined CONFIG_AXP305_POWER
89 return i2c_write(AXP305_I2C_ADDR, reg, 1, &data, 1);
90 #elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
91 # ifdef CONFIG_MACH_SUN6I
92 return p2wi_write(reg, data);
93 # elif defined CONFIG_MACH_SUN8I_R40
94 return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
95 # else
96 return rsb_write(AXP223_RUNTIME_ADDR, reg, data);
97 # endif
98 #endif
99 }
100
pmic_bus_setbits(u8 reg,u8 bits)101 int pmic_bus_setbits(u8 reg, u8 bits)
102 {
103 int ret;
104 u8 val;
105
106 ret = pmic_bus_read(reg, &val);
107 if (ret)
108 return ret;
109
110 if ((val & bits) == bits)
111 return 0;
112
113 val |= bits;
114 return pmic_bus_write(reg, val);
115 }
116
pmic_bus_clrbits(u8 reg,u8 bits)117 int pmic_bus_clrbits(u8 reg, u8 bits)
118 {
119 int ret;
120 u8 val;
121
122 ret = pmic_bus_read(reg, &val);
123 if (ret)
124 return ret;
125
126 if (!(val & bits))
127 return 0;
128
129 val &= ~bits;
130 return pmic_bus_write(reg, val);
131 }
132