1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2000-2004
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
7  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8  */
9 
10 #include <common.h>
11 #include <irq_func.h>
12 #include <watchdog.h>
13 #include <asm/processor.h>
14 #include <asm/immap.h>
15 #include <asm/io.h>
16 
17 #ifdef	CONFIG_M5272
interrupt_init(void)18 int interrupt_init(void)
19 {
20 	intctrl_t *intp = (intctrl_t *) (MMAP_INTC);
21 
22 	/* disable all external interrupts */
23 	out_be32(&intp->int_icr1, 0x88888888);
24 	out_be32(&intp->int_icr2, 0x88888888);
25 	out_be32(&intp->int_icr3, 0x88888888);
26 	out_be32(&intp->int_icr4, 0x88888888);
27 	out_be32(&intp->int_pitr, 0x00000000);
28 
29 	/* initialize vector register */
30 	out_8(&intp->int_pivr, 0x40);
31 
32 	enable_interrupts();
33 
34 	return 0;
35 }
36 
37 #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)38 void dtimer_intr_setup(void)
39 {
40 	intctrl_t *intp = (intctrl_t *) (CONFIG_SYS_INTR_BASE);
41 
42 	clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
43 	setbits_be32(&intp->int_icr1, CONFIG_SYS_TMRINTR_PRI);
44 }
45 #endif				/* CONFIG_MCFTMR */
46 #endif				/* CONFIG_M5272 */
47 
48 #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
49     defined(CONFIG_M5271) || defined(CONFIG_M5275)
interrupt_init(void)50 int interrupt_init(void)
51 {
52 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
53 
54 	/* Make sure all interrupts are disabled */
55 #if defined(CONFIG_M5208)
56 	out_be32(&intp->imrl0, 0xffffffff);
57 	out_be32(&intp->imrh0, 0xffffffff);
58 #else
59 	setbits_be32(&intp->imrl0, 0x1);
60 #endif
61 
62 	enable_interrupts();
63 	return 0;
64 }
65 
66 #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)67 void dtimer_intr_setup(void)
68 {
69 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
70 
71 	out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
72 	clrbits_be32(&intp->imrl0, 0x00000001);
73 	clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);
74 }
75 #endif				/* CONFIG_MCFTMR */
76 #endif				/* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
77 
78 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
interrupt_init(void)79 int interrupt_init(void)
80 {
81 	enable_interrupts();
82 
83 	return 0;
84 }
85 
86 #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)87 void dtimer_intr_setup(void)
88 {
89 	mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
90 	mbar_writeByte(MCFSIM_TIMER2ICR, CONFIG_SYS_TMRINTR_PRI);
91 }
92 #endif				/* CONFIG_MCFTMR */
93 #endif				/* CONFIG_M5249 || CONFIG_M5253 */
94