1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 Microsemi Corporation
4 */
5
6/dts-v1/;
7#include "mscc,ocelot_pcb.dtsi"
8
9/ {
10	model = "Ocelot PCB123 Reference Board";
11	compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
12
13	chosen {
14		stdout-path = "serial0:115200n8";
15	};
16
17	gpio-leds {
18		compatible = "gpio-leds";
19
20		status_green {
21			label = "pcb123:green:status";
22			gpios = <&sgpio 43 1>; /* p11.1 */
23			default-state = "on";
24		};
25
26		status_red {
27			label = "pcb123:red:status";
28			gpios = <&sgpio 11 1>; /* p11.0 */
29			default-state = "off";
30		};
31	};
32};
33
34&sgpio {
35	status = "okay";
36	mscc,sgpio-ports = <0x00FFFFFF>;
37};
38
39&mdio0 {
40	status = "okay";
41
42	phy0: ethernet-phy@0 {
43		reg = <0>;
44	};
45	phy1: ethernet-phy@1 {
46		reg = <1>;
47	};
48	phy2: ethernet-phy@2 {
49		reg = <2>;
50	};
51	phy3: ethernet-phy@3 {
52		reg = <3>;
53	};
54};
55
56&switch {
57	ethernet-ports {
58		port0: port@0 {
59			reg = <2>;
60			phy-handle = <&phy2>;
61		};
62		port1: port@1 {
63			reg = <3>;
64			phy-handle = <&phy3>;
65		};
66		port2: port@2 {
67			reg = <0>;
68			phy-handle = <&phy0>;
69		};
70		port3: port@3 {
71			reg = <1>;
72			phy-handle = <&phy1>;
73		};
74	};
75};
76