1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
4 */
5
6#include "skeleton.dtsi"
7
8/ {
9	compatible = "qca,qca953x";
10
11	#address-cells = <1>;
12	#size-cells = <1>;
13
14	cpus {
15		#address-cells = <1>;
16		#size-cells = <0>;
17
18		cpu@0 {
19			device_type = "cpu";
20			compatible = "mips,mips24Kc";
21			reg = <0>;
22		};
23	};
24
25	clocks {
26		#address-cells = <1>;
27		#size-cells = <1>;
28		ranges;
29
30		xtal: xtal {
31			#clock-cells = <0>;
32			compatible = "fixed-clock";
33			clock-output-names = "xtal";
34		};
35	};
36
37	pinctrl {
38		u-boot,dm-pre-reloc;
39		compatible = "qca,qca953x-pinctrl";
40		ranges;
41		#address-cells = <1>;
42		#size-cells = <1>;
43		reg = <0x18040000 0x100>;
44	};
45
46	ahb {
47		compatible = "simple-bus";
48		ranges;
49
50		#address-cells = <1>;
51		#size-cells = <1>;
52
53		apb {
54			compatible = "simple-bus";
55			ranges;
56
57			#address-cells = <1>;
58			#size-cells = <1>;
59
60			uart0: uart@18020000 {
61				compatible = "ns16550";
62				reg = <0x18020000 0x20>;
63				reg-shift = <2>;
64				clock-frequency = <25000000>;
65
66				status = "disabled";
67			};
68
69			gmac0: eth0@0x19000000 {
70				compatible = "qca,ag953x-mac";
71				reg = <0x19000000 0x200>;
72				phy = <&phy4>;
73				phy-mode = "rmii";
74
75				status = "disabled";
76			};
77
78			gmac1: eth1@0x1a000000 {
79				compatible = "qca,ag953x-mac";
80				reg = <0x1a000000 0x200>;
81				phy = <&phy0>;
82				phy-mode = "rgmii";
83
84				status = "disabled";
85
86				mdio {
87					#address-cells = <1>;
88					#size-cells = <0>;
89					phy0: ethernet-phy@0 {
90						reg = <0>;
91						phy-mode = "rmii";
92					};
93					phy4: ethernet-phy@4 {
94						reg = <4>;
95						phy-mode = "rmii";
96					};
97				};
98			};
99		};
100
101		spi0: spi@1f000000 {
102			compatible = "qca,ar7100-spi";
103			reg = <0x1f000000 0x10>;
104
105			status = "disabled";
106
107			#address-cells = <1>;
108			#size-cells = <0>;
109		};
110	};
111};
112