1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2018  Cisco Systems, Inc.
4  * (C) Copyright 2019  Synamedia
5  *
6  * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
7  */
8 
9 #include <cpu_func.h>
10 #include <init.h>
11 #include <log.h>
12 #include <time.h>
13 #include <asm/global_data.h>
14 #include <linux/types.h>
15 #include <common.h>
16 #include <env.h>
17 #include <asm/io.h>
18 #include <asm/bootm.h>
19 #include <mach/timer.h>
20 #include <mmc.h>
21 #include <fdtdec.h>
22 
23 DECLARE_GLOBAL_DATA_PTR;
24 
25 #define BCMSTB_DATA_SECTION __attribute__((section(".data")))
26 
27 struct bcmstb_boot_parameters bcmstb_boot_parameters BCMSTB_DATA_SECTION;
28 
29 phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
30 
31 union reg_value_union {
32 	const char *data;
33 	const phys_addr_t *address;
34 };
35 
board_init(void)36 int board_init(void)
37 {
38 	return 0;
39 }
40 
get_board_rev(void)41 u32 get_board_rev(void)
42 {
43 	return 0;
44 }
45 
reset_cpu(ulong ignored)46 void reset_cpu(ulong ignored)
47 {
48 }
49 
print_cpuinfo(void)50 int print_cpuinfo(void)
51 {
52 	return 0;
53 }
54 
dram_init(void)55 int dram_init(void)
56 {
57 	if (fdtdec_setup_mem_size_base() != 0)
58 		return -EINVAL;
59 
60 	return 0;
61 }
62 
dram_init_banksize(void)63 int dram_init_banksize(void)
64 {
65 	fdtdec_setup_memory_banksize();
66 
67 	/*
68 	 * On this SoC, U-Boot is running as an ELF file.  Change the
69 	 * relocation address to CONFIG_SYS_TEXT_BASE, so that in
70 	 * setup_reloc, gd->reloc_off works out to 0, effectively
71 	 * disabling relocation.  Otherwise U-Boot hangs in the setup
72 	 * instructions just before relocate_code in
73 	 * arch/arm/lib/crt0.S.
74 	 */
75 	gd->relocaddr = CONFIG_SYS_TEXT_BASE;
76 
77 	return 0;
78 }
79 
enable_caches(void)80 void enable_caches(void)
81 {
82 	/*
83 	 * This port assumes that the prior stage bootloader has
84 	 * enabled I-cache and D-cache already.  Implementing this
85 	 * function silences the warning in the default function.
86 	 */
87 }
88 
timer_init(void)89 int timer_init(void)
90 {
91 	gd->arch.timer_rate_hz = readl(BCMSTB_TIMER_FREQUENCY);
92 
93 	return 0;
94 }
95 
get_tbclk(void)96 ulong get_tbclk(void)
97 {
98 	return gd->arch.timer_rate_hz;
99 }
100 
get_ticks(void)101 uint64_t get_ticks(void)
102 {
103 	gd->timebase_h = readl(BCMSTB_TIMER_HIGH);
104 	gd->timebase_l = readl(BCMSTB_TIMER_LOW);
105 
106 	return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
107 }
108 
board_late_init(void)109 int board_late_init(void)
110 {
111 	debug("Arguments from prior stage bootloader:\n");
112 	debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
113 	debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
114 	debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
115 	debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
116 	debug("Stack Pointer Register:     0x%x\n", bcmstb_boot_parameters.sp);
117 	debug("Link Register:              0x%x\n", bcmstb_boot_parameters.lr);
118 	debug("Assuming timer frequency register at: 0x%p\n",
119 	      (void *)BCMSTB_TIMER_FREQUENCY);
120 	debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
121 	debug("Prior stage provided DTB at: 0x%p\n",
122 	      (void *)prior_stage_fdt_address);
123 
124 	/*
125 	 * Set fdtcontroladdr in the environment so that scripts can
126 	 * refer to it, for example, to reuse it for fdtaddr.
127 	 */
128 	env_set_hex("fdtcontroladdr", prior_stage_fdt_address);
129 
130 	/*
131 	 * Do not set machid to the machine identifier value provided
132 	 * by the prior stage bootloader (bcmstb_boot_parameters.r1)
133 	 * because we're using a device tree to boot Linux.
134 	 */
135 
136 	return 0;
137 }
138