1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com>
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <init.h>
9 #include <syscon.h>
10 #include <asm/io.h>
11 #include <asm/arch-rockchip/clock.h>
12 #include <asm/arch-rockchip/grf_rk3399.h>
13 #include <asm/arch-rockchip/hardware.h>
14 #include <asm/arch-rockchip/misc.h>
15 
16 #define GRF_IO_VSEL_BT565_SHIFT 0
17 #define PMUGRF_CON0_VSEL_SHIFT 8
18 
19 #ifdef CONFIG_MISC_INIT_R
setup_iodomain(void)20 static void setup_iodomain(void)
21 {
22 	struct rk3399_grf_regs *grf =
23 	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
24 	struct rk3399_pmugrf_regs *pmugrf =
25 	    syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
26 
27 	/* BT565 is in 1.8v domain */
28 	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
29 
30 	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
31 	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
32 }
33 
misc_init_r(void)34 int misc_init_r(void)
35 {
36 	const u32 cpuid_offset = 0x7;
37 	const u32 cpuid_length = 0x10;
38 	u8 cpuid[cpuid_length];
39 	int ret;
40 
41 	setup_iodomain();
42 
43 	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
44 	if (ret)
45 		return ret;
46 
47 	ret = rockchip_cpuid_set(cpuid, cpuid_length);
48 	if (ret)
49 		return ret;
50 
51 	ret = rockchip_setup_macaddr();
52 
53 	return ret;
54 }
55 
56 #endif
57