1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * SchulerControl GmbH, SC_SPS_1 module
4  *
5  * Copyright (C) 2012 Marek Vasut <marex@denx.de>
6  * on behalf of DENX Software Engineering GmbH
7  */
8 
9 #include <common.h>
10 #include <init.h>
11 #include <net.h>
12 #include <asm/global_data.h>
13 #include <asm/gpio.h>
14 #include <asm/io.h>
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/iomux-mx28.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/sys_proto.h>
19 #include <linux/mii.h>
20 #include <miiphy.h>
21 #include <netdev.h>
22 #include <errno.h>
23 
24 DECLARE_GLOBAL_DATA_PTR;
25 
26 /*
27  * Functions
28  */
board_early_init_f(void)29 int board_early_init_f(void)
30 {
31 	/* IO0 clock at 480MHz */
32 	mxs_set_ioclk(MXC_IOCLK0, 480000);
33 	/* IO1 clock at 480MHz */
34 	mxs_set_ioclk(MXC_IOCLK1, 480000);
35 
36 	/* SSP0 clock at 96MHz */
37 	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
38 	/* SSP2 clock at 96MHz */
39 	mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
40 
41 #ifdef	CONFIG_CMD_USB
42 	mxs_iomux_setup_pad(MX28_PAD_AUART1_CTS__USB0_OVERCURRENT);
43 	mxs_iomux_setup_pad(MX28_PAD_AUART2_TX__GPIO_3_9 |
44 			MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
45 	gpio_direction_output(MX28_PAD_AUART2_TX__GPIO_3_9, 1);
46 #endif
47 
48 	return 0;
49 }
50 
board_init(void)51 int board_init(void)
52 {
53 	/* Adress of boot parameters */
54 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
55 
56 	return 0;
57 }
58 
dram_init(void)59 int dram_init(void)
60 {
61 	return mxs_dram_init();
62 }
63 
64 #ifdef	CONFIG_CMD_MMC
board_mmc_init(struct bd_info * bis)65 int board_mmc_init(struct bd_info *bis)
66 {
67 	return mxsmmc_initialize(bis, 0, NULL, NULL);
68 }
69 #endif
70 
71 #ifdef	CONFIG_CMD_NET
board_eth_init(struct bd_info * bis)72 int board_eth_init(struct bd_info *bis)
73 {
74 	struct mxs_clkctrl_regs *clkctrl_regs =
75 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
76 	int ret;
77 
78 	ret = cpu_eth_init(bis);
79 
80 	clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet,
81 		CLKCTRL_ENET_TIME_SEL_MASK,
82 		CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN);
83 
84 	ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
85 	if (ret) {
86 		printf("FEC MXS: Unable to init FEC0\n");
87 		return ret;
88 	}
89 
90 	ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
91 	if (ret) {
92 		printf("FEC MXS: Unable to init FEC1\n");
93 		return ret;
94 	}
95 
96 	return ret;
97 }
98 
99 #endif
100