1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (C) 2018 Amarula Solutions B.V.
4  * Author: Jagan Teki <jagan@amarulasolutions.com>
5  */
6 
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
13 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
14 #include <linux/bitops.h>
15 
16 static struct ccu_clk_gate a23_gates[] = {
17 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
18 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
19 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
20 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
21 	[CLK_BUS_SPI1]		= GATE(0x060, BIT(21)),
22 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
23 	[CLK_BUS_EHCI]		= GATE(0x060, BIT(26)),
24 	[CLK_BUS_OHCI]		= GATE(0x060, BIT(29)),
25 
26 	[CLK_BUS_UART0]		= GATE(0x06c, BIT(16)),
27 	[CLK_BUS_UART1]		= GATE(0x06c, BIT(17)),
28 	[CLK_BUS_UART2]		= GATE(0x06c, BIT(18)),
29 	[CLK_BUS_UART3]		= GATE(0x06c, BIT(19)),
30 	[CLK_BUS_UART4]		= GATE(0x06c, BIT(20)),
31 
32 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
33 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
34 
35 	[CLK_USB_PHY0]		= GATE(0x0cc, BIT(8)),
36 	[CLK_USB_PHY1]		= GATE(0x0cc, BIT(9)),
37 	[CLK_USB_HSIC]		= GATE(0x0cc, BIT(10)),
38 	[CLK_USB_HSIC_12M]	= GATE(0x0cc, BIT(11)),
39 	[CLK_USB_OHCI]		= GATE(0x0cc, BIT(16)),
40 };
41 
42 static struct ccu_reset a23_resets[] = {
43 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
44 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
45 	[RST_USB_HSIC]		= RESET(0x0cc, BIT(2)),
46 
47 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
48 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
49 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
50 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
51 	[RST_BUS_SPI1]		= RESET(0x2c0, BIT(21)),
52 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
53 	[RST_BUS_EHCI]		= RESET(0x2c0, BIT(26)),
54 	[RST_BUS_OHCI]		= RESET(0x2c0, BIT(29)),
55 
56 	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
57 	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
58 	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
59 	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
60 	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
61 };
62 
63 static const struct ccu_desc a23_ccu_desc = {
64 	.gates = a23_gates,
65 	.resets = a23_resets,
66 };
67 
a23_clk_bind(struct udevice * dev)68 static int a23_clk_bind(struct udevice *dev)
69 {
70 	return sunxi_reset_bind(dev, ARRAY_SIZE(a23_resets));
71 }
72 
73 static const struct udevice_id a23_clk_ids[] = {
74 	{ .compatible = "allwinner,sun8i-a23-ccu",
75 	  .data = (ulong)&a23_ccu_desc },
76 	{ .compatible = "allwinner,sun8i-a33-ccu",
77 	  .data = (ulong)&a23_ccu_desc },
78 	{ }
79 };
80 
81 U_BOOT_DRIVER(clk_sun8i_a23) = {
82 	.name		= "sun8i_a23_ccu",
83 	.id		= UCLASS_CLK,
84 	.of_match	= a23_clk_ids,
85 	.priv_auto	= sizeof(struct ccu_priv),
86 	.ops		= &sunxi_clk_ops,
87 	.probe		= sunxi_clk_probe,
88 	.bind		= a23_clk_bind,
89 };
90