1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Andestech ATCSPI200 SPI controller driver.
4 *
5 * Copyright 2017 Andes Technology, Inc.
6 * Author: Rick Chen (rick@andestech.com)
7 */
8
9 #include <common.h>
10 #include <clk.h>
11 #include <log.h>
12 #include <malloc.h>
13 #include <spi.h>
14 #include <asm/global_data.h>
15 #include <asm/io.h>
16 #include <dm.h>
17
18 DECLARE_GLOBAL_DATA_PTR;
19
20 #define MAX_TRANSFER_LEN 512
21 #define CHUNK_SIZE 1
22 #define SPI_TIMEOUT 0x100000
23 #define SPI0_BUS 0
24 #define SPI1_BUS 1
25 #define SPI0_BASE 0xf0b00000
26 #define SPI1_BASE 0xf0f00000
27 #define NSPI_MAX_CS_NUM 1
28
29 struct atcspi200_spi_regs {
30 u32 rev;
31 u32 reserve1[3];
32 u32 format; /* 0x10 */
33 #define DATA_LENGTH(x) ((x-1)<<8)
34 u32 pio;
35 u32 reserve2[2];
36 u32 tctrl; /* 0x20 */
37 #define TRAMODE_OFFSET 24
38 #define TRAMODE_MASK (0x0F<<TRAMODE_OFFSET)
39 #define TRAMODE_WR_SYNC (0<<TRAMODE_OFFSET)
40 #define TRAMODE_WO (1<<TRAMODE_OFFSET)
41 #define TRAMODE_RO (2<<TRAMODE_OFFSET)
42 #define TRAMODE_WR (3<<TRAMODE_OFFSET)
43 #define TRAMODE_RW (4<<TRAMODE_OFFSET)
44 #define TRAMODE_WDR (5<<TRAMODE_OFFSET)
45 #define TRAMODE_RDW (6<<TRAMODE_OFFSET)
46 #define TRAMODE_NONE (7<<TRAMODE_OFFSET)
47 #define TRAMODE_DW (8<<TRAMODE_OFFSET)
48 #define TRAMODE_DR (9<<TRAMODE_OFFSET)
49 #define WCNT_OFFSET 12
50 #define WCNT_MASK (0x1FF<<WCNT_OFFSET)
51 #define RCNT_OFFSET 0
52 #define RCNT_MASK (0x1FF<<RCNT_OFFSET)
53 u32 cmd;
54 u32 addr;
55 u32 data;
56 u32 ctrl; /* 0x30 */
57 #define TXFTH_OFFSET 16
58 #define RXFTH_OFFSET 8
59 #define TXDMAEN (1<<4)
60 #define RXDMAEN (1<<3)
61 #define TXFRST (1<<2)
62 #define RXFRST (1<<1)
63 #define SPIRST (1<<0)
64 u32 status;
65 #define TXFFL (1<<23)
66 #define TXEPTY (1<<22)
67 #define TXFVE_MASK (0x1F<<16)
68 #define RXFEM (1<<14)
69 #define RXFVE_OFFSET (8)
70 #define RXFVE_MASK (0x1F<<RXFVE_OFFSET)
71 #define SPIBSY (1<<0)
72 u32 inten;
73 u32 intsta;
74 u32 timing; /* 0x40 */
75 #define SCLK_DIV_MASK 0xFF
76 };
77
78 struct nds_spi_slave {
79 volatile struct atcspi200_spi_regs *regs;
80 int to;
81 unsigned int freq;
82 ulong clock;
83 unsigned int mode;
84 u8 num_cs;
85 unsigned int mtiming;
86 size_t cmd_len;
87 u8 cmd_buf[16];
88 size_t data_len;
89 size_t tran_len;
90 u8 *din;
91 u8 *dout;
92 unsigned int max_transfer_length;
93 };
94
__atcspi200_spi_set_speed(struct nds_spi_slave * ns)95 static int __atcspi200_spi_set_speed(struct nds_spi_slave *ns)
96 {
97 u32 tm;
98 u8 div;
99 tm = ns->regs->timing;
100 tm &= ~SCLK_DIV_MASK;
101
102 if(ns->freq >= ns->clock)
103 div =0xff;
104 else{
105 for (div = 0; div < 0xff; div++) {
106 if (ns->freq >= ns->clock / (2 * (div + 1)))
107 break;
108 }
109 }
110
111 tm |= div;
112 ns->regs->timing = tm;
113
114 return 0;
115
116 }
117
__atcspi200_spi_claim_bus(struct nds_spi_slave * ns)118 static int __atcspi200_spi_claim_bus(struct nds_spi_slave *ns)
119 {
120 unsigned int format=0;
121 ns->regs->ctrl |= (TXFRST|RXFRST|SPIRST);
122 while((ns->regs->ctrl &(TXFRST|RXFRST|SPIRST))&&(ns->to--))
123 if(!ns->to)
124 return -EINVAL;
125
126 ns->cmd_len = 0;
127 format = ns->mode|DATA_LENGTH(8);
128 ns->regs->format = format;
129 __atcspi200_spi_set_speed(ns);
130
131 return 0;
132 }
133
__atcspi200_spi_release_bus(struct nds_spi_slave * ns)134 static int __atcspi200_spi_release_bus(struct nds_spi_slave *ns)
135 {
136 /* do nothing */
137 return 0;
138 }
139
__atcspi200_spi_start(struct nds_spi_slave * ns)140 static int __atcspi200_spi_start(struct nds_spi_slave *ns)
141 {
142 int i,olen=0;
143 int tc = ns->regs->tctrl;
144
145 tc &= ~(WCNT_MASK|RCNT_MASK|TRAMODE_MASK);
146 if ((ns->din)&&(ns->cmd_len))
147 tc |= TRAMODE_WR;
148 else if (ns->din)
149 tc |= TRAMODE_RO;
150 else
151 tc |= TRAMODE_WO;
152
153 if(ns->dout)
154 olen = ns->tran_len;
155 tc |= (ns->cmd_len+olen-1) << WCNT_OFFSET;
156
157 if(ns->din)
158 tc |= (ns->tran_len-1) << RCNT_OFFSET;
159
160 ns->regs->tctrl = tc;
161 ns->regs->cmd = 1;
162
163 for (i=0;i<ns->cmd_len;i++)
164 ns->regs->data = ns->cmd_buf[i];
165
166 return 0;
167 }
168
__atcspi200_spi_stop(struct nds_spi_slave * ns)169 static int __atcspi200_spi_stop(struct nds_spi_slave *ns)
170 {
171 ns->regs->timing = ns->mtiming;
172 while ((ns->regs->status & SPIBSY)&&(ns->to--))
173 if (!ns->to)
174 return -EINVAL;
175
176 return 0;
177 }
178
__nspi_espi_tx(struct nds_spi_slave * ns,const void * dout)179 static void __nspi_espi_tx(struct nds_spi_slave *ns, const void *dout)
180 {
181 ns->regs->data = *(u8 *)dout;
182 }
183
__nspi_espi_rx(struct nds_spi_slave * ns,void * din,unsigned int bytes)184 static int __nspi_espi_rx(struct nds_spi_slave *ns, void *din, unsigned int bytes)
185 {
186 *(u8 *)din = ns->regs->data;
187 return bytes;
188 }
189
190
__atcspi200_spi_xfer(struct nds_spi_slave * ns,unsigned int bitlen,const void * data_out,void * data_in,unsigned long flags)191 static int __atcspi200_spi_xfer(struct nds_spi_slave *ns,
192 unsigned int bitlen, const void *data_out, void *data_in,
193 unsigned long flags)
194 {
195 unsigned int event, rx_bytes;
196 const void *dout = NULL;
197 void *din = NULL;
198 int num_blks, num_chunks, max_tran_len, tran_len;
199 int num_bytes;
200 u8 *cmd_buf = ns->cmd_buf;
201 size_t cmd_len = ns->cmd_len;
202 unsigned long data_len = bitlen / 8;
203 int rf_cnt;
204 int ret = 0;
205
206 max_tran_len = ns->max_transfer_length;
207 switch (flags) {
208 case SPI_XFER_BEGIN:
209 cmd_len = ns->cmd_len = data_len;
210 memcpy(cmd_buf, data_out, cmd_len);
211 return 0;
212
213 case 0:
214 case SPI_XFER_END:
215 if (bitlen == 0) {
216 return 0;
217 }
218 ns->data_len = data_len;
219 ns->din = (u8 *)data_in;
220 ns->dout = (u8 *)data_out;
221 break;
222
223 case SPI_XFER_BEGIN | SPI_XFER_END:
224 ns->data_len = 0;
225 ns->din = 0;
226 ns->dout = 0;
227 cmd_len = ns->cmd_len = data_len;
228 memcpy(cmd_buf, data_out, cmd_len);
229 data_out = 0;
230 data_len = 0;
231 __atcspi200_spi_start(ns);
232 break;
233 }
234 if (data_out)
235 debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\n",
236 *(uint *)data_out, data_out, *(uint *)data_in,
237 data_in, data_len);
238 num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
239 din = data_in;
240 dout = data_out;
241 while (num_chunks--) {
242 tran_len = min((size_t)data_len, (size_t)max_tran_len);
243 ns->tran_len = tran_len;
244 num_blks = DIV_ROUND_UP(tran_len , CHUNK_SIZE);
245 num_bytes = (tran_len) % CHUNK_SIZE;
246 if(num_bytes == 0)
247 num_bytes = CHUNK_SIZE;
248 __atcspi200_spi_start(ns);
249
250 while (num_blks) {
251 event = in_le32(&ns->regs->status);
252 if ((event & TXEPTY) && (data_out)) {
253 __nspi_espi_tx(ns, dout);
254 num_blks -= CHUNK_SIZE;
255 dout += CHUNK_SIZE;
256 }
257
258 if ((event & RXFVE_MASK) && (data_in)) {
259 rf_cnt = ((event & RXFVE_MASK)>> RXFVE_OFFSET);
260 if (rf_cnt >= CHUNK_SIZE)
261 rx_bytes = CHUNK_SIZE;
262 else if (num_blks == 1 && rf_cnt == num_bytes)
263 rx_bytes = num_bytes;
264 else
265 continue;
266
267 if (__nspi_espi_rx(ns, din, rx_bytes) == rx_bytes) {
268 num_blks -= CHUNK_SIZE;
269 din = (unsigned char *)din + rx_bytes;
270 }
271 }
272 }
273
274 data_len -= tran_len;
275 if(data_len)
276 {
277 ns->cmd_buf[1] += ((tran_len>>16)&0xff);
278 ns->cmd_buf[2] += ((tran_len>>8)&0xff);
279 ns->cmd_buf[3] += ((tran_len)&0xff);
280 ns->data_len = data_len;
281 }
282 ret = __atcspi200_spi_stop(ns);
283 }
284 ret = __atcspi200_spi_stop(ns);
285
286 return ret;
287 }
288
atcspi200_spi_set_speed(struct udevice * bus,uint max_hz)289 static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz)
290 {
291 struct nds_spi_slave *ns = dev_get_priv(bus);
292
293 debug("%s speed %u\n", __func__, max_hz);
294
295 ns->freq = max_hz;
296 __atcspi200_spi_set_speed(ns);
297
298 return 0;
299 }
300
atcspi200_spi_set_mode(struct udevice * bus,uint mode)301 static int atcspi200_spi_set_mode(struct udevice *bus, uint mode)
302 {
303 struct nds_spi_slave *ns = dev_get_priv(bus);
304
305 debug("%s mode %u\n", __func__, mode);
306 ns->mode = mode;
307
308 return 0;
309 }
310
atcspi200_spi_claim_bus(struct udevice * dev)311 static int atcspi200_spi_claim_bus(struct udevice *dev)
312 {
313 struct dm_spi_slave_plat *slave_plat =
314 dev_get_parent_plat(dev);
315 struct udevice *bus = dev->parent;
316 struct nds_spi_slave *ns = dev_get_priv(bus);
317
318 if (slave_plat->cs >= ns->num_cs) {
319 printf("Invalid SPI chipselect\n");
320 return -EINVAL;
321 }
322
323 return __atcspi200_spi_claim_bus(ns);
324 }
325
atcspi200_spi_release_bus(struct udevice * dev)326 static int atcspi200_spi_release_bus(struct udevice *dev)
327 {
328 struct nds_spi_slave *ns = dev_get_priv(dev->parent);
329
330 return __atcspi200_spi_release_bus(ns);
331 }
332
atcspi200_spi_xfer(struct udevice * dev,unsigned int bitlen,const void * dout,void * din,unsigned long flags)333 static int atcspi200_spi_xfer(struct udevice *dev, unsigned int bitlen,
334 const void *dout, void *din,
335 unsigned long flags)
336 {
337 struct udevice *bus = dev->parent;
338 struct nds_spi_slave *ns = dev_get_priv(bus);
339
340 return __atcspi200_spi_xfer(ns, bitlen, dout, din, flags);
341 }
342
atcspi200_spi_get_clk(struct udevice * bus)343 static int atcspi200_spi_get_clk(struct udevice *bus)
344 {
345 struct nds_spi_slave *ns = dev_get_priv(bus);
346 struct clk clk;
347 ulong clk_rate;
348 int ret;
349
350 ret = clk_get_by_index(bus, 0, &clk);
351 if (ret)
352 return -EINVAL;
353
354 clk_rate = clk_get_rate(&clk);
355 if (!clk_rate)
356 return -EINVAL;
357
358 ns->clock = clk_rate;
359 clk_free(&clk);
360
361 return 0;
362 }
363
atcspi200_spi_probe(struct udevice * bus)364 static int atcspi200_spi_probe(struct udevice *bus)
365 {
366 struct nds_spi_slave *ns = dev_get_priv(bus);
367
368 ns->to = SPI_TIMEOUT;
369 ns->max_transfer_length = MAX_TRANSFER_LEN;
370 ns->mtiming = ns->regs->timing;
371 atcspi200_spi_get_clk(bus);
372
373 return 0;
374 }
375
atcspi200_ofdata_to_platadata(struct udevice * bus)376 static int atcspi200_ofdata_to_platadata(struct udevice *bus)
377 {
378 struct nds_spi_slave *ns = dev_get_priv(bus);
379 const void *blob = gd->fdt_blob;
380 int node = dev_of_offset(bus);
381
382 ns->regs = map_physmem(dev_read_addr(bus),
383 sizeof(struct atcspi200_spi_regs),
384 MAP_NOCACHE);
385 if (!ns->regs) {
386 printf("%s: could not map device address\n", __func__);
387 return -EINVAL;
388 }
389 ns->num_cs = fdtdec_get_int(blob, node, "num-cs", 4);
390
391 return 0;
392 }
393
394 static const struct dm_spi_ops atcspi200_spi_ops = {
395 .claim_bus = atcspi200_spi_claim_bus,
396 .release_bus = atcspi200_spi_release_bus,
397 .xfer = atcspi200_spi_xfer,
398 .set_speed = atcspi200_spi_set_speed,
399 .set_mode = atcspi200_spi_set_mode,
400 };
401
402 static const struct udevice_id atcspi200_spi_ids[] = {
403 { .compatible = "andestech,atcspi200" },
404 { }
405 };
406
407 U_BOOT_DRIVER(atcspi200_spi) = {
408 .name = "atcspi200_spi",
409 .id = UCLASS_SPI,
410 .of_match = atcspi200_spi_ids,
411 .ops = &atcspi200_spi_ops,
412 .of_to_plat = atcspi200_ofdata_to_platadata,
413 .priv_auto = sizeof(struct nds_spi_slave),
414 .probe = atcspi200_spi_probe,
415 };
416