1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Cr50 / H1 TPM support
4 *
5 * Copyright 2018 Google LLC
6 */
7
8 #define LOG_CATEGORY UCLASS_TPM
9
10 #include <common.h>
11 #include <dm.h>
12 #include <i2c.h>
13 #include <irq.h>
14 #include <log.h>
15 #include <spl.h>
16 #include <tpm-v2.h>
17 #include <acpi/acpigen.h>
18 #include <acpi/acpi_device.h>
19 #include <asm/gpio.h>
20 #include <asm/io.h>
21 #include <asm/arch/iomap.h>
22 #include <asm/arch/pm.h>
23 #include <linux/delay.h>
24 #include <dm/acpi.h>
25
26 enum {
27 TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
28 TIMEOUT_LONG_US = 2 * 1000 * 1000,
29 TIMEOUT_SHORT_US = 2 * 1000,
30 TIMEOUT_NO_IRQ_US = 20 * 1000,
31 TIMEOUT_IRQ_US = 100 * 1000,
32 };
33
34 enum {
35 CR50_DID_VID = 0x00281ae0L
36 };
37
38 enum {
39 CR50_MAX_BUF_SIZE = 63,
40 };
41
42 /**
43 * struct cr50_priv - Private driver data
44 *
45 * @ready_gpio: GPIO to use to check if the TPM is ready
46 * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
47 * @locality: Currenttly claimed locality (-1 if none)
48 * @vendor: vendor: Vendor ID for TPM
49 * @use_irq: true to use @irq, false to use @ready if available
50 */
51 struct cr50_priv {
52 struct gpio_desc ready_gpio;
53 struct irq irq;
54 int locality;
55 uint vendor;
56 bool use_irq;
57 };
58
59 /* Wait for interrupt to indicate TPM is ready */
cr50_i2c_wait_tpm_ready(struct udevice * dev)60 static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
61 {
62 struct cr50_priv *priv = dev_get_priv(dev);
63 ulong timeout, base;
64 int i;
65
66 if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
67 /* Fixed delay if interrupt not supported */
68 udelay(TIMEOUT_NO_IRQ_US);
69 return 0;
70 }
71
72 base = timer_get_us();
73 timeout = base + TIMEOUT_IRQ_US;
74
75 i = 0;
76 while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
77 !dm_gpio_get_value(&priv->ready_gpio)) {
78 i++;
79 if ((int)(timer_get_us() - timeout) >= 0) {
80 log_warning("Timeout\n");
81 /* Use this instead of the -ETIMEDOUT used by i2c */
82 return -ETIME;
83 }
84 }
85 log_debug("i=%d\n", i);
86
87 return 0;
88 }
89
90 /* Clear pending interrupts */
cr50_i2c_clear_tpm_irq(struct udevice * dev)91 static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
92 {
93 struct cr50_priv *priv = dev_get_priv(dev);
94
95 if (priv->use_irq)
96 irq_read_and_clear(&priv->irq);
97 }
98
99 /*
100 * cr50_i2c_read() - read from TPM register
101 *
102 * @dev: TPM chip information
103 * @addr: register address to read from
104 * @buffer: provided by caller
105 * @len: number of bytes to read
106 *
107 * 1) send register address byte 'addr' to the TPM
108 * 2) wait for TPM to indicate it is ready
109 * 3) read 'len' bytes of TPM response into the provided 'buffer'
110 *
111 * Return 0 on success. -ve on error
112 */
cr50_i2c_read(struct udevice * dev,u8 addr,u8 * buffer,size_t len)113 static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
114 size_t len)
115 {
116 int ret;
117
118 /* Clear interrupt before starting transaction */
119 cr50_i2c_clear_tpm_irq(dev);
120
121 /* Send the register address byte to the TPM */
122 ret = dm_i2c_write(dev, 0, &addr, 1);
123 if (ret) {
124 log_err("Address write failed (err=%d)\n", ret);
125 return ret;
126 }
127
128 /* Wait for TPM to be ready with response data */
129 ret = cr50_i2c_wait_tpm_ready(dev);
130 if (ret)
131 return ret;
132
133 /* Read response data frrom the TPM */
134 ret = dm_i2c_read(dev, 0, buffer, len);
135 if (ret) {
136 log_err("Read response failed (err=%d)\n", ret);
137 return ret;
138 }
139
140 return 0;
141 }
142
143 /*
144 * cr50_i2c_write() - write to TPM register
145 *
146 * @dev: TPM chip information
147 * @addr: register address to write to
148 * @buffer: data to write
149 * @len: number of bytes to write
150 *
151 * 1) prepend the provided address to the provided data
152 * 2) send the address+data to the TPM
153 * 3) wait for TPM to indicate it is done writing
154 *
155 * Returns -1 on error, 0 on success.
156 */
cr50_i2c_write(struct udevice * dev,u8 addr,const u8 * buffer,size_t len)157 static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
158 size_t len)
159 {
160 u8 buf[len + 1];
161 int ret;
162
163 if (len > CR50_MAX_BUF_SIZE) {
164 log_err("Length %zd is too large\n", len);
165 return -E2BIG;
166 }
167
168 /* Prepend the 'register address' to the buffer */
169 buf[0] = addr;
170 memcpy(buf + 1, buffer, len);
171
172 /* Clear interrupt before starting transaction */
173 cr50_i2c_clear_tpm_irq(dev);
174
175 /* Send write request buffer with address */
176 ret = dm_i2c_write(dev, 0, buf, len + 1);
177 if (ret) {
178 log_err("Error writing to TPM (err=%d)\n", ret);
179 return ret;
180 }
181
182 /* Wait for TPM to be ready */
183 return cr50_i2c_wait_tpm_ready(dev);
184 }
185
tpm_access(int locality)186 static inline u8 tpm_access(int locality)
187 {
188 if (locality == -1)
189 locality = 0;
190 return 0x0 | (locality << 4);
191 }
192
tpm_sts(int locality)193 static inline u8 tpm_sts(int locality)
194 {
195 if (locality == -1)
196 locality = 0;
197 return 0x1 | (locality << 4);
198 }
199
tpm_data_fifo(int locality)200 static inline u8 tpm_data_fifo(int locality)
201 {
202 if (locality == -1)
203 locality = 0;
204 return 0x5 | (locality << 4);
205 }
206
tpm_did_vid(int locality)207 static inline u8 tpm_did_vid(int locality)
208 {
209 if (locality == -1)
210 locality = 0;
211 return 0x6 | (locality << 4);
212 }
213
release_locality(struct udevice * dev,int force)214 static int release_locality(struct udevice *dev, int force)
215 {
216 struct cr50_priv *priv = dev_get_priv(dev);
217 u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
218 u8 addr = tpm_access(priv->locality);
219 int ret;
220 u8 buf;
221
222 ret = cr50_i2c_read(dev, addr, &buf, 1);
223 if (ret)
224 return ret;
225
226 if (force || (buf & mask) == mask) {
227 buf = TPM_ACCESS_ACTIVE_LOCALITY;
228 cr50_i2c_write(dev, addr, &buf, 1);
229 }
230
231 priv->locality = -1;
232
233 return 0;
234 }
235
236 /* cr50 requires all 4 bytes of status register to be read */
cr50_i2c_status(struct udevice * dev)237 static int cr50_i2c_status(struct udevice *dev)
238 {
239 struct cr50_priv *priv = dev_get_priv(dev);
240 u8 buf[4];
241 int ret;
242
243 ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
244 if (ret) {
245 log_warning("%s: Failed to read status\n", __func__);
246 return ret;
247 }
248
249 return buf[0];
250 }
251
252 /* cr50 requires all 4 bytes of status register to be written */
cr50_i2c_ready(struct udevice * dev)253 static int cr50_i2c_ready(struct udevice *dev)
254 {
255 struct cr50_priv *priv = dev_get_priv(dev);
256 u8 buf[4] = { TPM_STS_COMMAND_READY };
257 int ret;
258
259 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
260 if (ret)
261 return ret;
262
263 udelay(TIMEOUT_SHORT_US);
264
265 return 0;
266 }
267
cr50_i2c_wait_burststs(struct udevice * dev,u8 mask,size_t * burst,int * status)268 static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
269 size_t *burst, int *status)
270 {
271 struct cr50_priv *priv = dev_get_priv(dev);
272 ulong timeout;
273 u32 buf;
274
275 /*
276 * cr50 uses bytes 3:2 of status register for burst count and all 4
277 * bytes must be read
278 */
279 timeout = timer_get_us() + TIMEOUT_LONG_US;
280 while (timer_get_us() < timeout) {
281 if (cr50_i2c_read(dev, tpm_sts(priv->locality),
282 (u8 *)&buf, sizeof(buf)) < 0) {
283 udelay(TIMEOUT_SHORT_US);
284 continue;
285 }
286
287 *status = buf & 0xff;
288 *burst = le16_to_cpu((buf >> 8) & 0xffff);
289
290 if ((*status & mask) == mask &&
291 *burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
292 return 0;
293
294 udelay(TIMEOUT_SHORT_US);
295 }
296
297 log_warning("Timeout reading burst and status\n");
298
299 return -ETIMEDOUT;
300 }
301
cr50_i2c_recv(struct udevice * dev,u8 * buf,size_t buf_len)302 static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
303 {
304 struct cr50_priv *priv = dev_get_priv(dev);
305 size_t burstcnt, expected, current, len;
306 u8 addr = tpm_data_fifo(priv->locality);
307 u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
308 u32 expected_buf;
309 int status;
310 int ret;
311
312 log_debug("%s: len=%x\n", __func__, buf_len);
313 if (buf_len < TPM_HEADER_SIZE)
314 return -E2BIG;
315
316 ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
317 if (ret < 0) {
318 log_warning("First chunk not available\n");
319 goto out_err;
320 }
321
322 /* Read first chunk of burstcnt bytes */
323 if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
324 log_warning("Read failed\n");
325 goto out_err;
326 }
327
328 /* Determine expected data in the return buffer */
329 memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
330 expected = be32_to_cpu(expected_buf);
331 if (expected > buf_len) {
332 log_warning("Too much data: %zu > %zu\n", expected, buf_len);
333 goto out_err;
334 }
335
336 /* Now read the rest of the data */
337 current = burstcnt;
338 while (current < expected) {
339 /* Read updated burst count and check status */
340 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
341 log_warning("- burst failure1\n");
342 goto out_err;
343 }
344
345 len = min(burstcnt, expected - current);
346 if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
347 log_warning("Read failed\n");
348 goto out_err;
349 }
350
351 current += len;
352 }
353
354 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
355 &status) < 0) {
356 log_warning("- burst failure2\n");
357 goto out_err;
358 }
359 if (status & TPM_STS_DATA_AVAIL) {
360 log_warning("Data still available\n");
361 goto out_err;
362 }
363
364 return current;
365
366 out_err:
367 /* Abort current transaction if still pending */
368 ret = cr50_i2c_status(dev);
369 if (ret < 0)
370 return ret;
371 if (ret & TPM_STS_COMMAND_READY) {
372 ret = cr50_i2c_ready(dev);
373 if (ret)
374 return ret;
375 }
376
377 return -EIO;
378 }
379
cr50_i2c_send(struct udevice * dev,const u8 * buf,size_t len)380 static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
381 {
382 struct cr50_priv *priv = dev_get_priv(dev);
383 int status;
384 size_t burstcnt, limit, sent = 0;
385 u8 tpm_go[4] = { TPM_STS_GO };
386 ulong timeout;
387 int ret;
388
389 log_debug("%s: len=%x\n", __func__, len);
390 timeout = timer_get_us() + TIMEOUT_LONG_US;
391 do {
392 ret = cr50_i2c_status(dev);
393 if (ret < 0)
394 goto out_err;
395 if (ret & TPM_STS_COMMAND_READY)
396 break;
397
398 if (timer_get_us() > timeout)
399 goto out_err;
400
401 ret = cr50_i2c_ready(dev);
402 if (ret)
403 goto out_err;
404 } while (1);
405
406 while (len > 0) {
407 u8 mask = TPM_STS_VALID;
408
409 /* Wait for data if this is not the first chunk */
410 if (sent > 0)
411 mask |= TPM_STS_DATA_EXPECT;
412
413 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
414 goto out_err;
415
416 /*
417 * Use burstcnt - 1 to account for the address byte
418 * that is inserted by cr50_i2c_write()
419 */
420 limit = min(burstcnt - 1, len);
421 if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
422 &buf[sent], limit) != 0) {
423 log_warning("Write failed\n");
424 goto out_err;
425 }
426
427 sent += limit;
428 len -= limit;
429 }
430
431 /* Ensure TPM is not expecting more data */
432 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
433 goto out_err;
434 if (status & TPM_STS_DATA_EXPECT) {
435 log_warning("Data still expected\n");
436 goto out_err;
437 }
438
439 /* Start the TPM command */
440 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
441 sizeof(tpm_go));
442 if (ret) {
443 log_warning("Start command failed\n");
444 goto out_err;
445 }
446
447 return sent;
448
449 out_err:
450 /* Abort current transaction if still pending */
451 ret = cr50_i2c_status(dev);
452
453 if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
454 ret = cr50_i2c_ready(dev);
455 if (ret)
456 return ret;
457 }
458
459 return -EIO;
460 }
461
462 /**
463 * process_reset() - Wait for the Cr50 to reset
464 *
465 * Cr50 processes reset requests asynchronously and conceivably could be busy
466 * executing a long command and not reacting to the reset pulse for a while.
467 *
468 * This function will make sure that the AP does not proceed with boot until
469 * TPM finished reset processing.
470 *
471 * @dev: Cr50 device
472 * @return 0 if OK, -EPERM if locality could not be taken
473 */
process_reset(struct udevice * dev)474 static int process_reset(struct udevice *dev)
475 {
476 const int loc = 0;
477 u8 access;
478 ulong start;
479
480 /*
481 * Locality is released by TPM reset.
482 *
483 * If locality is taken at this point, this could be due to the fact
484 * that the TPM is performing a long operation and has not processed
485 * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
486 * it releases locality when reset is processed.
487 */
488 start = get_timer(0);
489 do {
490 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
491 int ret;
492
493 ret = cr50_i2c_read(dev, tpm_access(loc),
494 &access, sizeof(access));
495 if (ret || ((access & mask) == mask)) {
496 /*
497 * Don't bombard the chip with traffic; let it keep
498 * processing the command.
499 */
500 mdelay(2);
501 continue;
502 }
503
504 log_debug("TPM ready after %ld ms\n", get_timer(start));
505
506 return 0;
507 } while (get_timer(start) < TIMEOUT_INIT_MS);
508
509 log_err("TPM failed to reset after %ld ms, status: %#x\n",
510 get_timer(start), access);
511
512 return -EPERM;
513 }
514
515 /*
516 * Locality could be already claimed (if this is a later U-Boot phase and the
517 * read-only U-Boot did not release it), or not yet claimed, if this is TPL or
518 * the older read-only U-Boot did release it.
519 */
claim_locality(struct udevice * dev,int loc)520 static int claim_locality(struct udevice *dev, int loc)
521 {
522 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
523 struct cr50_priv *priv = dev_get_priv(dev);
524 u8 access;
525 int ret;
526
527 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
528 if (ret)
529 return log_msg_ret("read1", ret);
530
531 if ((access & mask) == mask) {
532 log_warning("Locality already claimed\n");
533 return 0;
534 }
535
536 access = TPM_ACCESS_REQUEST_USE;
537 ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
538 if (ret)
539 return log_msg_ret("write", ret);
540
541 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
542 if (ret)
543 return log_msg_ret("read2", ret);
544
545 if ((access & mask) != mask) {
546 log_err("Failed to claim locality\n");
547 return -EPERM;
548 }
549 log_debug("Claimed locality %d\n", loc);
550 priv->locality = loc;
551
552 return 0;
553 }
554
cr50_i2c_get_desc(struct udevice * dev,char * buf,int size)555 static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
556 {
557 struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
558 struct cr50_priv *priv = dev_get_priv(dev);
559 int len;
560
561 len = snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x), ",
562 chip->chip_addr, priv->vendor >> 16);
563 if (priv->use_irq) {
564 len += snprintf(buf + len, size - len, "irq=%s/%ld",
565 priv->irq.dev->name, priv->irq.id);
566 } else if (dm_gpio_is_valid(&priv->ready_gpio)) {
567 len += snprintf(buf + len, size - len, "gpio=%s/%u",
568 priv->ready_gpio.dev->name,
569 priv->ready_gpio.offset);
570 } else {
571 len += snprintf(buf + len, size - len, "delay=%d",
572 TIMEOUT_NO_IRQ_US);
573 }
574
575 return len;
576 }
577
cr50_i2c_open(struct udevice * dev)578 static int cr50_i2c_open(struct udevice *dev)
579 {
580 char buf[80];
581 int ret;
582
583 ret = process_reset(dev);
584 if (ret)
585 return log_msg_ret("reset", ret);
586
587 ret = claim_locality(dev, 0);
588 if (ret)
589 return log_msg_ret("claim", ret);
590
591 cr50_i2c_get_desc(dev, buf, sizeof(buf));
592 log_debug("%s\n", buf);
593
594 return 0;
595 }
596
cr50_i2c_cleanup(struct udevice * dev)597 static int cr50_i2c_cleanup(struct udevice *dev)
598 {
599 struct cr50_priv *priv = dev_get_priv(dev);
600
601 log_debug("cleanup %d\n", priv->locality);
602 if (priv->locality != -1)
603 release_locality(dev, 1);
604
605 return 0;
606 }
607
cr50_acpi_fill_ssdt(const struct udevice * dev,struct acpi_ctx * ctx)608 static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
609 {
610 char scope[ACPI_PATH_MAX];
611 char name[ACPI_NAME_MAX];
612 const char *hid;
613 int ret;
614
615 ret = acpi_device_scope(dev, scope, sizeof(scope));
616 if (ret)
617 return log_msg_ret("scope", ret);
618 ret = acpi_get_name(dev, name);
619 if (ret)
620 return log_msg_ret("name", ret);
621
622 hid = dev_read_string(dev, "acpi,hid");
623 if (!hid)
624 return log_msg_ret("hid", ret);
625
626 /* Device */
627 acpigen_write_scope(ctx, scope);
628 acpigen_write_device(ctx, name);
629 acpigen_write_name_string(ctx, "_HID", hid);
630 acpigen_write_name_integer(ctx, "_UID",
631 dev_read_u32_default(dev, "acpi,uid", 0));
632 acpigen_write_name_string(ctx, "_DDN",
633 dev_read_string(dev, "acpi,ddn"));
634 acpigen_write_sta(ctx, acpi_device_status(dev));
635
636 /* Resources */
637 acpigen_write_name(ctx, "_CRS");
638 acpigen_write_resourcetemplate_header(ctx);
639 ret = acpi_device_write_i2c_dev(ctx, dev);
640 if (ret < 0)
641 return log_msg_ret("i2c", ret);
642 ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
643 "ready-gpios");
644 if (ret < 0)
645 return log_msg_ret("irq_gpio", ret);
646
647 acpigen_write_resourcetemplate_footer(ctx);
648
649 acpigen_pop_len(ctx); /* Device */
650 acpigen_pop_len(ctx); /* Scope */
651
652 return 0;
653 }
654
655 enum {
656 TPM_TIMEOUT_MS = 5,
657 SHORT_TIMEOUT_MS = 750,
658 LONG_TIMEOUT_MS = 2000,
659 };
660
cr50_i2c_of_to_plat(struct udevice * dev)661 static int cr50_i2c_of_to_plat(struct udevice *dev)
662 {
663 struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
664 struct cr50_priv *priv = dev_get_priv(dev);
665 struct irq irq;
666 int ret;
667
668 upriv->version = TPM_V2;
669 upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
670 upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
671 upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
672 upriv->retry_time_ms = TPM_TIMEOUT_MS;
673
674 upriv->pcr_count = 32;
675 upriv->pcr_select_min = 2;
676
677 /* Optional GPIO to track when cr50 is ready */
678 ret = irq_get_by_index(dev, 0, &irq);
679 if (!ret) {
680 priv->irq = irq;
681 priv->use_irq = true;
682 } else {
683 ret = gpio_request_by_name(dev, "ready-gpios", 0,
684 &priv->ready_gpio, GPIOD_IS_IN);
685 if (ret) {
686 log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
687 ret);
688 }
689 }
690
691 return 0;
692 }
693
cr50_i2c_probe(struct udevice * dev)694 static int cr50_i2c_probe(struct udevice *dev)
695 {
696 struct cr50_priv *priv = dev_get_priv(dev);
697 u32 vendor = 0;
698 ulong start;
699
700 /*
701 * 150ms should be enough to synchronise with the TPM even under the
702 * worst nested-reset-request conditions. In the vast majority of cases
703 * there will be no wait at all.
704 */
705 start = get_timer(0);
706 while (get_timer(start) < 150) {
707 int ret;
708
709 /* Exit once DID and VID verified */
710 ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
711 if (!ret && vendor == CR50_DID_VID)
712 break;
713
714 /* TPM might be resetting; let's retry in a bit */
715 mdelay(10);
716 }
717 if (vendor != CR50_DID_VID) {
718 log_warning("DID_VID %08x not recognised\n", vendor);
719 return log_msg_ret("vendor-id", -EXDEV);
720 }
721 priv->vendor = vendor;
722 priv->locality = -1;
723 log_debug("Cr50 ready\n");
724
725 return 0;
726 }
727
728 struct acpi_ops cr50_acpi_ops = {
729 .fill_ssdt = cr50_acpi_fill_ssdt,
730 };
731
732 static const struct tpm_ops cr50_i2c_ops = {
733 .open = cr50_i2c_open,
734 .get_desc = cr50_i2c_get_desc,
735 .send = cr50_i2c_send,
736 .recv = cr50_i2c_recv,
737 .cleanup = cr50_i2c_cleanup,
738 };
739
740 static const struct udevice_id cr50_i2c_ids[] = {
741 { .compatible = "google,cr50" },
742 { }
743 };
744
745 U_BOOT_DRIVER(google_cr50) = {
746 .name = "google_cr50",
747 .id = UCLASS_TPM,
748 .of_match = cr50_i2c_ids,
749 .ops = &cr50_i2c_ops,
750 .of_to_plat = cr50_i2c_of_to_plat,
751 .probe = cr50_i2c_probe,
752 .remove = cr50_i2c_cleanup,
753 .priv_auto = sizeof(struct cr50_priv),
754 ACPI_OPS_PTR(&cr50_acpi_ops)
755 .flags = DM_FLAG_OS_PREPARE,
756 };
757