1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * STMicroelectronics TPM ST33ZP24 SPI UBOOT driver
4 *
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
6 * Author(s): Christophe Ricard <christophe-h.ricard@st.com> for STMicroelectronics.
7 *
8 * Description: Device driver for ST33ZP24 SPI TPM TCG.
9 *
10 * This device driver implements the TPM interface as defined in
11 * the TCG TPM Interface Spec version 1.21, revision 1.0 and the
12 * STMicroelectronics Protocol Stack Specification version 1.2.0.
13 */
14
15 #include <common.h>
16 #include <dm.h>
17 #include <fdtdec.h>
18 #include <log.h>
19 #include <spi.h>
20 #include <tpm-v1.h>
21 #include <errno.h>
22 #include <linux/delay.h>
23 #include <linux/types.h>
24 #include <asm/unaligned.h>
25 #include <linux/compat.h>
26
27 #include "tpm_tis.h"
28 #include "tpm_internal.h"
29
30 #define TPM_ACCESS 0x0
31 #define TPM_STS 0x18
32 #define TPM_DATA_FIFO 0x24
33
34 #define LOCALITY0 0
35
36 #define TPM_DATA_FIFO 0x24
37 #define TPM_INTF_CAPABILITY 0x14
38
39 #define TPM_DUMMY_BYTE 0x00
40 #define TPM_WRITE_DIRECTION 0x80
41
42 #define MAX_SPI_LATENCY 15
43 #define LOCALITY0 0
44
45 #define ST33ZP24_OK 0x5A
46 #define ST33ZP24_UNDEFINED_ERR 0x80
47 #define ST33ZP24_BADLOCALITY 0x81
48 #define ST33ZP24_TISREGISTER_UKNOWN 0x82
49 #define ST33ZP24_LOCALITY_NOT_ACTIVATED 0x83
50 #define ST33ZP24_HASH_END_BEFORE_HASH_START 0x84
51 #define ST33ZP24_BAD_COMMAND_ORDER 0x85
52 #define ST33ZP24_INCORECT_RECEIVED_LENGTH 0x86
53 #define ST33ZP24_TPM_FIFO_OVERFLOW 0x89
54 #define ST33ZP24_UNEXPECTED_READ_FIFO 0x8A
55 #define ST33ZP24_UNEXPECTED_WRITE_FIFO 0x8B
56 #define ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END 0x90
57 #define ST33ZP24_DUMMY_BYTES 0x00
58
59 /*
60 * TPM command can be up to 2048 byte, A TPM response can be up to
61 * 1024 byte.
62 * Between command and response, there are latency byte (up to 15
63 * usually on st33zp24 2 are enough).
64 *
65 * Overall when sending a command and expecting an answer we need if
66 * worst case:
67 * 2048 (for the TPM command) + 1024 (for the TPM answer). We need
68 * some latency byte before the answer is available (max 15).
69 * We have 2048 + 1024 + 15.
70 */
71 #define ST33ZP24_SPI_BUFFER_SIZE (TPM_BUFSIZE + (TPM_BUFSIZE / 2) +\
72 MAX_SPI_LATENCY)
73
74 struct st33zp24_spi_phy {
75 int latency;
76
77 u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE];
78 u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE];
79 };
80
st33zp24_spi_status_to_errno(u8 code)81 static int st33zp24_spi_status_to_errno(u8 code)
82 {
83 switch (code) {
84 case ST33ZP24_OK:
85 return 0;
86 case ST33ZP24_UNDEFINED_ERR:
87 case ST33ZP24_BADLOCALITY:
88 case ST33ZP24_TISREGISTER_UKNOWN:
89 case ST33ZP24_LOCALITY_NOT_ACTIVATED:
90 case ST33ZP24_HASH_END_BEFORE_HASH_START:
91 case ST33ZP24_BAD_COMMAND_ORDER:
92 case ST33ZP24_UNEXPECTED_READ_FIFO:
93 case ST33ZP24_UNEXPECTED_WRITE_FIFO:
94 case ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END:
95 return -EPROTO;
96 case ST33ZP24_INCORECT_RECEIVED_LENGTH:
97 case ST33ZP24_TPM_FIFO_OVERFLOW:
98 return -EMSGSIZE;
99 case ST33ZP24_DUMMY_BYTES:
100 return -ENOSYS;
101 }
102 return code;
103 }
104
105 /*
106 * st33zp24_spi_send
107 * Send byte to TPM register according to the ST33ZP24 SPI protocol.
108 * @param: tpm, the chip description
109 * @param: tpm_register, the tpm tis register where the data should be written
110 * @param: tpm_data, the tpm_data to write inside the tpm_register
111 * @param: tpm_size, The length of the data
112 * @return: should be zero if success else a negative error code.
113 */
st33zp24_spi_write(struct udevice * dev,u8 tpm_register,const u8 * tpm_data,size_t tpm_size)114 static int st33zp24_spi_write(struct udevice *dev, u8 tpm_register,
115 const u8 *tpm_data, size_t tpm_size)
116 {
117 int total_length = 0, ret;
118 struct spi_slave *slave = dev_get_parent_priv(dev);
119 struct st33zp24_spi_phy *phy = dev_get_plat(dev);
120
121 u8 *tx_buf = (u8 *)phy->tx_buf;
122 u8 *rx_buf = phy->rx_buf;
123
124 tx_buf[total_length++] = TPM_WRITE_DIRECTION | LOCALITY0;
125 tx_buf[total_length++] = tpm_register;
126
127 if (tpm_size > 0 && tpm_register == TPM_DATA_FIFO) {
128 tx_buf[total_length++] = tpm_size >> 8;
129 tx_buf[total_length++] = tpm_size;
130 }
131 memcpy(tx_buf + total_length, tpm_data, tpm_size);
132 total_length += tpm_size;
133
134 memset(tx_buf + total_length, TPM_DUMMY_BYTE, phy->latency);
135
136 total_length += phy->latency;
137
138 ret = spi_claim_bus(slave);
139 if (ret < 0)
140 return ret;
141
142 ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
143 SPI_XFER_BEGIN | SPI_XFER_END);
144 if (ret < 0)
145 return ret;
146
147 spi_release_bus(slave);
148
149 if (ret == 0)
150 ret = rx_buf[total_length - 1];
151
152 return st33zp24_spi_status_to_errno(ret);
153 }
154
155 /*
156 * spi_st33zp24_spi_read8_reg
157 * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
158 * @param: tpm, the chip description
159 * @param: tpm_loc, the locality to read register from
160 * @param: tpm_register, the tpm tis register where the data should be read
161 * @param: tpm_data, the TPM response
162 * @param: tpm_size, tpm TPM response size to read.
163 * @return: should be zero if success else a negative error code.
164 */
st33zp24_spi_read8_reg(struct udevice * dev,u8 tpm_register,u8 * tpm_data,size_t tpm_size)165 static u8 st33zp24_spi_read8_reg(struct udevice *dev, u8 tpm_register,
166 u8 *tpm_data, size_t tpm_size)
167 {
168 int total_length = 0, ret;
169 struct spi_slave *slave = dev_get_parent_priv(dev);
170 struct st33zp24_spi_phy *phy = dev_get_plat(dev);
171
172 u8 *tx_buf = (u8 *)phy->tx_buf;
173 u8 *rx_buf = phy->rx_buf;
174
175 /* Pre-Header */
176 tx_buf[total_length++] = LOCALITY0;
177 tx_buf[total_length++] = tpm_register;
178
179 memset(&tx_buf[total_length], TPM_DUMMY_BYTE,
180 phy->latency + tpm_size);
181 total_length += phy->latency + tpm_size;
182
183 ret = spi_claim_bus(slave);
184 if (ret < 0)
185 return 0;
186
187 ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
188 SPI_XFER_BEGIN | SPI_XFER_END);
189 if (ret < 0)
190 return 0;
191
192 spi_release_bus(slave);
193
194 if (tpm_size > 0 && ret == 0) {
195 ret = rx_buf[total_length - tpm_size - 1];
196 memcpy(tpm_data, rx_buf + total_length - tpm_size, tpm_size);
197 }
198 return ret;
199 }
200
201 /*
202 * st33zp24_spi_recv
203 * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
204 * @param: phy_id, the phy description
205 * @param: tpm_register, the tpm tis register where the data should be read
206 * @param: tpm_data, the TPM response
207 * @param: tpm_size, tpm TPM response size to read.
208 * @return: number of byte read successfully: should be one if success.
209 */
st33zp24_spi_read(struct udevice * dev,u8 tpm_register,u8 * tpm_data,size_t tpm_size)210 static int st33zp24_spi_read(struct udevice *dev, u8 tpm_register,
211 u8 *tpm_data, size_t tpm_size)
212 {
213 int ret;
214
215 ret = st33zp24_spi_read8_reg(dev, tpm_register, tpm_data, tpm_size);
216 if (!st33zp24_spi_status_to_errno(ret))
217 return tpm_size;
218
219 return ret;
220 }
221
st33zp24_spi_evaluate_latency(struct udevice * dev)222 static int st33zp24_spi_evaluate_latency(struct udevice *dev)
223 {
224 int latency = 1, status = 0;
225 u8 data = 0;
226 struct st33zp24_spi_phy *phy = dev_get_plat(dev);
227
228 while (!status && latency < MAX_SPI_LATENCY) {
229 phy->latency = latency;
230 status = st33zp24_spi_read8_reg(dev, TPM_INTF_CAPABILITY,
231 &data, 1);
232 latency++;
233 }
234 if (status < 0)
235 return status;
236 if (latency == MAX_SPI_LATENCY)
237 return -ENODEV;
238
239 return latency - 1;
240 }
241
242 /*
243 * st33zp24_spi_release_locality release the active locality
244 * @param: chip, the tpm chip description.
245 */
st33zp24_spi_release_locality(struct udevice * dev)246 static void st33zp24_spi_release_locality(struct udevice *dev)
247 {
248 u8 data = TPM_ACCESS_ACTIVE_LOCALITY;
249
250 st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
251 }
252
253 /*
254 * st33zp24_spi_check_locality if the locality is active
255 * @param: chip, the tpm chip description
256 * @return: the active locality or -EACCES.
257 */
st33zp24_spi_check_locality(struct udevice * dev)258 static int st33zp24_spi_check_locality(struct udevice *dev)
259 {
260 u8 data;
261 u8 status;
262 struct tpm_chip *chip = dev_get_priv(dev);
263
264 status = st33zp24_spi_read(dev, TPM_ACCESS, &data, 1);
265 if (status && (data &
266 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
267 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
268 return chip->locality;
269
270 return -EACCES;
271 }
272
273 /*
274 * st33zp24_spi_request_locality request the TPM locality
275 * @param: chip, the chip description
276 * @return: the active locality or negative value.
277 */
st33zp24_spi_request_locality(struct udevice * dev)278 static int st33zp24_spi_request_locality(struct udevice *dev)
279 {
280 unsigned long start, stop;
281 long ret;
282 u8 data;
283 struct tpm_chip *chip = dev_get_priv(dev);
284
285 if (st33zp24_spi_check_locality(dev) == chip->locality)
286 return chip->locality;
287
288 data = TPM_ACCESS_REQUEST_USE;
289 ret = st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
290 if (ret < 0)
291 return ret;
292
293 /* wait for locality activated */
294 start = get_timer(0);
295 stop = chip->timeout_a;
296 do {
297 if (st33zp24_spi_check_locality(dev) >= 0)
298 return chip->locality;
299 udelay(TPM_TIMEOUT_MS * 1000);
300 } while (get_timer(start) < stop);
301
302 return -EACCES;
303 }
304
305 /*
306 * st33zp24_spi_status return the TPM_STS register
307 * @param: chip, the tpm chip description
308 * @return: the TPM_STS register value.
309 */
st33zp24_spi_status(struct udevice * dev)310 static u8 st33zp24_spi_status(struct udevice *dev)
311 {
312 u8 data;
313
314 st33zp24_spi_read(dev, TPM_STS, &data, 1);
315 return data;
316 }
317
318 /*
319 * st33zp24_spi_get_burstcount return the burstcount address 0x19 0x1A
320 * @param: chip, the chip description
321 * return: the burstcount or -TPM_DRIVER_ERR in case of error.
322 */
st33zp24_spi_get_burstcount(struct udevice * dev)323 static int st33zp24_spi_get_burstcount(struct udevice *dev)
324 {
325 struct tpm_chip *chip = dev_get_priv(dev);
326 unsigned long start, stop;
327 int burstcnt, status;
328 u8 tpm_reg, temp;
329
330 /* wait for burstcount */
331 start = get_timer(0);
332 stop = chip->timeout_d;
333 do {
334 tpm_reg = TPM_STS + 1;
335 status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
336 if (status < 0)
337 return -EBUSY;
338
339 tpm_reg = TPM_STS + 2;
340 burstcnt = temp;
341 status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
342 if (status < 0)
343 return -EBUSY;
344
345 burstcnt |= temp << 8;
346 if (burstcnt)
347 return burstcnt;
348 udelay(TIS_SHORT_TIMEOUT_MS * 1000);
349 } while (get_timer(start) < stop);
350
351 return -EBUSY;
352 }
353
354 /*
355 * st33zp24_spi_cancel, cancel the current command execution or
356 * set STS to COMMAND READY.
357 * @param: chip, tpm_chip description.
358 */
st33zp24_spi_cancel(struct udevice * dev)359 static void st33zp24_spi_cancel(struct udevice *dev)
360 {
361 u8 data;
362
363 data = TPM_STS_COMMAND_READY;
364 st33zp24_spi_write(dev, TPM_STS, &data, 1);
365 }
366
367 /*
368 * st33zp24_spi_wait_for_stat wait for a TPM_STS value
369 * @param: chip, the tpm chip description
370 * @param: mask, the value mask to wait
371 * @param: timeout, the timeout
372 * @param: status,
373 * @return: the tpm status, 0 if success, -ETIME if timeout is reached.
374 */
st33zp24_spi_wait_for_stat(struct udevice * dev,u8 mask,unsigned long timeout,int * status)375 static int st33zp24_spi_wait_for_stat(struct udevice *dev, u8 mask,
376 unsigned long timeout, int *status)
377 {
378 unsigned long start, stop;
379
380 /* Check current status */
381 *status = st33zp24_spi_status(dev);
382 if ((*status & mask) == mask)
383 return 0;
384
385 start = get_timer(0);
386 stop = timeout;
387 do {
388 udelay(TPM_TIMEOUT_MS * 1000);
389 *status = st33zp24_spi_status(dev);
390 if ((*status & mask) == mask)
391 return 0;
392 } while (get_timer(start) < stop);
393
394 return -ETIME;
395 }
396
397 /*
398 * st33zp24_spi_recv_data receive data
399 * @param: chip, the tpm chip description
400 * @param: buf, the buffer where the data are received
401 * @param: count, the number of data to receive
402 * @return: the number of bytes read from TPM FIFO.
403 */
st33zp24_spi_recv_data(struct udevice * dev,u8 * buf,size_t count)404 static int st33zp24_spi_recv_data(struct udevice *dev, u8 *buf, size_t count)
405 {
406 struct tpm_chip *chip = dev_get_priv(dev);
407 int size = 0, burstcnt, len, ret, status;
408
409 while (size < count &&
410 st33zp24_spi_wait_for_stat(dev, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
411 chip->timeout_c, &status) == 0) {
412 burstcnt = st33zp24_spi_get_burstcount(dev);
413 if (burstcnt < 0)
414 return burstcnt;
415 len = min_t(int, burstcnt, count - size);
416 ret = st33zp24_spi_read(dev, TPM_DATA_FIFO, buf + size, len);
417 if (ret < 0)
418 return ret;
419
420 size += len;
421 }
422 return size;
423 }
424
425 /*
426 * st33zp24_spi_recv received TPM response through TPM phy.
427 * @param: chip, tpm_chip description.
428 * @param: buf, the buffer to store data.
429 * @param: count, the number of bytes that can received (sizeof buf).
430 * @return: Returns zero in case of success else -EIO.
431 */
st33zp24_spi_recv(struct udevice * dev,u8 * buf,size_t count)432 static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count)
433 {
434 struct tpm_chip *chip = dev_get_priv(dev);
435 int size;
436 unsigned int expected;
437
438 if (!chip)
439 return -ENODEV;
440
441 if (count < TPM_HEADER_SIZE) {
442 size = -EIO;
443 goto out;
444 }
445
446 size = st33zp24_spi_recv_data(dev, buf, TPM_HEADER_SIZE);
447 if (size < TPM_HEADER_SIZE) {
448 debug("TPM error, unable to read header\n");
449 goto out;
450 }
451
452 expected = get_unaligned_be32(buf + 2);
453 if (expected > count || expected < TPM_HEADER_SIZE) {
454 size = -EIO;
455 goto out;
456 }
457
458 size += st33zp24_spi_recv_data(dev, &buf[TPM_HEADER_SIZE],
459 expected - TPM_HEADER_SIZE);
460 if (size < expected) {
461 debug("TPM error, unable to read remaining bytes of result\n");
462 size = -EIO;
463 goto out;
464 }
465
466 out:
467 st33zp24_spi_cancel(dev);
468 st33zp24_spi_release_locality(dev);
469
470 return size;
471 }
472
473 /*
474 * st33zp24_spi_send send TPM commands through TPM phy.
475 * @param: chip, tpm_chip description.
476 * @param: buf, the buffer to send.
477 * @param: len, the number of bytes to send.
478 * @return: Returns zero in case of success else the negative error code.
479 */
st33zp24_spi_send(struct udevice * dev,const u8 * buf,size_t len)480 static int st33zp24_spi_send(struct udevice *dev, const u8 *buf, size_t len)
481 {
482 struct tpm_chip *chip = dev_get_priv(dev);
483 u32 i, size;
484 int burstcnt, ret, status;
485 u8 data, tpm_stat;
486
487 if (!chip)
488 return -ENODEV;
489 if (len < TPM_HEADER_SIZE)
490 return -EIO;
491
492 ret = st33zp24_spi_request_locality(dev);
493 if (ret < 0)
494 return ret;
495
496 tpm_stat = st33zp24_spi_status(dev);
497 if ((tpm_stat & TPM_STS_COMMAND_READY) == 0) {
498 st33zp24_spi_cancel(dev);
499 if (st33zp24_spi_wait_for_stat(dev, TPM_STS_COMMAND_READY,
500 chip->timeout_b, &status) < 0) {
501 ret = -ETIME;
502 goto out_err;
503 }
504 }
505
506 for (i = 0; i < len - 1;) {
507 burstcnt = st33zp24_spi_get_burstcount(dev);
508 if (burstcnt < 0)
509 return burstcnt;
510
511 size = min_t(int, len - i - 1, burstcnt);
512 ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + i, size);
513 if (ret < 0)
514 goto out_err;
515
516 i += size;
517 }
518
519 tpm_stat = st33zp24_spi_status(dev);
520 if ((tpm_stat & TPM_STS_DATA_EXPECT) == 0) {
521 ret = -EIO;
522 goto out_err;
523 }
524
525 ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + len - 1, 1);
526 if (ret < 0)
527 goto out_err;
528
529 tpm_stat = st33zp24_spi_status(dev);
530 if ((tpm_stat & TPM_STS_DATA_EXPECT) != 0) {
531 ret = -EIO;
532 goto out_err;
533 }
534
535 data = TPM_STS_GO;
536 ret = st33zp24_spi_write(dev, TPM_STS, &data, 1);
537 if (ret < 0)
538 goto out_err;
539
540 return len;
541
542 out_err:
543 st33zp24_spi_cancel(dev);
544 st33zp24_spi_release_locality(dev);
545
546 return ret;
547 }
548
st33zp24_spi_cleanup(struct udevice * dev)549 static int st33zp24_spi_cleanup(struct udevice *dev)
550 {
551 st33zp24_spi_cancel(dev);
552 /*
553 * The TPM needs some time to clean up here,
554 * so we sleep rather than keeping the bus busy
555 */
556 mdelay(2);
557 st33zp24_spi_release_locality(dev);
558
559 return 0;
560 }
561
st33zp24_spi_init(struct udevice * dev)562 static int st33zp24_spi_init(struct udevice *dev)
563 {
564 struct tpm_chip *chip = dev_get_priv(dev);
565 struct st33zp24_spi_phy *phy = dev_get_plat(dev);
566
567 chip->is_open = 1;
568
569 /* Default timeouts - these could move to the device tree */
570 chip->timeout_a = TIS_SHORT_TIMEOUT_MS;
571 chip->timeout_b = TIS_LONG_TIMEOUT_MS;
572 chip->timeout_c = TIS_SHORT_TIMEOUT_MS;
573 chip->timeout_d = TIS_SHORT_TIMEOUT_MS;
574
575 chip->locality = LOCALITY0;
576
577 phy->latency = st33zp24_spi_evaluate_latency(dev);
578 if (phy->latency <= 0)
579 return -ENODEV;
580
581 /*
582 * A timeout query to TPM can be placed here.
583 * Standard timeout values are used so far
584 */
585
586 return 0;
587 }
588
st33zp24_spi_open(struct udevice * dev)589 static int st33zp24_spi_open(struct udevice *dev)
590 {
591 struct tpm_chip *chip = dev_get_priv(dev);
592 int rc;
593
594 debug("%s: start\n", __func__);
595 if (chip->is_open)
596 return -EBUSY;
597
598 rc = st33zp24_spi_init(dev);
599 if (rc < 0)
600 chip->is_open = 0;
601
602 return rc;
603 }
604
st33zp24_spi_close(struct udevice * dev)605 static int st33zp24_spi_close(struct udevice *dev)
606 {
607 struct tpm_chip *chip = dev_get_priv(dev);
608
609 if (chip->is_open) {
610 st33zp24_spi_release_locality(dev);
611 chip->is_open = 0;
612 chip->vend_dev = 0;
613 }
614
615 return 0;
616 }
617
st33zp24_spi_get_desc(struct udevice * dev,char * buf,int size)618 static int st33zp24_spi_get_desc(struct udevice *dev, char *buf, int size)
619 {
620 struct tpm_chip *chip = dev_get_priv(dev);
621
622 if (size < 50)
623 return -ENOSPC;
624
625 return snprintf(buf, size, "1.2 TPM (%s, chip type %s device-id 0x%x)",
626 chip->is_open ? "open" : "closed",
627 dev->name,
628 chip->vend_dev >> 16);
629 }
630
631 const struct tpm_ops st33zp24_spi_tpm_ops = {
632 .open = st33zp24_spi_open,
633 .close = st33zp24_spi_close,
634 .recv = st33zp24_spi_recv,
635 .send = st33zp24_spi_send,
636 .cleanup = st33zp24_spi_cleanup,
637 .get_desc = st33zp24_spi_get_desc,
638 };
639
st33zp24_spi_probe(struct udevice * dev)640 static int st33zp24_spi_probe(struct udevice *dev)
641 {
642 struct tpm_chip_priv *uc_priv = dev_get_uclass_priv(dev);
643
644 uc_priv->duration_ms[TPM_SHORT] = TIS_SHORT_TIMEOUT_MS;
645 uc_priv->duration_ms[TPM_MEDIUM] = TIS_LONG_TIMEOUT_MS;
646 uc_priv->duration_ms[TPM_LONG] = TIS_LONG_TIMEOUT_MS;
647 uc_priv->retry_time_ms = TPM_TIMEOUT_MS;
648
649 debug("ST33ZP24 SPI TPM from STMicroelectronics found\n");
650
651 return 0;
652 }
653
st33zp24_spi_remove(struct udevice * dev)654 static int st33zp24_spi_remove(struct udevice *dev)
655 {
656 st33zp24_spi_release_locality(dev);
657
658 return 0;
659 }
660
661 static const struct udevice_id st33zp24_spi_ids[] = {
662 { .compatible = "st,st33zp24-spi" },
663 { }
664 };
665
666 U_BOOT_DRIVER(st33zp24_spi_spi) = {
667 .name = "st33zp24-spi",
668 .id = UCLASS_TPM,
669 .of_match = of_match_ptr(st33zp24_spi_ids),
670 .probe = st33zp24_spi_probe,
671 .remove = st33zp24_spi_remove,
672 .ops = &st33zp24_spi_tpm_ops,
673 .priv_auto = sizeof(struct tpm_chip),
674 .plat_auto = sizeof(struct st33zp24_spi_phy),
675 };
676