1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 5 * 6 * Copyright (C) 2009 TechNexion Ltd. 7 */ 8 9 #ifndef __TAM3517_H 10 #define __TAM3517_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 16 #include <asm/arch/cpu.h> /* get chip and board defs */ 17 #include <asm/arch/omap.h> 18 19 /* Clock Defines */ 20 #define V_OSCK 26000000 /* Clock output from T2 */ 21 #define V_SCLK (V_OSCK >> 1) 22 23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 24 #define CONFIG_SETUP_MEMORY_TAGS 25 #define CONFIG_INITRD_TAG 26 #define CONFIG_REVISION_TAG 27 28 /* 29 * Size of malloc() pool 30 */ 31 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 32 2 * 1024 * 1024) 33 /* 34 * DDR related 35 */ 36 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 37 38 /* 39 * Hardware drivers 40 */ 41 42 /* 43 * NS16550 Configuration 44 */ 45 #define CONFIG_SYS_NS16550_SERIAL 46 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 47 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 48 49 /* 50 * select serial console configuration 51 */ 52 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 53 54 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 55 115200} 56 /* EHCI */ 57 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 58 59 #define CONFIG_SYS_I2C 60 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 61 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 62 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 63 64 /* 65 * Board NAND Info. 66 */ 67 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 68 /* to access */ 69 /* nand at CS0 */ 70 71 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 72 /* NAND devices */ 73 74 /* 75 * Miscellaneous configurable options 76 */ 77 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 78 79 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 80 /* args */ 81 /* memtest works on */ 82 83 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 84 /* address */ 85 86 /* 87 * AM3517 has 12 GP timers, they can be driven by the system clock 88 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 89 * This rate is divided by a local divisor. 90 */ 91 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 92 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 93 94 /* 95 * Physical Memory Map 96 */ 97 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 98 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 99 100 /* 101 * FLASH and environment organization 102 */ 103 104 /* **** PISMO SUPPORT *** */ 105 106 /* Redundant Environment */ 107 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 108 109 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 110 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 111 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 112 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 113 CONFIG_SYS_INIT_RAM_SIZE - \ 114 GENERATED_GBL_DATA_SIZE) 115 116 /* 117 * ethernet support, EMAC 118 * 119 */ 120 #define CONFIG_NET_RETRY_COUNT 10 121 122 /* Defines for SPL */ 123 #define CONFIG_SPL_CONSOLE 124 #define CONFIG_SPL_NAND_SOFTECC 125 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 126 127 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 128 CONFIG_SPL_TEXT_BASE) 129 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 130 131 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 132 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 133 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 134 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 135 136 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 137 138 /* FAT */ 139 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 140 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 141 142 /* RAW SD card / eMMC */ 143 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 144 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 145 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 146 147 /* NAND boot config */ 148 #define CONFIG_SYS_NAND_PAGE_COUNT 64 149 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 150 #define CONFIG_SYS_NAND_OOBSIZE 64 151 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 152 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 153 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 154 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 155 48, 49, 50, 51, 52, 53, 54, 55,\ 156 56, 57, 58, 59, 60, 61, 62, 63} 157 #define CONFIG_SYS_NAND_ECCSIZE 256 158 #define CONFIG_SYS_NAND_ECCBYTES 3 159 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 160 161 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 162 163 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 164 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 165 166 /* Setup MTD for NAND on the SOM */ 167 168 #define CONFIG_TAM3517_SETTINGS \ 169 "netdev=eth0\0" \ 170 "nandargs=setenv bootargs root=${nandroot} " \ 171 "rootfstype=${nandrootfstype}\0" \ 172 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 173 "nfsroot=${serverip}:${rootpath}\0" \ 174 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 175 "addip_sta=setenv bootargs ${bootargs} " \ 176 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 177 ":${hostname}:${netdev}:off panic=1\0" \ 178 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 179 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 180 "else run addip_sta;fi\0" \ 181 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 182 "addtty=setenv bootargs ${bootargs}" \ 183 " console=ttyO0,${baudrate}\0" \ 184 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 185 "loadaddr=82000000\0" \ 186 "kernel_addr_r=82000000\0" \ 187 "hostname=" CONFIG_HOSTNAME "\0" \ 188 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ 189 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 190 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 191 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 192 "bootm ${kernel_addr}\0" \ 193 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 194 "nand read ${kernel_addr_r} kernel\0" \ 195 "bootm ${kernel_addr_r}\0" \ 196 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 197 "run nfsargs addip addtty addmtd addmisc;" \ 198 "bootm ${kernel_addr_r}\0" \ 199 "net_self=if run net_self_load;then " \ 200 "run ramargs addip addtty addmtd addmisc;" \ 201 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 202 "else echo Images not loades;fi\0" \ 203 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ 204 "load=tftp ${loadaddr} ${u-boot}\0" \ 205 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 206 "mlo=" CONFIG_HOSTNAME "/MLO\0" \ 207 "uboot_addr=0x80000\0" \ 208 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 209 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 210 "updatemlo=nandecc hw;nand erase 0 20000;" \ 211 "nand write ${loadaddr} 0 20000\0" \ 212 "upd=if run load;then echo Updating u-boot;if run update;" \ 213 "then echo U-Boot updated;" \ 214 "else echo Error updating u-boot !;" \ 215 "echo Board without bootloader !!;" \ 216 "fi;" \ 217 "else echo U-Boot not downloaded..exiting;fi\0" \ 218 219 /* 220 * this is common code for all TAM3517 boards. 221 * MAC address is stored from manufacturer in 222 * I2C EEPROM 223 */ 224 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 225 /* 226 * The I2C EEPROM on the TAM3517 contains 227 * mac address and production data 228 */ 229 struct tam3517_module_info { 230 char customer[48]; 231 char product[48]; 232 233 /* 234 * bit 0~47 : sequence number 235 * bit 48~55 : week of year, from 0. 236 * bit 56~63 : year 237 */ 238 unsigned long long sequence_number; 239 240 /* 241 * bit 0~7 : revision fixed 242 * bit 8~15 : revision major 243 * bit 16~31 : TNxxx 244 */ 245 unsigned int revision; 246 unsigned char eth_addr[4][8]; 247 unsigned char _rev[100]; 248 }; 249 250 #define TAM3517_READ_EEPROM(info, ret) \ 251 do { \ 252 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 253 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 254 (void *)info, sizeof(*info))) \ 255 ret = 1; \ 256 else \ 257 ret = 0; \ 258 } while (0) 259 260 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 261 do { \ 262 char buf[80], ethname[20]; \ 263 int i; \ 264 memset(buf, 0, sizeof(buf)); \ 265 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 266 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 267 (info)->eth_addr[i][5], \ 268 (info)->eth_addr[i][4], \ 269 (info)->eth_addr[i][3], \ 270 (info)->eth_addr[i][2], \ 271 (info)->eth_addr[i][1], \ 272 (info)->eth_addr[i][0]); \ 273 \ 274 if (i) \ 275 sprintf(ethname, "eth%daddr", i); \ 276 else \ 277 strcpy(ethname, "ethaddr"); \ 278 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 279 env_set(ethname, buf); \ 280 } \ 281 } while (0) 282 283 /* The following macros are taken from Technexion's documentation */ 284 #define TAM3517_sequence_number(info) \ 285 ((info)->sequence_number % 0x1000000000000LL) 286 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 287 #define TAM3517_year(info) ((info)->sequence_number >> 56) 288 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 289 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 290 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 291 292 #define TAM3517_PRINT_SOM_INFO(info) \ 293 do { \ 294 printf("Vendor:%s\n", (info)->customer); \ 295 printf("SOM: %s\n", (info)->product); \ 296 printf("SeqNr: %02llu%02llu%012llu\n", \ 297 TAM3517_year(info), \ 298 TAM3517_week_of_year(info), \ 299 TAM3517_sequence_number(info)); \ 300 printf("Rev: TN%u %u.%u\n", \ 301 TAM3517_revision_tn(info), \ 302 TAM3517_revision_major(info), \ 303 TAM3517_revision_fixed(info)); \ 304 } while (0) 305 306 #endif 307 308 #endif /* __TAM3517_H */ 309