GICR_VSGIPENDR, Redistributor virtual SGI pending state register

The GICR_VSGIPENDR characteristics are:

Purpose

Requests the pending state of virtual SGIs for a specified vPE.

Configuration

This register is present only when FEAT_GICv4p1 is implemented. Otherwise, direct accesses to GICR_VSGIPENDR are RES0.

A copy of this register is provided for each Redistributor.

Attributes

GICR_VSGIPENDR is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
BusyRES0Pending

Busy, bit [31]

ID of target vPEID

BusyMeaning
0b0

Query of virtual SGI state not in progress.

0b1

Query of virtual SGI state in progress.

Bits [30:16]

Reserved, RES0.

Pending, bits [15:0]

Pending state of virtual SGIs for requested vPEID.

This field is UNKNOWN when GICR_VSGIPENDR.Busy == 1

Accessing GICR_VSGIPENDR

GICR_VSGIPENDR can be accessed through the memory-mapped interfaces:

ComponentFrameOffsetInstance
GIC RedistributorVLPI_base0x0088GICR_VSGIPENDR

Accesses on this interface are RO.


04/07/2023 11:22; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68

Copyright © 2010-2023 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.